Dual N-Channel, Digital FET
FDG6301N-F085
Features
•
•
•
•
•
•
•
•
25 V, 0.22 A Continuous, 0.65 A Peak
RDS(ON) = 4 Ω @ VGS = 4.5 V,
RDS(ON) = 5 Ω @ VGS = 2.7 V.
Very Low Level Gate Drive Requirements allowing Directop−
Eration in 3 V Circuits (VGS(th) < 1.5 V)
Gate−Source Zener for ESD Ruggedness ( >6 kV Human Body
Model)
Compact Industry Standard SC70−6 Surface Mount Package.
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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Applications
SC−88 (SC−70 6 Lead), 1.25x2
CASE 419AD
• Low Voltage Applications as a Replacement for Bipolar Digital
Transistors and Small Signal MOSFETs
MOSFET MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Ratings
Units
VDSS
Drain to Source Voltage
25
V
VGS
Gate to Source Voltage
8
V
Drain Current Continuous
0.22
A
Pulsed
0.65
Power Dissipation
0.3
ID
PD
W
TJ, TSTG
Operating and Storage Temperature
−55 to 150
°C
ESD
Electrostatic Discharge Rating
MIL−STD−883D Human Body Model
(100 pF / 1500 W)
6.0
kV
RqJA
Thermal Resistance, Junction to Ambient
415
°C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. RθJA is the sum of the junction−to−case and case−to−ambient thermal
resistance, where the case thermal reference is defined as the Solder
mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA
is determined by the board design. RθJA = 415 °C/W on minimum pad
mounting on FR−4 board in still air.
2. A suffix as “...F085P” has been temporarily introduced in order to manage a
double source strategy as ON Semiconductor has officially announced in
August 2014.
3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%
ORDERING INFORMATION
Device
Device Marking
Package
Shipping†
FDG6301N−F085
FDG6301N
SC−88 (SC−70 6 Lead)
(Pb−Free, Halogen Free)
3,000 units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
© Semiconductor Components Industries, LLC, 2019
September, 2019 − Rev. 3
1
Publication Order Number:
FDG6301N−F085/D
FDG6301N−F085
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Off Characteristics
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BVDSS
IDSS
ID = 250 mA, VGS = 0 V
25
V
1
VDS = 20 V, VGS = 0 V
TJ = 55°C
Gate to Source Leakage Current
IGSS
mA
10
VGS = ±8 V
±100
nA
0.85
1.5
V
W
On Characteristics
Gate to Source Threshold Voltage
VGS(th)
VGS = VDS, ID = 250 mA
Drain to Source On Resistance
rDS(on)
ID = 0.22 A, VGS = 4.5 V
2.6
4
ID = 0.19 A, VGS = 2.7 V
3.7
5
ID = 0.22 A, VGS = 4.5 V, TJ = 125°C
5.3
7
On−State Drain Current
0.65
0.22
ID(on)
VGS = 4.5 V, VDS = 5 V
gFS
ID = 0.22 A, VDS = 5 V
0.2
s
Input Capacitance
Ciss
VDS = 10 V, VGS = 0 V, f = 1 MHz
9.5
pF
Output Capacitance
Coss
6
pF
Reverse Transfer Capacitance
Crss
4.5
pF
Forward Transconductance
Dynamic Characteristics
0.4
nC
5
10
ns
tr
4.5
10
ns
td(off)
4
8
ns
tf
3.2
7
ns
0.25
A
1.2
V
Total Gate Charge at −4.5 V
Qg(TOT)
Gate to Source Gate Charge
Qgs
Gate to Drain “Miller” Charge
Qgd
VGS = 0 to 4.5 V; VDD = 5 V, ID = 0.22 A
0.29
VDD = 5 V, ID = 0.22 A
0.12
0.03
Switching Characteristics
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
VDD = 5 V, ID = 0.5 A, VGS = 4.5 V,
RGEN = 50 W
Drain−Source Diode Characteristics
Maximum Continuous Source Current
Source to Drain Diode Voltage
IS
VSD
ISD = 0.25 A, VGS = 0 V
0.8
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
FDG6301N−F085
TYPICAL CHARACTERISTICS
Figure 2. On−Resistance Variation with Drain Current
and Gate Voltage
Figure 1. On−Region Characteristics
Figure 3. On−Resistance Variation with Temperature
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
Figure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature
Figure 5. Transfer Characteristics
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3
FDG6301N−F085
TYPICAL CHARACTERISTICS
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation
Figure 11. Transient Thermal Response Curve
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88 (SC−70 6 Lead), 1.25x2
CASE 419AD
ISSUE A
DATE 07 JUL 2010
1
D
e
e
E1 E
SYMBOL
MIN
A
0.80
MAX
1.10
A1
0.00
0.10
A2
0.80
1.00
b
0.15
0.30
0.18
c
0.10
D
1.80
2.00
2.20
E
1.80
2.10
2.40
E1
1.15
1.25
1.35
0.65 BSC
e
L
0.26
L1
0.36
0.46
0.42 REF
0.15 BSC
L2
TOP VIEW
NOM
θ
0º
8º
θ1
4º
10º
q1
A2 A
q
b
q1
L
L1
A1
SIDE VIEW
c
L2
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34266E
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SC−88 (SC−70 6 LEAD), 1.25X2
PAGE 1 OF 1
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