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N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 22 A, 24 mΩ
Features
General Description
Shielded Gate MOSFET Technology
This N-Channel logic Level MOSFETs are produced using
ON Semiconductor‘s advanced PowerTrench® process
that incorporates Shielded Gate technology. This process
has been optimized for the on-state resistance and yet
maintain superior switching performance. G-S zener has been
added to enhance ESD voltage level.
Max rDS(on) = 24 mΩ at VGS = 10 V, ID = 6.5 A
Max rDS(on) = 35 mΩ at VGS = 4.5 V, ID = 5.5 A
HBM ESD protection level > 6 KV typical (Note 4)
100% UIL Tested
RoHS Compliant
Application
DC - DC Switching
Top
Bottom
Pin 1
S
D
D
D
S
S
G
S
D
S
D
S
D
G
D
D
MLP 3.3x3.3
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
TC = 25 °C
-Continuous
TA = 25 °C
ID
TJ, TSTG
±20
V
(Note 1a)
7
A
30
Single Pulse Avalanche Energy
PD
Units
V
22
-Pulsed
EAS
Ratings
100
(Note 3)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
84
mJ
41
(Note 1a)
Operating and Storage Junction Temperature Range
W
2.3
-55 to +150
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
3
(Note 1a)
53
°C/W
Package Marking and Ordering Information
Device Marking
FDMC86102Z
Device
FDMC86102LZ
©2011 Semiconductor Components Industries, LLC.
October-2017, Rev. 2
Package
Power 33
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
Publication Order Number:
FDMC86102LZ/D
FDMC86102LZ N-Channel Shielded Gate PowerTrench® MOSFET
FDMC86102LZ
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 80 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±10
μA
2.2
V
100
V
71
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1.0
1.6
-6
mV/°C
VGS = 10 V, ID = 6.5 A
19
24
VGS = 4.5 V, ID = 5.5 A
25
35
VGS = 10 V, ID = 6.5 A, TJ = 125 °C
31
40
VDS = 5 V, ID = 6.5 A
24
VDS = 50 V, VGS = 0 V,
f = 1 MHz
969
1290
pF
181
240
pF
9
15
pF
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Ω
0.4
Switching Characteristics
7.1
15
VDD = 50 V, ID = 6.5 A,
VGS = 10 V, RGEN = 6 Ω
2.3
10
ns
19
35
ns
2.5
10
ns
Total Gate Charge
VGS = 0 V to 10 V
15.3
22
nC
Qg(TOT)
Total Gate Charge
VGS = 0 V to 4.5 V
7.6
11
nC
Qgs
Total Gate Charge
Qgd
Gate to Drain “Miller” Charge
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
VDD = 50 V,
ID = 6.5 A
ns
2.4
nC
2.5
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 6.5 A
(Note 2)
0.80
1.3
VGS = 0 V, IS = 2 A
(Note 2)
0.72
1.2
IF = 6.5 A, di/dt = 100 A/μs
V
37
59
ns
27
43
nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b. 125 °C/W when mounted on
a minimum pad of 2 oz copper
a. 53 °C/W when mounted on a
1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C; N-ch: L = 1 mH, IAS = 13 A, VDD = 90 V, VGS = 10 V.
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
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2
FDMC86102LZ N-Channel Shielded Gate PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
8
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
30
VGS = 10 V
ID, DRAIN CURRENT (A)
25
VGS = 4.5 V
20
VGS = 3.5 V
VGS = 3 V
15
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 2.5 V
5
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
7
VGS = 2.5 V
6
5
VGS = 3 V
4
3
VGS = 3.5 V
2
1
0
5
10
15
20
25
30
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance
vs. Drain Current and Gate Voltage
2.0
1.8
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (mΩ)
100
ID = 6.5 A
VGS = 10 V
ID = 6.5 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
80
60
TJ = 125 oC
40
20
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
TJ = 25 oC
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On-Resistance
vs. Junction Temperature
Figure 4. On-Resistance vs. Gate to
Source Voltage
30
30
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
IS, REVERSE DRAIN CURRENT (A)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
VGS = 4.5 V
0
VDS, DRAIN TO SOURCE VOLTAGE (V)
25
ID, DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VDS = 5 V
20
15
TJ = 150 oC
10
TJ = 25 oC
5
TJ = -55 oC
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
10
1
VGS = 0 V
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
0.2
0.4
0.6
0.8
1.0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
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3
1.2
FDMC86102LZ N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
5000
VGS, GATE TO SOURCE VOLTAGE (V)
10
ID = 6.5 A
Ciss
VDD = 25 V
1000
CAPACITANCE (pF)
8
VDD = 50 V
6
VDD = 75 V
4
Coss
100
Crss
10
2
f = 1 MHz
VGS = 0 V
0
0
4
8
12
1
0.1
16
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain
to Source Voltage
30
50
o
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
RθJC = 3.0 C/W
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
25
20
VGS = 10 V
15
Limited by Package
5
1
0.001
0.01
0.1
1
0
25
10 20
50
75
125
150
o
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
-1
10
50
ID, DRAIN CURRENT (A)
VDS = 0 V
-2
10
-3
10
-4
10
TJ = 125 oC
-5
10
-6
10
TJ
= 25 oC
-7
10
100 us
10
1 ms
1
0.1
0
4
8
12
16
20
24
28
32
0.01
0.005
0.01
100 ms
SINGLE PULSE
TJ = MAX RATED
10
-9
10 ms
THIS AREA IS
LIMITED BY rDS(on)
-8
10
100
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
Ig, GATE LEAKAGE CURRENT (A)
VGS = 4.5 V
10
0.1
1s
RθJA = 125 oC/W
10 s
TA = 25 oC
DC
1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. Gate Leakage Current vs.
Gate to Source Voltage
Figure 12. Forward Bias Safe
Operating Area
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4
100
500
FDMC86102LZ N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
P(PK), PEAK TRANSIENT POWER (W)
1000
100
10
SINGLE PULSE
o
RθJA = 125 C/W
o
TA = 25 C
1
0.5 -4
10
-3
-2
10
-1
10
10
1
100
10
1000
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 125 C/W
0.001
0.0005 -4
10
-3
10
-2
10
-1
10
1
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
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5
100
1000
FDMC86102LZ N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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