FDMS86250

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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET 150 V, 30 A, 25 mΩ Features General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. „ Shielded Gate MOSFET Technology „ Max rDS(on) = 25 mΩ at VGS = 10 V, ID = 6.7 A „ Max rDS(on) = 33 mΩ at VGS = 6 V, ID = 5.8 A „ Advanced package and silicon combination for low rDS(on) and high efficiency „ MSL1 robust package design Application „ 100% UIL tested „ DC-DC Conversion „ RoHS Compliant Bottom Top Pin 1 S D D D S S G S D S D S D G D D Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous TC = 25 °C -Continuous TA = 25 °C ID -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C Ratings 150 Units V ±20 V 30 (Note 1a) 6.7 (Note 4) 100 (Note 3) 180 96 (Note 1a) Operating and Storage Junction Temperature Range 2.5 -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 1.3 (Note 1a) 50 °C/W Package Marking and Ordering Information Device Marking FDMS86250 Device FDMS86250 ©2012 Fairchild Semiconductor Corporation FDMS86250 Rev. C4 Package Power 56 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET October 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 4.0 V 150 V 106 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C -11 VGS = 10 V, ID = 6.7 A 19 rDS(on) Static Drain to Source On Resistance VGS = 6 V, ID = 5.8 A 23 33 VGS = 10 V, ID = 6.7 A, TJ = 125 °C 35 46 VDS = 10 V, ID = 6.7 A 24 gFS Forward Transconductance 2.0 2.9 mV/°C 25 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 75 V, VGS = 0 V, f = 1 MHz 1750 2330 pF 165 220 pF 8.8 15 pF Ω 0.5 Switching Characteristics td(on) Turn-On Delay Time 14 25 tr Rise Time 4.3 10 ns td(off) Turn-Off Delay Time 22 35 ns VDD = 75 V, ID = 6.7 A, VGS = 10 V, RGEN = 6 Ω tf Fall Time Qg Total Gate Charge VGS = 0 V to 10 V Qg Total Gate Charge VGS = 0 V to 5 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = 75 V, ID = 6.7 A ns 4.2 10 ns 25 36 nC 14 20 nC 7.4 nC 5.5 nC Drain-Source Diode Characteristics VSD Source-Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2 A (Note 2) 0.72 1.2 VGS = 0 V, IS = 6.7 A (Note 2) 0.78 1.3 IF = 6.7 A, di/dt = 100 A/μs V 73 117 ns 112 180 nC Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125 °C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C, L = 1 mH, IAS = 19 A, VDD = 135 V, VGS = 10 V. 4. Pulse Id limited by junction temperature, td ≤ 100 μs. Please refer to SOA curve for more details. ©2012 Fairchild Semiconductor Corporation FDMS86250 Rev. C4 2 www.fairchildsemi.com FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 4 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 100 VGS = 6.5 V VGS = 10 V 80 VGS = 6 V 60 40 VGS = 5.5 V 20 VGS = 5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 VGS = 5 V VGS = 6 V 2 VGS = 6.5 V 1 0 5 0 20 60 80 100 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 80 ID = 6.7 A VGS = 10 V 2.2 2.0 rDS(on), DRAIN TO 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -75 -50 SOURCE ON-RESISTANCE (mΩ) 2.4 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 40 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics ID = 6.7 A PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 60 TJ = 125 oC 40 20 TJ = 25 oC 0 4 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 5 6 7 8 9 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage 100 IS, REVERSE DRAIN CURRENT (A) 80 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) VGS = 10 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VDS, DRAIN TO SOURCE VOLTAGE (V) 60 VDS = 5 V 40 TJ = 150 oC TJ = 25 oC 20 TJ = -55 oC 0 VGS = 5.5 V 3 2 3 4 5 6 10 TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 7 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2012 Fairchild Semiconductor Corporation FDMS86250 Rev. C4 VGS = 0 V Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 5000 VDD =75 V ID = 6.7 A Ciss 1000 8 VDD = 50 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 100 V 6 4 Coss 100 10 Crss 2 f = 1 MHz VGS = 0 V 0 0 4 8 12 16 20 24 1 0.1 28 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 50 50 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) o RθJC = 1.3 C/W TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 1 0.001 0.01 0.1 1 10 40 30 Limited by Package VGS = 6 V 10 0 25 100 50 125 150 Figure 10. Maximum Continuous Drain Current vs Case Temperature 20000 P(PK), PEAK TRANSIENT POWER (W) 300 100 ID, DRAIN CURRENT (A) 100 o Figure 9. Unclamped Inductive Switching Capability 10 us 10 THIS AREA IS LIMITED BY rDS(on) 100 us SINGLE PULSE TJ = MAX RATED RθJC = 1.3 oC/W o TC = 25 C 0.1 0.1 75 TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) 1 VGS = 10 V 20 1 ms CURVE BENT TO MEASURED DATA 1 10 10 ms DC 100 500 SINGLE PULSE RθJC = 1.3 oC/W TC = 25 oC 1000 100 50 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area ©2012 Fairchild Semiconductor Corporation FDMS86250 Rev. C4 10000 Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 DUTY CYCLE-DESCENDING ORDER 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZθJC(t) = r(t) x RθJC RθJC = 1.3 oC/W Peak TJ = PDM x ZθJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.005 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve ©2012 Fairchild Semiconductor Corporation FDMS86250 Rev. C4 5 www.fairchildsemi.com FDMS86250 N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted PQFN8 5X6, 1.27P CASE 483AE ISSUE A 5.10 PKG CL 8 5.10 3.91 A SEE DETAIL B B 5 1.27 8 7 6 5 0.77 4.52 PKG CL 5.85 5.65 6.15 3.75 6.61 KEEP OUT AREA 1.27 1 4 1 TOP VIEW 2 3 4 0.61 1.27 3.81 OPTIONAL DRAFT ANGLE MAY APPEAR ON FOUR SIDES OF THE PACKAGE SEE DETAIL C 5.00 4.80 LAND PATTERN RECOMMENDATION 0.35 0.15 0.10 C 0.05 0.00 SIDE VIEW 8X 0.08 C 5.20 4.80 1.10 0.90 3.81 0.35 0.15 DETAIL C SCALE: 2:1 1.27 0.51 (8X) 0.31 (0.34) 0.10 1 2 3 C A B 4 0.76 0.51 (0.52) 6.25 5.90 3.48+0.30 -0.10 (0.50) (0.30) (2X) 8 0.20+0.10 -0.15 (8X) 7 6 3.96 3.61 BOTTOM VIEW 0.30 0.05 5 C SEATING PLANE DETAIL B SCALE: 2:1 NOTES: UNLESS OTHERWISE SPECIFIED A. PACKAGE STANDARD REFERENCE: JEDEC MO-240, ISSUE A, VAR. AA,. B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009. E. IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUT AREA. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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