FGH50N6S2D

IGBT - SMPS II Series N-Channel with Anti-Parallel Stealth Diode 600 V FGH50N6S2D www.onsemi.com Description The FGH50N6S2D is a Low Gate Charge, Low Plateau Voltage SMPS II IGBT combining the fast switching speed of the SMPS IGBTs along with lower gate charge, plateau voltage and avalanche capability (UIS). These LGC devices shorten delay times, and reduce the power requirement of the gate drive. These devices are ideally suited for high voltage switched mode power supply applications where low conduction loss, fast switching times and UIS capability are essential. SMPS II LGC devices have been specially designed for: • • • • • • C G E Power Factor Correction (PFC) Circuits Full Bridge Topologies Half Bridge Topologies Push−Pull Circuits Uninterruptible Power Supplies Zero Voltage and Zero Current Switching Circuits E C G Features • • • • • • • • • TO−247−3LD CASE 340CK 100 kHz Operation at 390 V, 40 A 200 kHz Operation at 390 V, 25 A 600 V Switching SOA Capability Typical Fall Time 90 ns at TJ = 125°C Low Gate Charge 70 nC at VGE = 15 V Low Plateau Voltage 6.5 V Typical UIS Rated 480 mJ Low Conduction Loss This is a Pb−Free Device MARKING DIAGRAM $Y&Z&3&K 50N6S2D $Y &Z &3 &K 50N6S2D = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2002 November, 2020 − Rev. 1 1 Publication Order Number: FGH50N6S2D/D FGH50N6S2D MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Parameter Collector to Emitter Breakdown Voltage Collector Current Continuous TC = 25°C Symbol Ratings Unit BVCES 600 V IC 75 A 60 A TC = 110°C Collector Current Pulsed (Note 1) ICM 240 A Gate to Emitter Voltage Continuous VGES ±20 V Gate to Emitter Voltage Pulsed VGEM ±30 V Switching Safe Operating Area at TJ = 150°C, Figure 2 SSOA 150 A at 600 V EAS 480 mJ PD 463 W 3.7 W/°C TJ −55 to +150 °C TSTG −55 to +150 °C Pulsed Avalanche Energy, ICE = 30 A, L = 1 mH, VDD = 50 V Power Dissipation Total TC = 25°C Power Dissipation Derating TC > 25°C Operating Junction Temperature Range Storage Junction Temperature Range Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Pulse width limited by maximum junction temperature. PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Tape Width Quantity 50N6S2D FGH50N6S2D TO−247 N/A 30 THERMAL CHARACTERISTICS Characteristic Symbol Value Unit RJC 0.27 °C/W RJC 1.1 Thermal Resistance Junction−Case, IGBT Thermal Resistance Junction−Case, Diode ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit 600 − − V TJ = 25°C − − 250 A TJ = 125°C − − 2.8 mA − − ±250 nA TJ = 25°C − 1.9 2.7 V TJ = 125°C − 1.7 2.2 V − 2.2 2.6 V VGE = 15 V − 70 85 nC VGE = 20 V − 90 110 nC OFF STATE CHARACTERISTICS Collector to Emitter Breakdown Voltage Collector to Emitter Leakage Current Gate to Emitter Leakage Current BVCES ICES IGES IC = 250 A, VGE = 0 V, VCE = 600 V VGE = ±20 V ON STATE CHARACTERISTICs Collector to Emitter Saturation Voltage Diode Forward Voltage VCE(SAT) VEC IC = 30 A, VGE = 15 V IEC = 30 A DYNAMIC CHARACTERISTICS Gate Charge Gate to Emitter Threshold Voltage Gate to Emitter Plateau Voltage QG(ON) IC = 30 A, VCE = 300 V VGE(TH) IC = 250 A, VCE= VGE 3.5 4.3 5.0 V VGEP IC = 30 A, VCE = 300 V − 6.5 8.0 V www.onsemi.com 2 FGH50N6S2D ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (continued) Parameter Symbol Test Conditions Min Typ Max Unit 150 − − A − 13 − ns − 15 − ns − 55 − ns − 50 − ns SWITCHING CHARACTERISTICS Switching SOA SSOA TJ = 150°C, RG = 3  VGE = 15 V, L = 100 H, VCE = 600 V Current Turn−On Delay Time td(ON)I IGBT and Diode at TJ = 25°C, ICE = 30 A, VCE = 390 V, VGE = 15 V, RG = 3  , L = 200 H, Test Circuit − Figure 26 Current Rise Time Current Turn−Off Delay Time Current Fall Time trI td(OFF)I tfI Turn−On Energy (Note 2) EON1 − 260 − J Turn−On Energy (Note 2) EON2 − 330 − J Turn−Off Energy Loss (Note 3) EOFF − 250 350 J Current Turn−On Delay Time td(ON)I − 13 − ns − 15 − ns − 92 150 ns − 88 100 ns − 260 − J Current Rise Time Current Turn−Off Delay Time Current Fall Time trI td(OFF)I tfI IGBT and Diode at TJ = 125°C, ICE = 30 A, VCE = 390 V, VGE = 15 V, RG = 3  , L = 200 H, Test Circuit − Figure 26 Turn−On Energy (Note 2) EON1 Turn−On Energy (Note 2) EON2 − 490 600 J Turn−Off Energy (Note 3) EOFF − 575 850 J IEC = 30 A, dIEC/dt = 200 A/s − 50 55 ns IEC = 1 A, dIEC/dt = 200 A/s − 30 42 ns Diode Reverse Recovery Time trr Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Values for two Turn−On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn−on loss of the IGBT only. EON2 is the turn−on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 26. 3. Turn−Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24−1 Method for Measurement of Power Device Turn−Off Switching Loss. This test method produces the true total Turn−Off Energy Loss. www.onsemi.com 3 FGH50N6S2D TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 200 ICE, Collector to Emitter Current (A) ICE, DC Collector Current (A) 140 120 100 80 Package Limited 60 40 20 0 25 50 75 125 100 TJ = 150°C, RG = 3 , VGE = 15 V, L = 100 H 150 100 50 0 150 0 100 TC, Case Temperature (°C) tsc, Short Circuit Withstand Time (s) fMAX, Operating Frequency (kHz) VGE = 15 V 100 f MAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD − PC) / (EON2 + EOFF) PC = Conduction Dissipation (Duty Factor = 50%) RJC = 0.27°C/W, See Notes VGE = 10 V TJ = 125°C, RG = 3 , L = 200 H, VCE = 390 V 10 10 1 30 14 600 500 700 900 VCE = 390 V, RG = 3 , TJ = 125°C 12 800 10 700 60 Isc 8 600 6 500 4 2 0 400 tsc 9 10 11 12 13 300 14 15 16 200 VGE, Gate to Emitter Voltage (V) ICE, Collector to Emitter Current (A) Figure 3. Operating Frequency vs. Collector to Emitter Current Figure 4. Short Circuit Withstand Time 60 60 50 Duty Cycle < 0.5%, VGE = 15 V Pulse Duration = 250 s ICE, Collector to Emitter Current (A) ICE, Collector to Emitter Current (A) 400 40 30 20 TJ = 150°C 10 0 0.50 TJ = 25°C TJ = 125°C 0.75 1.00 1.25 1.50 1.75 Isc, Peak Short Circuit Current (A) TC = 75°C 300 300 Figure 2. Minimum Switching Safe Operating Area Figure 1. DC Collector Current vs. Case Temperature 700 200 VCE, Collector to Emitter Voltage (V) 50 Duty Cycle < 0.5%, VGE = 10 V Pulse Duration = 250 s 40 30 20 TJ = 150°C TJ = 125°C 0 0.50 2.00 2.25 VCE, Collector to Emitter Voltage (V) TJ = 25°C 10 0.75 1.00 1.25 1.50 1.75 2.00 2.25 VCE, Collector to Emitter Voltage (V) Figure 6. Collector to Emitter On−State Voltage Figure 5. Collector to Emitter On−State Voltage www.onsemi.com 4 FGH50N6S2D TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) (continued) 1400 RG = 3 , L = 200 H, VCE = 390 V 2250 2000 EOFF, Turn−Off Energy Loss (J) EON2, Turn−On Energy Loss (J) 2500 TJ = 25°C, TJ = 125°C, VGE = 10 V 1750 1500 1250 1000 750 500 250 0 TJ = 125°C, TJ = 25°C VGE = 15 V 10 20 30 40 50 ICE, Collector to Emitter Current (A) 0 400 200 70 0 TJ = 25°C, VGE = 10 V, VGE = 15 V 40 60 10 20 30 50 ICE, Collector to Emitter Current (A) RG = 3 , L = 200 H, VCE = 390 V 60 TJ = 25°C, TJ = 125°C, VGE = 10 V 15 trI, Rise Time (ns) td(ON)I, Turn−On Delay Time (ns) 600 Figure 8. Turn−Off Energy Loss vs. Collector to Emitter Current TJ = 25°C, TJ = 125°C, VGE = 15 V 10 5 TJ = 25°C, TJ = 125°C, VGE = 10 V 50 40 30 20 10 0 0 60 10 20 30 40 50 ICE, Collector to Emitter Current (A) 100 TJ = 25°C, TJ = 125°C, VGE = 15 V 0 10 20 30 40 50 ICE, Collector to Emitter Current (A) 60 Figure 10. Turn−On Rise Time vs. Collector to Emitter Current Figure 9. Turn−On Delay Time vs. Collector to Emitter Current 125 RG = 3 , L = 200 H, VCE = 390 V RG = 3 , L = 200 H, VCE = 390 V 90 tfI, Fall Time (ns) td(OFF), Turn−Off Delay Time (ns) 800 0 RG = 3 , L = 200 H, VCE = 390 V 20 0 TJ = 125°C, VGE = 10 V, VGE = 15 V 1000 60 Figure 7. Turn−On Energy Loss vs. Collector to Emitter Current 25 RG = 3 , L = 200 H, VCE = 390 V 1200 80 VGE = 10 V, VGE = 15 V, TJ = 125°C 70 60 100 TJ = 125°C, VGE = 10 V, VGE = 15 V 75 50 50 40 TJ = 25°C, VGE = 10 V, VGE = 15 V VGE = 10 V, VGE = 15 V, TJ = 25°C 0 10 20 30 40 50 25 60 ICE, Collector to Emitter Current (A) 0 10 20 30 40 50 60 ICE, Collector to Emitter Current (A) Figure 12. Fall Time vs. Collector to Emitter Current Figure 11. Turn−Off Delay Time vs. Collector to Emitter Current www.onsemi.com 5 FGH50N6S2D 250 225 16 Duty Cycle < 0.5%, VCE = 10 V Pulse Duration = 250 s VGE, Gate to Emitter Voltage (V) ICE, Collector to Emitter Current (A) TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) (continued) 200 175 150 125 TJ = 125°C 100 75 TJ = 25°C TJ = −55°C 50 25 0 5 4 6 7 8 12 VCE = 600 V 10 VCE = 400 V 8 6 4 VCE = 200 V 2 0 10 9 IG(REF) = 1 mA, RL = 10  14 0 10 VGE, Gate to Emitter Voltage (V) ETOTAL, Total Switching Energy Loss (mJ) ETOTAL, Total Switching Energy Loss (mJ) 3.0 RG = 3 , L = 200 H, VCE = 390 V VGE = 15 V 2.5 ETOTAL = EON2 + EOFF ICE = 60 A 2.0 1.5 ICE = 30 A 1.0 0 ICE = 15 A 50 25 75 100 125 150 100 10 ICE = 60 A ICE = 30 A 1 0.1 ICE = 15 A 10 100 RG, Gate Resistance () 1 2.5 VCE, Collector to Emitter Voltage (V) Frequency = 1 MHz C, Capacitance (nF) 3.5 3.0 CIES 2.0 1.5 1.0 COES CRES 0.5 0.0 0 1000 Figure 16. Total Switching Loss vs. Gate Resistance Figure 15. Total Switching Loss vs. Case Temperature 2.5 80 TJ = 125°C, L = 200 H, VCE = 390 V, VGE = 15 V ETOTAL = EON2 + EOFF TC, Case Temperature (°C) 4.0 70 Figure 14. Gate Charge Figure 13. Transfer Characteristics 0.5 20 30 40 50 60 QG, Gate Charge (nC) 10 20 30 40 50 60 70 80 90 100 VCE, Collector to Emitter Voltage (V) Duty Cycle < 0.5% Pulse Duration = 250 s 2.4 2.3 ICE = 45 A 2.2 2.1 ICE = 30 A 2.0 1.9 ICE = 15 A 1.8 1.7 6 7 8 9 10 11 12 13 14 15 16 VGE, Gate to Emitter Voltage (V) Figure 18. Collector to Emitter On−State Voltage vs. Gate to Emitter Voltage Figure 17. Capacitance vs. Collector to Emitter Voltage www.onsemi.com 6 FGH50N6S2D TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) (continued) 200 Duty Cycle < 0.5% Pulse Duration = 250 s trr, Reverse Recovery Times (ns) ICE, Forward Current (A) 75 60 125°C 45 30 25°C 15 0 0 0.5 1.0 1.5 2.0 2.5 3.0 dIEC/dt = 200 A/s, VCE = 390 V 175 125°C trr 125°C 150 125 100 125°C tb 125°C 75 25°C ta, tb 50 25 0 3.5 6 2 10 VEC, Forward Voltage (V) Qrr, Reverse Recovery Charge (nC) ta,tb, Reverse Recovery Times (ns) 125 100 75 25°C ta 25 25°C 0 tb 125°C ta 50 200 tb 400 600 800 1000 1200 VCE = 390 V 800 25°C, IEC = 30 A 400 200 25°C, IEC = 15 A 0 200 IRRM, Max Reverse Recovery Current (A) S, Reverse Recovery Softness Factor 1.5 IEC = 15 A 1.0 0.5 800 1000 600 800 1000 1200 Figure 22. Stored Charge vs. Rate of Change of Current IEC = 30 A 600 400 dIEC/dt, Rate of Changes of Current (A/s) VCE = 390 V, TJ = 125°C 400 125°C, IEC = 30 A 600 1200 2.5 0 200 30 125°C, IEC = 30 A dIEC/dt, Rate of Changes of Current (A/s) 2.0 125°C ta 22 26 1000 Figure 21. Recovery Times vs. Rate of Change of Current 3.0 18 Figure 20. Recovery Times vs. Forward Current IEC = 30 A, VCE = 390 V 125°C 14 IEC, Forward Current (A) Figure 19. Diode Forward Current vs. Forward Voltage Drop 150 25°C trr 25°C 1200 30 VCE = 390 V, TJ = 125°C IEC = 30 A 25 20 IEC = 15 A 15 10 5 200 400 600 800 1000 1200 dIEC/dt, Current Rate of Change (A/s) dIEC/dt, Current Rate of Change (A/s) Figure 24. Maximum Reverse Recovery Current vs. Rate of Change of Current Figure 23. Reverse Recovery Softness Factor vs. Rate of Change of Current www.onsemi.com 7 FGH50N6S2D ZJC, Normalized Thermal Response TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) (continued) 100 0.50 0.20 10−1 t1 0.10 PD t2 0.05 0.02 Duty Factor, D = t1/t2 Peak TJ = (PD x ZJC x RJC) + TC 0.01 10−2 10−5 Single Pulse 10−4 10−3 10−2 10−1 100 101 t1, Rectangular Pulse Duration (s) Figure 25. IGBT Normalized Transient Thermal Impedance, Junction to Case TEST CIRCUIT AND WAVEFORMS FGH50N6S2D Diode TA49392 90% 10% VGE EON2 EOFF L = 200 H VCE 90% RG = 3  ICE + FGH50N6S2D − VDD = 390 V 10% td(OFF)I tfI trI td(ON)I Figure 27. Switching Test Waveforms Figure 26. Inductive Switching Test Circuit www.onsemi.com 8 FGH50N6S2D Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gate−insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBDt LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means − for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating − Never exceed the gate−voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination − The gates of these devices are essentially capacitors. Circuits that leave the gate open−circuited or floating should be avoided. These conditions can result in turn−on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection − These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on−state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 27. Device turn−off delay can establish an additional frequency limiting condition for an application other than TJM. td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD − PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM − TC)/RJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 27. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn−on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn−off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0) All brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders. www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−247−3LD SHORT LEAD CASE 340CK ISSUE A A DATE 31 JAN 2019 A E P1 P A2 D2 Q E2 S B D 1 2 D1 E1 2 3 L1 A1 L b4 c (3X) b 0.25 M (2X) b2 B A M DIM (2X) e GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXX XXXXXXX XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week ZZ = Assembly Lot Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON13851G TO−247−3LD SHORT LEAD A A1 A2 b b2 b4 c D D1 D2 E E1 E2 e L L1 P P1 Q S MILLIMETERS MIN NOM MAX 4.58 4.70 4.82 2.20 2.40 2.60 1.40 1.50 1.60 1.17 1.26 1.35 1.53 1.65 1.77 2.42 2.54 2.66 0.51 0.61 0.71 20.32 20.57 20.82 13.08 ~ ~ 0.51 0.93 1.35 15.37 15.62 15.87 12.81 ~ ~ 4.96 5.08 5.20 ~ 5.56 ~ 15.75 16.00 16.25 3.69 3.81 3.93 3.51 3.58 3.65 6.60 6.80 7.00 5.34 5.46 5.58 5.34 5.46 5.58 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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