NGD18N40CLBT4G

NGD18N40CLB Ignition IGBT 18 Amps, 400 Volts N−Channel DPAK This Logic Level Insulated Gate Bipolar Transistor (IGBT) features monolithic circuitry integrating ESD and Over−Voltage clamped protection for use in inductive coil drivers applications. Primary uses include Ignition, Direct Fuel Injection, or wherever high voltage and high current switching is required. Features http://onsemi.com • • • • • • • • • • • • Ideal for Coil−on−Plug Applications DPAK Package Offers Smaller Footprint for Increased Board Space Gate−Emitter ESD Protection Temperature Compensated Gate−Collector Voltage Clamp Limits Stress Applied to Load Integrated ESD Diode Protection New Design Increases Unclamped Inductive Switching (UIS) Energy Per Area Low Threshold Voltage Interfaces Power Loads to Logic or Microprocessor Devices Low Saturation Voltage High Pulsed Current Capability Optional Gate Resistor (RG) and Gate−Emitter Resistor (RGE) Emitter Ballasting for Short−Circuit Capability Pb−Free Package is Available* 18 AMPS 400 VOLTS VCE(on) 3 2.0 V @ IC = 10 A, VGE . 4.5 V C G RG RGE E 4 12 3 DPAK CASE 369C STYLE 7 MARKING DIAGRAM 1 Gate MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Collector−Emitter Voltage Collector−Gate Voltage Gate−Emitter Voltage Collector Current−Continuous @ TC = 25°C − Pulsed ESD (Human Body Model) R = 1500 Ω, C = 100 pF ESD (Machine Model) R = 0 Ω, C = 200 pF Total Power Dissipation @ TC = 25°C Derate above 25°C Operating and Storage Temperature Range Symbol VCES VCER VGE IC ESD 8.0 ESD PD TJ, Tstg 800 115 0.77 −55 to +175 V Watts W/°C °C Value 430 430 18 15 50 Unit VDC VDC VDC ADC AAC kV 2 Collector 3 Emitter G18N40B Y WW G YWW G18 N40BG 4 Collector = Device Code = Year = Work Week = Pb−Free Device ORDERING INFORMATION Device NGD18N40CLBT4 NGD18N40CLBT4G Package DPAK Shipping† 2500/Tape & Reel Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DPAK 2500/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 May, 2006 − Rev. 7 1 Publication Order Number: NGD18N40CLB/D NGD18N40CLB UNCLAMPED COLLECTOR−TO−EMITTER AVALANCHE CHARACTERISTICS (−55° ≤ TJ ≤ 175°C) Characteristic Single Pulse Collector−to−Emitter Avalanche Energy VCC = 50 V, VGE = 5.0 V, Pk IL = 21.1 A, L = 1.8 mH, Starting TJ = 25°C VCC = 50 V, VGE = 5.0 V, Pk IL = 16.2 A, L = 3.0 mH, Starting TJ = 25°C VCC = 50 V, VGE = 5.0 V, Pk IL = 18.3 A, L = 1.8 mH, Starting TJ = 125°C Reverse Avalanche Energy VCC = 100 V, VGE = 20 V, Pk IL = 25.8 A, L = 6.0 mH, Starting TJ = 25°C Symbol EAS Value 400 400 300 mJ 2000 Unit mJ EAS(R) MAXIMUM SHORT−CIRCUIT TIMES (−55°C ≤ TJ ≤ 150°C) Short Circuit Withstand Time 1 (See Figure 17, 3 Pulses with 10 ms Period) Short Circuit Withstand Time 2 (See Figure 18, 3 Pulses with 10 ms Period) tsc1 tsc2 RθJC DPAK (Note 1) RθJA TL 750 5.0 ms ms THERMAL CHARACTERISTICS Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient 1.3 95 275 °C/W °C/W °C Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds ELECTRICAL CHARACTERISTICS Characteristic Symbol Test Conditions Temperature Min Typ Max Unit OFF CHARACTERISTICS Collector−Emitter Clamp Voltage BVCES IC = 2.0 mA IC = 10 mA Zero Gate Voltage Collector Current ICES TJ = −40°C to 150°C TJ = −40°C to 150°C TJ = 25°C TJ = 150°C TJ = −40°C TJ = 25°C TJ = 25°C VCE = −24 V Reverse Collector−Emitter Clamp Voltage BVCES(R) IC = −75 mA Gate−Emitter Clamp Voltage Gate−Emitter Leakage Current Gate Resistor Gate Emitter Resistor BVGES IGES RG RGE TJ = 150°C TJ = −40°C TJ = 25°C TJ = 150°C TJ = −40°C IG = 5.0 mA VGE = 10 V − − TJ = −40°C to 150°C TJ = −40°C to 150°C TJ = −40°C to 150°C TJ = −40°C to 150°C 380 390 − − − − − − − 27 30 25 11 384 − 10 395 405 2.0 10 1.0 − 0.7 12 0.1 33 36 32 13 640 70 16 420 430 20 40* 10 2.0 1.0 25* 1.0 37 40 35 15 700 − 26 VDC μADC Ω VDC VCE = 350 V, VGE = 0 V VCE = 15 V, VGE = 0 V μADC Reverse Collector−Emitter Leakage Current IECS mA VDC kΩ 1. When surface mounted to an FR4 board using the minimum recommended pad size. *Maximum Value of Characteristic across Temperature Range. http://onsemi.com 2 NGD18N40CLB ELECTRICAL CHARACTERISTICS (continued) Characteristic Symbol Test Conditions Temperature Min Typ Max Unit ON CHARACTERISTICS (Note 2) Gate Threshold Voltage VGE(th) IC = 1.0 mA, VGE = VCE − TJ = 25°C TJ = 150°C TJ = −40°C − TJ = 25°C TJ = 150°C TJ = −40°C TJ = 25°C TJ = 150°C TJ = −40°C TJ = 25°C TJ = 150°C TJ = −40°C TJ = 25°C TJ = 150°C TJ = −40°C TJ = 25°C TJ = 150°C TJ = −40°C TJ = 25°C TJ = −40°C to 150°C 1.1 0.75 1.2 − 1.0 0.9 1.1 1.3 1.2 1.4 1.4 1.4 1.4 1.8 2.0 1.7 1.3 1.3 1.4 − 8.0 1.4 1.0 1.6 3.4 1.4 1.3 1.45 1.6 1.55 1.6 1.8 1.8 1.8 2.2 2.4 2.1 1.8 1.75 1.8 − 14 1.9 1.4 2.1* − 1.6 1.6 1.7* 1.9* 1.8 1.9* 2.05 2.0 2.1* 2.5 2.6* 2.5 2.0* 2.0* 2.0* 1.65 25 Mhos mV/°C VDC VDC Threshold Temperature Coefficient (Negative) Collector−to−Emitter On−Voltage − VCE(on) IC = 6.0 A, VGE = 4.0 V IC = 8.0 A, VGE = 4.0 V IC = 10 A, VGE = 4.0 V IC = 15 A, VGE = 4.0 V IC = 10 A, VGE = 4.5 V IC = 6.5 A, VGE = 3.7 V Forward Transconductance gfs VCE = 5.0 V, IC = 6.0 A DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance CISS COSS CRSS 400 VCC = 25 V, VGE = 0 V f = 1.0 MHz TJ = −40°C to 150°C 50 4.0 800 75 7.0 1000 100 10 pF SWITCHING CHARACTERISTICS Turn−Off Delay Time (Resistive) Fall Time (Resistive) Turn−On Delay Time Rise Time td(off) tf td(on) tr VCC = 300 V, IC = 6.5 A RG = 1.0 kΩ, RL = 46 Ω, VCC = 300 V, IC = 6.5 A RG = 1.0 kΩ, RL = 46 Ω, VCC = 10 V, IC = 6.5 A RG = 1.0 kΩ, RL = 1.5 Ω VCC = 10 V, IC = 6.5 A RG = 1.0 kΩ, RL = 1.5 Ω TJ = 25°C TJ = 25°C TJ = 25°C TJ = 25°C − − − − 4.0 9.0 0.7 4.5 10 15 4.0 7.0 μSec μSec 2. Pulse Test: Pulse Width v 300 μS, Duty Cycle v 2%. *Maximum Value of Characteristic across Temperature Range. http://onsemi.com 3 NGD18N40CLB TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted) 60 IC, COLLECTOR CURRENT (AMPS) IC, COLLECTOR CURRENT (AMPS) VGE = 10 V 50 40 30 20 3V 10 0 2.5 V 0 1 2 3 4 5 6 7 8 TJ = 25°C 5V 4.5 V 4V 3.5 V 60 50 4.5 V 40 TJ = −40°C 30 20 3V 10 0 2.5 V 0 1 2 3 4 5 6 7 8 4V 3.5 V VGE = 10 V 5V VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) Figure 1. Output Characteristics 60 IC, COLLECTOR CURRENT (AMPS) 50 5V 40 TJ = 150°C 30 20 10 0 4.5 V 4V 3.5 V 3V 2.5 V 0 1 2 3 4 5 6 7 8 60 IC, COLLECTOR CURRENT (AMPS) VGE = 10 V 55 50 45 40 35 30 25 20 15 10 5 0 Figure 2. Output Characteristics VCE = 10 V TJ = −40°C TJ = 150°C TJ = 25°C 0 1 2 3 4 5 6 7 8 VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) VGE, GATE TO EMITTER VOLTAGE (VOLTS) Figure 3. Output Characteristics VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) COLLECTOR TO EMITTER VOLTAGE (VOLTS) Figure 4. Transfer Characteristics 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 −50 −25 0 25 50 75 100 125 150 VGE = 5 V IC = 25 A IC = 20 A IC = 15 A IC = 10 A IC = 5 A 3 2.5 IC = 15 A 2 1.5 1 0.5 0 IC = 10 A IC = 5 A TJ = 25°C 3 4 5 6 7 8 9 10 TJ, JUNCTION TEMPERATURE (°C) GATE−TO−EMITTER VOLTAGE (VOLTS) Figure 5. Collector−to−Emitter Saturation Voltage versus Junction Temperature Figure 6. Collector−to−Emitter Voltage versus Gate−to−Emitter Voltage http://onsemi.com 4 NGD18N40CLB COLLECTOR TO EMITTER VOLTAGE (VOLTS) 3 2.5 2 1.5 1 0.5 0 IC = 15 A IC = 10 A IC = 5 A TJ = 150°C 10000 1000 100 10 1 0 3 4 5 6 7 8 9 10 GATE TO EMITTER VOLTAGE (VOLTS) Ciss C, CAPACITANCE (pF) Coss Crss 0 20 40 60 80 100 120 140 160 180 200 VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS) Figure 7. Collector−to−Emitter Voltage versus Gate−to−Emitter Voltage 2 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 −50 −30 −10 10 30 50 70 90 110 130 150 VTH IL, LATCH CURRENT (AMPS) 1.8 VTH + 4 σ VTH − 4 σ 30 25 20 15 10 5 0 −50 −25 Figure 8. Capacitance Variation GATE THRESHOLD VOLTAGE (VOLTS) VCC = 50 V VGE = 5.0 V RG = 1000 Ω L = 1.8 mH L = 3 mH L = 6 mH 0 25 50 75 100 125 150 175 TEMPERATURE (°C) TEMPERATURE (°C) Figure 9. Gate Threshold Voltage versus Temperature 30 IL, LATCH CURRENT (AMPS) 25 L = 1.8 mH 20 15 10 5 0 −50 −25 L = 3 mH L = 6 mH VCC = 50 V VGE = 5.0 V RG = 1000 Ω 12 10 SWITCHING TIME (μs) 8 6 Figure 10. Minimum Open Secondary Latch Current versus Temperature VCC = 300 V VGE = 5.0 V RG = 1000 Ω IC = 10 A L = 300 μH tf td(off) 4 2 0 −50 −30 −10 0 25 50 75 100 125 150 175 10 30 50 70 90 110 130 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 11. Typical Open Secondary Latch Current versus Temperature Figure 12. Inductive Switching Fall Time versus Temperature http://onsemi.com 5 NGD18N40CLB 100 COLLECTOR CURRENT (AMPS) DC 10 100 μs 1 1 ms 10 ms 0.1 100 ms COLLECTOR CURRENT (AMPS) 100 10 DC 1 100 μs 1 ms 10 ms 0.1 100 ms 0.01 1 10 100 1000 COLLECTOR−EMITTER VOLTAGE (VOLTS) 0.01 1 10 100 1000 COLLECTOR−EMITTER VOLTAGE (VOLTS) Figure 13. Single Pulse Safe Operating Area (Mounted on an Infinite Heatsink at TA = 255C) Figure 14. Single Pulse Safe Operating Area (Mounted on an Infinite Heatsink at TA = 1255C) 100 COLLECTOR CURRENT (AMPS) COLLECTOR CURRENT (AMPS) t1 = 1 ms, D = 0.05 10 t1 = 2 ms, D = 0.10 t1 = 3 ms, D = 0.30 100 t1 = 1 ms, D = 0.05 10 t1 = 2 ms, D = 0.10 t1 = 3 ms, D = 0.30 1 1 0.1 0.1 0.01 1 10 100 1000 0.01 1 10 100 1000 COLLECTOR−EMITTER VOLTAGE (VOLTS) COLLECTOR−EMITTER VOLTAGE (VOLTS) Figure 15. Pulse Train Safe Operating Area (Mounted on an Infinite Heatsink at TC = 255C) Figure 16. Pulse Train Safe Operating Area (Mounted on an Infinite Heatsink at TC = 1255C) VBATT = 16 V VBATT = 16 V RL = 0.1 W RL = 0.1 W L = 10 mH L = 10 mH 5.0 V 5.0 V VIN RG = 1 kW RS = 55 mW VIN RG = 1 kW Figure 17. Circuit Configuration for Short Circuit Test #1 http://onsemi.com 6 Figure 18. Circuit Configuration for Short Circuit Test #2 NGD18N40CLB 100 Duty Cycle = 0.5 R(t), TRANSIENT THERMAL RESISTANCE (°C/Watt) 0.2 10 0.1 0.05 0.02 1 0.01 0.1 0.01 P(pk) Single Pulse t1 t2 DUTY CYCLE, D = t1/t2 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TA = P(pk) RqJA(t) RqJC X R(t) for t ≤ 0.2 s 0.001 0.0001 0.00001 0.0001 0.001 t,TIME (S) 0.01 0.1 1 Figure 19. Transient Thermal Resistance (Non−normalized Junction−to−Ambient mounted on minimum pad area) http://onsemi.com 7 NGD18N40CLB PACKAGE DIMENSIONS DPAK CASE 369C−01 ISSUE O −T− B V R 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 −−− 0.035 0.050 0.155 −−− GATE COLLECTOR EMITTER COLLECTOR MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 −−− 0.89 1.27 3.93 −−− C E S A 1 2 3 Z U K F L D G 2 PL J H 0.13 (0.005) M DIM A B C D E F G H J K L R S U V Z T STYLE 7: PIN 1. 2. 3. 4. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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