NIS6201

NIS6201 Floating, Regulated Charge Pump The NIS6201 charge pump is designed to provide economical, low level power to circuits above ground level potential, such as the drive for ORing diodes. It is a very cost−effective replacement for a small, isolated, switching power supply. It contains an internal linear regulator, and a versatile charge pump to allow bias voltage supplies to be transferred from a ground referenced source to a higher potential. The design of the charge pump allows for any isolation voltage required, as the high voltage components are external to the pump and can be sized accordingly. Features http://onsemi.com MARKING DIAGRAM 8 8 1 1 6201 A Y WW G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package SOIC−8 NB CASE 751 6201 AYWW G • • • • • Integrated Linear Regulator and Charge Pump Thermal Limit Protection Adjustable Voltage Output High Voltage Isolation This is a Pb−Free Device Applications • ORing Diodes • Floating Supervisory Circuits • LED Driver VCC PIN CONNECTIONS N/C 1 N/C 2 SIGGND 3 COMP 4 (Top View) 8 7 6 5 PWRGND DRIVE VREG VCC 0.50 V Regulator 15 V + − ORDERING INFORMATION Device NIS6201DR2G Package SOIC−8 (Pb−Free) Shipping† 3000 / Tape & Reel + − 150 mV Overcharge DRIVE 1.0 MHz Oscillator †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SIGGND COMP VREG PWRGND Figure 1. Charge Pump Block Diagram © Semiconductor Components Industries, LLC, 2005 1 September, 2005 − Rev. 1 Publication Order Number: NIS6201/D NIS6201 PIN FUNCTION DESCRIPTION Pin 1, 2 3 4 5 6 7 8 Symbol N/C SIGGND COMP VCC VREG DRIVE PWRGND No connection. Ground reference pin for control circuits. This should be connected to power ground on the PCB. The feedback and compensation network of the linear regulator are connected to this pin. Input power to chip. There is an internal clamp at 15 V to allow for a shunt regulator circuit on this pin for high voltage inputs. This is the regulated output of the internal linear regulator. Output drive of oscillator, that drives external diode/capacitor network. Ground reference pin for driver current. Description MAXIMUM RATINGS Rating Input Voltage, Operating (Note 1) Comp pin Voltage Drive Current, Peak Drive Current, Average Thermal Resistance, Junction−to−Air Min copper area 1 in2 copper (1 oz, single sided) Thermal Resistance, Junction−to−Lead (Pin 1) Power Dissipation @ TA = 25°C Min copper area 1 in2 copper (1 oz, single sided) Operating Temperature Range Non−operating Temperature Range Lead Temperature, Soldering (10 Sec) Symbol VCC Vcomp IDpk IDavg QJA 175 114 QJL Pmax .57 .88 TJ TJ TL −40 to 125 −55 to 150 260 °C °C °C 41 °C/W W Value −0.3 to 15 4.5 3.0 0.05 Unit V V A A °C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Above this voltage, a series resistor is necessary to limit current into the shunt regulator. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: VCC = 15 V, Vreg = 12 V, DRIVE Pin open, TJ = 25°C.) Characteristic OSCILLATOR Frequency DRIVER On Resistance, High Side FET On Resistance, Low Side FET LINEAR REGULATOR Reference Voltage, Pin 4 TJ = −40 to 125°C Headroom (VCC–Vreg) VCC = 7 V, Idrive = 10 mA TOTAL DEVICE Minimum Operational Input Voltage Bias Current (Operational) Bias Current (COMP Pin = 600 mV) VCC Zener Breakdown Voltage Vmin IBias IBias_SD VZener 7.0 − − 14.5 − 3.6 3.0 15 − 4.6 3.6 − V mA mA V Vref Vhead 490 475 − 500 505 155 510 525 220 mV mV RDSon(hi) RDSon(low) − − 9.5 9.5 − 12 W W fosc 0.9 1.3 1.45 MHz Symbol Min Typ Max Unit http://onsemi.com 2 NIS6201 BAS16LT1 1.0 mF BAS16LT1 0.1 mF 7 6 22 k 0.1 mF 1.0 k BAS16LT1 Load NIS6111 5 12 V 8 NIS6201 3 4 Figure 2. Application Circuit with Better ORing Diode 1.0 mF VCC + 48 V PWR GND SIG GND COMP Charge Pump 0.1 mF DRIVE DC−DC Converter VREG 1.0 mF Figure 3. Application Circuit for Improved Regulation and Transient Response http://onsemi.com 3 NIS6201 VCC + 8.0 V PWR GND SIG GND COMP 0.1 mF Charge Pump DRIVE 1.0 mF VREG 1.0 mF Figure 4. Current Regulated, Voltage Doubler 8.0 to 18 Vdc 220 5 VCC PWR GND NIS6201 SIG GND COMP Drive 7 VREG 8 0.1 mF 3 4 6 13.7k 0.1 mF 1k 0.1 mF 0.1 mF 100 mA to 2 mA −12.5 V 1 mF 1 mF Diodes are: BAS16LT1 75V or M1MA174T1 100V Figure 5. Regulated, Negative Doubler Circuit http://onsemi.com 4 NIS6201 OPERATING DESCRIPTION DC Input The Vcc pin is rated for a maximum dc voltage of 15 volts. An internal shunt diode is included for applications where the voltage may exceed 15 volts. For voltages greater than 15 volts an external shunt resistor must be added in series with the Vcc pin. This resistor must be sized such that at low line, the voltage drop across it will allow for an input voltage of greater than that of the output of the LDO and at high line such that the current into the chip does not exceed its power rating. LDO NIS6201 Pwr GND Sig GND Comp 8 3 4 Vset 6 V reg 0.1uF Vbias The internal LDO contains a P−Channel FET and error amplifier with a 0.5 volt reference. A voltage divider is required from the Vreg pin to the comp pin to set the output of the LDO. This output voltage (Vreg) is the voltage used for the charge pump oscillator. The divider can be calculated from the following formulas: Rbias + 0.50 V Ibias Figure 6. Bias Voltage Divider Overcharge Comparator Ibias is generally in the range of 100 mA to 1 mA and sets the bias current in the divider. Rset + Rbias(Vreg * 0.50 V) 0.50 V The overcharge comparator provides a protection function from an overvoltage condition at turn−on. Figure 7 shows a typical configuration for this charge pump. At turn−on there is a voltage divider consisting of two capacitors and two diodes. If this device is being operated at voltages significantly above the Vreg level, it is possible to charge the Vreg cap well beyond its intended level. VCC 1.25 V + − Regulator + − 0.10 V Overcharge 1 MHz Oscillator DRIVE COMP VREG GND Figure 7. Overcharge Circuit http://onsemi.com 5 NIS6201 The overcharge comparator detects when the voltage at Vreg is 10% greater than its set level. If this situation occurs, the overcharge circuit overrides the oscillator and turns on the bottom FET of the driver stage. This shunts the start−up current directly to ground and bypasses the capacitor on Vreg thus allowing for safe start−ups at high input voltages. Oscillator Pshunt diode + VCC @ LDO (Vin * VCC) * 2 mA * (Iout @ nstages) Rseries The oscillator in this chip operates at a nominal frequency of 1 MHz. The FETs have an on resistance of 20 W and can drive loads in excess of 20 mA. Since the charge diodes and capacitors are external, this device can drive a “floating” voltage that is referenced to the input bus such as is shown in Figure 7. The “isolation” voltage for the regulated output is limited only by the ratings of these external components. The oscillator can also drive a conventional voltage doubler circuit or an inverting output stage. Total Power Consumption The SO−8 package used for this chip has a power rating of 570 milliwatts. The major losses in this device come from three circuits plus the bias current. These are the following: Shunt Diode The power lost in the LDO pass transistor is calculated by the voltage drop across it and the current through it. As was the case with the shunt diode, when calculating the load current, the number of pump stages must be accounted for. PLDO + (VCC * Vreg) @ (2mA ) (Iout @ nstages)) Oscillator The power dissipated in the oscillator section can be approximated by multiplying the square of the load current by the typical on resistance. POsc + Iout2 @ 20 W Bias Current The power dissipated in this diode is due to the current through the input series resistor when the input exceeds 15 volts. The current in the diode is the current through the input resistor less the output and bias currents in the chip. The output current is equal to the load current unless multiple pump stages are used in which case it is multiplied by the number of stages in use. An additional 2 mA of bias current is required to operate the charge pump. The bias current is simply the input voltage at the Vcc pin multiplied by 2 mA. The total power dissipated by the chip is the sum of these four losses. If the input voltage does not exceed 15 volts, the shunt diode losses can be ignored. The sum of these losses should not exceed the power rating for the device. Note that the power rating is specified at 25°C and must be derated at higher operating temperatures. http://onsemi.com 6 NIS6201 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AG −X− A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M −Y− G C −Z− H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NIS6201 The product describer herein (NIS6201), may be covered by U.S. patents. Other patents may be pending. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 8 NIS6201/D