NTLJS3180PZ

NTLJS3180PZ Power MOSFET Features −20 V, −7.7 A, mCoolt Single P−Channel, ESD, 2x2 mm WDFN Package • WDFN 2x2 mm Package with Exposed Drain Pads for Excellent • • • • • Thermal Conduction Lowest RDS(on) Solution in 2x2 mm Package Footprint Same as SC−88 Package Low Profile (< 0.8 mm) for Easy Fit in Thin Environments ESD Protected This is a Pb−Free Device V(BR)DSS http://onsemi.com RDS(on) MAX 38 mW @ −4.5 V −20 V 50 mW @ −2.5 V 75 mW @ −1.8 V 200 mW @ −1.5 V S −7.7 A ID MAX Applications • Optimized for Battery and Load Management Applications in • High Side Load Switch • Battery Switch • DC−DC Converters MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Steady State t≤5s Power Dissipation (Note 1) Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current Steady State t≤5s TA = 25°C Steady State TA = 85°C TA = 25°C PD IDM TJ, TSTG IS TL ID TA = 25°C TA = 85°C TA = 25°C PD TA = 25°C 3.3 −3.5 −2.5 0.7 −23 −55 to 150 −2.8 260 W A °C A °C (Top View) D D G 1 2 3 A Symbol VDSS VGS ID Value −20 ±8.0 −5.9 −4.2 −7.7 1.9 W Unit V V A Pin 1 S D Portable Equipment G D P−CHANNEL MOSFET MARKING DIAGRAM WDFN6 CASE 506AP 1 6 2 AAMG 5 G 3 4 AA = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS 6 5 4 D D S tp = 10 ms Operating Junction and Storage Temperature Source Current (Body Diode) (Note 2) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size, (30 mm2, 2 oz Cu). ORDERING INFORMATION Device NTLJS3180PZTAG NTLJS3180PZTBG Package Shipping† WDFN6 3000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTLJS3180PZ/D © Semiconductor Components Industries, LLC, 2008 December, 2008 − Rev. 0 1 NTLJS3180PZ THERMAL RESISTANCE RATINGS Parameter Junction−to−Ambient – Steady State (Note 3) Junction−to−Ambient – Steady State Min Pad (Note 4) Junction−to−Ambient – t ≤ 5 s (Note 3) Symbol RqJA RqJA RqJA Max 65 180 38 °C/W Unit 3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu). MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Gate Threshold Temperature Coefficient Drain−to−Source On−Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = −4.5 V, ID = −3.0 A VGS = −2.5 V, ID = −3.0 A VGS = −1.8 V, ID = −2.0 A VGS = −1.5 V, ID = −1.8 A Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Forward Recovery Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Time td(ON) tr td(OFF) tf VSD tRR ta tb QRR VGS = 0 V, dISD/dt = 100 A/ms, IS = −2.0 A TJ = 25°C TJ = 125°C VGS = −4.5 V, VDD = −10 V, ID = −3.0 A, RG = 3.0 W 8.0 15 70 67 −0.7 −0.6 60 16 44 41 nC ns −1.0 ns gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD VGS = −4.5 V, VDS = −16 V, ID = −3.0 A VDS = −16 V, ID = −3.0 A CHARGES, CAPACITANCES AND GATE RESISTANCE VGS = 0 V, f = 1.0 MHz, VDS = −16 V 1100 180 130 13 0.5 1.4 4.2 19.5 nC pF VGS = VDS, ID = −250 mA −0.45 3.0 30 40 55 85 7.7 38 50 75 200 S −1.0 V mV/°C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, ID = −250 mA ID = −250 mA, Ref to 25°C VDS = −16 V, VGS = 0 V TJ = 25°C TJ = 85°C −20 −5.0 −1.0 −10 ±10 mA V mV/°C mA Symbol Test Conditions Min Typ Max Unit VDS = 0 V, VGS = ±8.0 V DRAIN−SOURCE DIODE CHARACTERISTICS VGS = 0 V, IS = −2.0 A V 5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTLJS3180PZ TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 14 −ID, DRAIN CURRENT (AMPS) 12 10 8 6 4 −1.4 V 2 0 0 1 2 3 4 −1.2 V −1.0 V 5 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS = −2.2 V to −5 V −2.0 V TJ = 25°C −1.8 V −ID, DRAIN CURRENT (AMPS) 14 VDS ≥ 5 V 12 10 8 6 4 2 0 0 TJ = 25°C TJ = 125°C 0.5 1 −1.6 V TJ = −55°C 1.5 2 2.5 3 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.05 0.04 TJ = 125°C 0.03 TJ = 25°C 0.02 0.01 0 2.0 TJ = −55°C RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.1 Figure 2. Transfer Characteristics VGS = −4.5 V TJ = 25°C 0.08 VGS = −1.8 V 0.06 0.04 0.02 0 VGS = −2.5 V VGS = −4.5 V 4.0 6.0 8.0 2 4 6 8 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance versus Drain Current and Gate Voltage 100000 VGS = 0 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.75 1.5 ID = −3 A VGS = −4.5 V −IDSS, LEAKAGE (nA) 10000 1.25 1.0 TJ = 150°C 1000 TJ = 125°C 0.75 0.5 −50 −25 0 25 50 75 100 125 150 100 0 4 8 12 16 20 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 NTLJS3180PZ TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 2000 C, CAPACITANCE (pF) 1800 1600 1400 1200 1000 800 600 400 200 0 10 Coss 5 0 5 10 15 20 Crss Ciss -V GS, GATE-TO-SOURCE VOLTAGE (VOLTS) 2200 TJ = 25°C VDS = VGS = 0 V 5 QT 4 3 2 1 0 VGS QGS QGD ID = −3.0 A TJ = 25°C VGS VDS 0 5 10 QG, TOTAL GATE CHARGE (nC) 15 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1000 td(off) tf tr td(on) −IS, SOURCE CURRENT (AMPS) VDD = −10 V ID = −3.0 A VGS = −4.5 V t, TIME (ns) 100 Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge 3 VGS = 0 V TJ = 25°C 2 10 1 1 1 10 RG, GATE RESISTANCE (OHMS) 100 0 0 0.6 0.2 0.4 0.8 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) 1.0 Figure 9. Resistive Switching Time Variation versus Gate Resistance 100 −ID, DRAIN CURRENT (AMPS) Figure 10. Diode Forward Voltage versus Current 10 100 ms 1 ms 1 VGS = 20 V SINGLE PULSE TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 10 ms 0.1 dc 100 0.01 1 10 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTLJS3180PZ TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) EFFECTIVE TRANSIENT THERMAL RESISTANCE 1000 100 D = 0.5 0.2 0.1 10 0.05 0.02 0.01 1 SINGLE PULSE 0.00001 0.0001 0.001 P(pk) See Note 2 on Page 1 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TA = P(pk) RqJA(t) 10 100 1000 0.1 0.000001 t2 DUTY CYCLE, D = t1/t2 0.01 0.1 t, TIME (sec) 1 t1 Figure 12. Thermal Response http://onsemi.com 5 NTLJS3180PZ PACKAGE DIMENSIONS WDFN6 CASE 506AP−01 ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL LEAD IS CONNECTED TO TERMINAL LEAD # 4. 6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG. DIM A A1 A3 b b1 D D2 E E2 e K L L2 J J1 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.25 0.35 0.51 0.61 2.00 BSC 1.00 1.20 2.00 BSC 1.10 1.30 0.65 BSC 0.15 REF 0.20 0.30 0.20 0.30 0.27 REF 0.65 REF D A B 2X 0.10 C 2X 0.10 C 0.10 C 7X 0.08 C D2 6X L E2 NOTE 5 K BOTTOM VIEW mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone : 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ÍÍ ÍÍ A3 A A1 C 4X SEATING PLANE 1 3 PIN ONE REFERENCE E e L2 b1 6X SOLDERMASK DEFINED MOUNTING FOOTPRINT 2.30 1.10 6X 0.10 C A 0.05 C B 6X 0.43 1 1.25 0.35 6 4 b 0.60 0.35 6X J J1 0.10 C A 0.05 C B 0.34 0.65 PITCH 0.66 NOTE 3 DIMENSIONS: MILLIMETERS http://onsemi.com 6 NTLJS3180PZ/D