NTLJS3A18PZTWG

NTLJS3A18PZ Power MOSFET −20 V, −8.2 A, Single P−Channel, 2.0x2.0x0.8 mm WDFN Package Features • WDFN Package with Exposed Drain Pads for Excellent Thermal • • • • Conduction Low Profile WDFN (2.0x2.0x0.8 mm) for Board Space Saving Ultra Low RDS(on) ESD Diode−Protected Gate These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(on) MAX 18 mW @ −4.5 V 25 mW @ −2.5 V −20 V −8.2 A 50 mW @ −1.8 V 90 mW @ −1.5 V Applications • Optimized for Power Management Applications for Portable • • ID MAX S Products, such as Smart Phones, Media Tablets, PMP, DSC, GPS, and Others Battery Switch High Side Load Switch G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Parameter Value Unit Drain−to−Source Voltage VDSS −20 V Gate−to−Source Voltage VGS ±8.0 V ID −8.2 A Continuous Drain Current (Note 1) Power Dissipation (Note 1) Steady State TA = 25°C t≤5s TA = 25°C Steady State TA = 85°C −11.2 PD Power Dissipation (Note 2) Pulsed Drain Current W 1.8 TA = 25°C 3.4 TA = 25°C Steady State ID TA = 85°C TA = 25°C A −5.0 PD 0.7 −40 A −55 to 150 °C VESD 2000 V Source Current (Body Diode) (Note 2) IS −1.1 A Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C ESD (HBM, JESD22−A114) WDFN6 CASE 506AP Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size, (30 mm2, 2 oz Cu). 1 6 2 ACMG 5 G 3 4 Pin 1 AC = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS W IDM MARKING DIAGRAM D −3.6 TJ, TSTG tp = 10 ms Operating Junction and Storage Temperature S −5.9 t≤5s Continuous Drain Current (Note 2) D P−CHANNEL MOSFET ORDERING INFORMATION Device Package Shipping† NTLJS3A18PZTWG WDFN6 (Pb−Free) 10000/Tape & Reel NTLJS3A18PZTXG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2016 April, 2016 − Rev. 1 1 Publication Order Number: NTLJS3A18PZ/D NTLJS3A18PZ THERMAL RESISTANCE RATINGS Symbol Max Junction−to−Ambient – Steady State (Note 1) Parameter RqJA 69 Junction−to−Ambient – t ≤ 5 s (Note 1) RqJA 37 Junction−to−Ambient – Steady State Min Pad (Note 2) RqJA 186 Unit °C/W MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min −20 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = −250 mA Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ ID = −250 mA, Ref to 25°C Zero Gate Voltage Drain Current IDSS VDS = −16 V, VGS = 0 V Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±5.0 V VGS(TH) VGS = VDS, ID = −250 mA V 11.5 TJ = 25°C mV/°C −1.0 mA ±5.0 mA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Gate Threshold Temperature Coefficient Drain−to−Source On−Resistance VGS(TH)/TJ RDS(on) Forward Transconductance gFS −0.4 −1.0 3.9 V mV/°C VGS = −4.5 V, ID = −7.0 A 14.6 18 VGS = −2.5 V, ID = −5.0 A 20 25 VGS = −1.8 V, ID = −3.0 A 25 50 VGS = −1.5 V, ID = −1.0 A 40 90 VDS = −15 V, ID = −3.0 A 40 S 2240 pF mW CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VGS = 0 V, f = 1.0 MHz, VDS = −15 V 240 210 Total Gate Charge QG(TOT) 28 Threshold Gate Charge QG(TH) 1.0 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 8.8 td(ON) 8.6 tr 15 VGS = −4.5 V, VDS = −15 V, ID = −4.0 A nC 2.9 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(OFF) VGS = −4.5 V, VDD = −15 V, ID = −4.0 A, RG = 1.0 W tf ns 150 88 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Recovery Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Time VSD VGS = 0 V, IS = −1.0 A TJ = 25°C −0.63 TJ = 125°C −0.50 tRR ta tb −1.0 V 26.1 VGS = 0 V, dISD/dt = 100 A/ms, IS = −1.0 A QRR 10.2 15.9 12 3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 ns nC NTLJS3A18PZ TYPICAL CHARACTERISTICS −4.5 V 30 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) VGS = −2.0 V 25 20 VGS = −1.8 V 15 10 VGS = −1.5 V 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 25 20 15 TJ = 25°C 10 TJ = 125°C 0 4.5 TJ = −55°C 0 0.5 1 1.5 2 2.5 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics TJ = 25°C 0.09 ID = −4.0 A 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.10 TJ = 25°C 0.09 0.08 VGS = −1.5 V 0.07 0.06 VGS = −1.8 V 0.05 0.04 0.03 VGS = −2.5 V 0.02 0.01 0.00 VGS = −4.5 V 0 5 10 15 20 25 30 35 40 −VGS, GATE VOLTAGE (V) −ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.5 100000 1.4 VGS = −4.5 V ID = −4.0 A 1.3 TJ = 125°C −IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE (W) 30 5 0.10 0.00 1.0 VDS = −5 V 35 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) −ID, DRAIN CURRENT (A) 35 40 −4.0 to −2.5 V −ID, DRAIN CURRENT (A) 40 1.2 1.1 1.0 0.9 0.8 10000 TJ = 85°C 1000 0.7 0.6 50 25 0 25 50 75 100 125 150 100 2 4 6 8 10 12 14 16 18 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 20 NTLJS3A18PZ VGS = 0 V TJ = 25°C f = 1 MHz C, CAPACITANCE (pF) 3200 Ciss 2800 2400 2000 1600 1200 800 Coss 400 0 Crss 0 2 4 6 8 10 12 14 16 18 20 5 18 QT 14 VDS 10 2 QGS 4 0 5 10 15 20 2 0 30 25 QG, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 100 1000 100 −IS, SOURCE CURRENT (A) td(off) t, TIME (ns) 6 VDS = −15 V ID = −4.0 A TJ = 25°C Figure 7. Capacitance Variation tf tr 10 td(on) VGS = −4.5 V VDD = −15 V ID = −4.0 A 1 10 100 TJ = 125°C TJ = 25°C 1.0 TJ = −55°C 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 RG, GATE RESISTANCE (W) −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1.2 700 ID = −250 mA 0.90 600 0.80 500 POWER (W) 0.70 0.60 0.50 0.40 400 300 200 0.30 100 0.20 0.10 −50 10 0.1 0.3 1.00 −VGS(th) (V) 8 QGD 1 0 12 VGS 3 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1.0 16 4 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 4000 3600 −VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS −25 0 25 50 75 100 125 150 0 1.E−05 TJ, JUNCTION TEMPERATURE (°C) 1.E−03 1.E−01 1.E+01 1.E+03 SINGLE PULSE TIME (s) Figure 11. Threshold Voltage Figure 12. Single Pulse Maximum Power Dissipation www.onsemi.com 4 NTLJS3A18PZ TYPICAL CHARACTERISTICS 100 −ID, DRAIN CURRENT (A) 10 ms 100 ms 10 1 ms 1 0.1 10 ms VGS ≤ −8 V Single Pulse TC = 25°C dc RDS(on) Limit Thermal Limit Package Limit 0.01 0.1 1 10 100 R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 13. Maximum Rated Forward Biased Safe Operating Area 80 70 RqJA = 69°C/W Steady State 60 50 40 Duty Cycle = 0.5 30 20 10 0.05 0.2 0.1 0 1E−06 0.02 0.01 Single Pulse 1E−05 1E−04 1E−03 1E−02 1E−01 t, TIME (s) Figure 14. FET Thermal Response www.onsemi.com 5 1E+00 1E+01 1E+02 1E+03 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN6 2x2 CASE 506AP−01 ISSUE B DATE 26 APR 2006 SCALE 4:1 D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 1. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL LEAD IS CONNECTED TO TERMINAL LEAD # 4. 2. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG. A B ÍÍÍ ÍÍÍ ÍÍÍ E PIN ONE REFERENCE DIM A A1 A3 b b1 D D2 E E2 e K L L2 J J1 0.10 C 2X 2X 0.10 C A3 0.10 C A 7X 0.08 C A1 C D2 6X L GENERIC MARKING DIAGRAM* SEATING PLANE 4X 1 1 6 2 XX M 5 3 4 e L2 3 b1 XX = Specific Device Code M = Date Code 6X 0.10 C A E2 B *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.05 C NOTE 5 K 6 4 b J J1 SOLDERMASK DEFINED MOUNTING FOOTPRINT 6X 0.10 C A 0.05 C B NOTE 3 2.30 BOTTOM VIEW STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.25 0.35 0.51 0.61 2.00 BSC 1.00 1.20 2.00 BSC 1.10 1.30 0.65 BSC 0.15 REF 0.20 0.30 0.20 0.30 0.27 REF 0.65 REF STYLE 2: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR 1.10 6X 6X 0.35 0.43 1 0.60 1.25 0.35 0.34 0.65 PITCH DOCUMENT NUMBER: DESCRIPTION: 98AON20860D 6 PIN WDFN 2X2, 0.65P 0.66 DIMENSIONS: MILLIMETERS Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative