NTLUD3A50PZ
MOSFET – Power, Dual,
P-Channel, mCool, UDFN,
2.0x2.0x0.55 mm
-20 V, -5.6 A
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Features
• UDFN Package with Exposed Drain Pads for Excellent Thermal
•
•
•
Conduction
Low RDS(on)
Low Profile UDFN 2.0x2.0x0.55 mm for Board Space Saving
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MOSFET
V(BR)DSS
RDS(on) MAX
ID MAX
50 mW @ −4.5 V
70 mW @ −2.5 V
−20 V
−5.6 A
115 mW @ −1.8 V
175 mW @ −1.5 V
Applications
•
•
•
•
High Side Load Switch
Reverse Current Protection
Battery Switch
Optimized for Power Management Applications for Portable
Products, such as Cell Phones, PMP, DSC, GPS, and others
D1
G1
G2
S1
P−Channel MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Symbol
Value
Units
Drain-to-Source Voltage
VDSS
−20
V
Gate-to-Source Voltage
VGS
±8.0
V
ID
−4.4
A
Parameter
Continuous Drain
Current (Note 1)
Power Dissipation (Note 1)
Continuous Drain
Current (Note 2)
Steady
State
TA = 25°C
TA = 85°C
−3.2
t≤5s
TA = 25°C
−5.6
Steady
State
TA = 25°C
t≤5s
TA = 25°C
Steady
State
TA = 25°C
PD
W
2.2
ID
TA = 85°C
UDFN6
CASE 517BF
mCOOLt
1
AA MG
G
AA = Specific Device Code
M = Date Code
G = Pb−Free Package
A
−2.8
−2.0
TA = 25°C
PD
0.5
W
Pulsed Drain Current
tp = 10 ms
IDM
−13
A
Operating Junction and Storage
Temperature
TJ,
TSTG
-55 to
150
°C
ESD (HBM, JESD22−A114)
ESD (MM, JESD22−A114)
VESD
1400
200
V
Source Current (Body Diode) (Note 2)
IS
−1.0
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces) based on both FETs on.
May, 2019 − Rev. 2
6
(Note: Microdot may be in either location)
Power Dissipation (Note 2)
© Semiconductor Components Industries, LLC, 2014
S2
MARKING
DIAGRAM
1
1.4
D2
1
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
NTLUD3A50PZ/D
NTLUD3A50PZ
2. Surface-mounted on FR4 board using the minimum recommended pad size
of 30 mm2, 1 oz. Cu based on both FETs on.
THERMAL RESISTANCE RATINGS
Symbol
Max
Units
Junction-to-Ambient – Steady State (Note 3)
RθJA
91
°C/W
Junction-to-Ambient – t ≤ 5 s (Note 3)
RθJA
57
Junction-to-Ambient – Steady State min Pad (Note 4)
RθJA
228
Parameter
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
−20
Typ
Max
Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = −250 mA, ref to 25°C
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V,
VDS = −20 V
Gate-to-Source Leakage Current
IGSS
VDS = 0 V, VGS = ±5.0 V
VGS(TH)
VGS = VDS, ID = −250 mA
V
−13
TJ = 25°C
mV/°C
−1.0
mA
±5.0
mA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temp. Coefficient
Drain-to-Source On Resistance
Forward Transconductance
VGS(TH)/TJ
−0.4
−1.0
3.0
RDS(on)
gFS
V
mV/°C
mW
VGS = −4.5 V, ID = −4.0 A
37
50
VGS = −2.5 V, ID = −3.0 A
46
70
VGS = −1.8 V, ID = −2.0 A
63
115
VGS = −1.5 V, ID = −1.0 A
86
175
VDS = −5.0 V, ID = −3.0 A
16
S
920
pF
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
CISS
VGS = 0 V, f = 1 MHz,
VDS = −15 V
COSS
CRSS
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate-to-Source Charge
QGS
Gate-to-Drain Charge
QGD
85
80
nC
10.4
VGS = −4.5 V, VDS = −15 V;
ID = −3.0 A
0.5
1.2
3.0
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
ns
7.0
VGS = −4.5 V, VDD = −15 V,
ID = −3.0 A, RG = 1 W
tf
12
39
30
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
VGS = 0 V,
IS = −1.0 A
TJ = 25°C
−0.67
TJ = 125°C
−0.56
−1.0
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) based on both FETs on.
4. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm2, 1 oz. Cu based on both FETs on.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTLUD3A50PZ
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS
tRR
12.1
Charge Time
ta
6.4
Discharge Time
tb
Reverse Recovery Time
Reverse Recovery Charge
VGS = 0 V, dis/dt = 100 A/ms,
IS = −1.0 A
QRR
ns
5.7
4.0
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) based on both FETs on.
4. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm2, 1 oz. Cu based on both FETs on.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
NTLUD3A50PZ
TYPICAL CHARACTERISTICS
20
−ID, DRAIN CURRENT (A)
VGS = −2.5 V
14
−2 V
12
−1.8 V
10
8
6
−1.5 V
4
2
1.0
1.5
2.0
2.5
3.0
3.5
4.0
14
12
10
TJ = 25°C
8
6
TJ = 125°C
4
0
4.5
TJ = −55°C
1
1.5
2
2.5
−VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
TJ = 25°C
0.18
ID = −4.0 A
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
1.0
0.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.5
0.20
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.20
−1.5 V
0.18
TJ = 25°C
0.16
0.14
−1.8 V
0.12
0.10
0.08
−2.5 V
0.06
0.04
0.02
VGS = −4.5 V
0
2
4
6
8
10
12
14
16
18
20
−VGS, GATE VOLTAGE (V)
−ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.5
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
16
2
0
0.0
1.4
VDS = −5 V
18
−3.0 V
16
−ID, DRAIN CURRENT (A)
20
−4.5 to −3.5 V
18
100000
VGS = −4.5 V
ID = −4.0 A
−IDSS, LEAKAGE (nA)
1.3
1.2
1.1
1.0
0.9
TJ = 125°C
10000
TJ = 85°C
1000
0.8
0.7
−50
−25
0
25
50
75
100
125
150
100
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
20
NTLUD3A50PZ
VGS = 0 V
TJ = 25°C
f = 1 MHz
C, CAPACITANCE (pF)
1600
1400
1200
Ciss
1000
800
600
400
Coss
200
0
Crss
0
2
4
6
8
10
12
14
16
18
20
5
15
4
VDS
9
2
QGD
QGS
0
VDS = −15 V
ID = −3.0 A
TJ = 25°C
0
2
8
10
0
12
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
−IS, SOURCE CURRENT (A)
t, TIME (ns)
6
QG, TOTAL GATE CHARGE (nC)
td(off)
100
tf
tr
td(on)
10
1
10
TJ = 125°C
1.0
TJ = 25°C
0.1
0.3
100
TJ = −55°C
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1.1
100
0.85
ID = −250 mA
−ID, DRAIN CURRENT (A)
0.75
0.65
−VGS(th) (V)
4
3
10.0
VGS = −4.5 V
VDD = −15 V
ID = −3.0 A
0.55
0.45
0.35
0.25
0.15
50
6
1
Figure 7. Capacitance Variation
1.0
12
VGS
3
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
18
QT
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1800
−VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
25
0
25
50
75
100
125
10
1
0.1
0.01
0.1
150
100 ms
1 ms
10 ms
0 ≤ VGS ≤ −8 V
Single Pulse
TC = 25°C
dc
RDS(on) Limit
Thermal Limit
Package Limit
1
10
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Threshold Voltage
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
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5
100
NTLUD3A50PZ
R(t), EFFECTIVE TRANSIENT THERMAL
RESPONSE (°C/W)
TYPICAL CHARACTERISTICS
100
90
RqJA = 91°C/W
Steady State
80
70
60
50 Duty Cycle = 0.5
40
30
20
10
0.2
0.05
0.02
0.01
0.1
0
1E−06
Single Pulse
1E−05
1E−04
1E−03
1E−02
1E−01
t, TIME (s)
1E+00
1E+01
1E+02
1E+03
Figure 13. FET Thermal Response
DEVICE ORDERING INFORMATION
Package
Shipping†
NTLUD3A50PZTAG
UDFN6
(Pb−Free)
3000 / Tape & Reel
NTLUD3A50PZTBG
UDFN6
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517BF
ISSUE B
DATE 20 AUG 2012
SCALE 4:1
D
PIN ONE
REFERENCE
0.10 C
0.10 C
ÉÉ
ÇÇ
ÇÇ
A
B
PLATING
ÍÍ
ÍÍ
ÍÍ
MOLD CMPD
DETAIL B
OPTIONAL
CONSTRUCTIONS
E
L
TOP VIEW
A
A3
0.10 C
0.08 C
DIM
A
A1
A3
b
D
D2
E
E2
e
F
K
L
L1
L
L1
DETAIL B
DETAIL A
OPTIONAL
CONSTRUCTIONS
A1
NOTE 4
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÇÇ
ÉÉ
ÉÉ
EXPOSED Cu
C
SIDE VIEW
GENERIC
MARKING DIAGRAM*
SEATING
PLANE
1
0.10 C A
1
B
D2
F
D2
DETAIL A
3
L
E2
6
K
4
6X
0.10 C A
BOTTOM VIEW
B
0.05 C
XXMG
G
XX = Specific Device Code
M = Date Code
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”,
may or may not be present.
RECOMMENDED
MOUNTING FOOTPRINT
b
0.10 C A
e
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.25
0.35
2.00 BSC
0.57
0.77
2.00 BSC
0.90
1.10
0.65 BSC
0.15 BSC
0.25 REF
0.20
0.30
--0.10
B
1.74
NOTE 3
2X
0.77
1.10
6X 0.47
2.30
PACKAGE
OUTLINE
1
6X 0.35
0.65
PITCH
DIMENSIONS: MILLIMETERS
DOCUMENT NUMBER:
DESCRIPTION:
98AON48159E
UDFN6 2X2, 0.65P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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