NTMJS0D8N04CLTWG

MOSFET – Power, Single N-Channel 40 V, 0.72 mW, 368 A NTMJS0D8N04CL Features • • • • • www.onsemi.com Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses LFPAK8 Package, Industry Standard These Devices are Pb−Free and are RoHS Compliant V(BR)DSS Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS 20 V ID 368 A Continuous Drain Current RqJC (Notes 1, 3) Steady State Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) TC = 25°C TC = 100°C TC = 25°C 260 PD TC = 100°C Steady State Power Dissipation RqJA (Notes 1, 2) Pulsed Drain Current TA = 25°C TA = 100°C TA = 25°C G (4) W 180 S (1,2,3) A 56 PD MARKING DIAGRAM 2.1 900 A TJ, Tstg −55 to +175 °C IS 150 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 32.8 A) EAS 1286 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Source Current (Body Diode) N−CHANNEL MOSFET W 4.2 IDM Operating Junction and Storage Temperature Range D (5−8) 40 TA = 100°C TA = 25°C, tp = 10 ms 368 A 1.15 mW @ 4.5 V 90 ID ID MAX 0.72 mW @ 10 V 40 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter RDS(ON) MAX Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. D D D D 0D8N04 CL ALLYW LFPAK8 CASE 760AA 1 S S S G 0D8N04CL = Specific Device Code A = Assembly Location LL = Wafer Lot Y = Year W = Work Week THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Case − Steady State RqJC 0.83 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 35.9 ORDERING INFORMATION See detailed ordering, marking and shipping information on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2019 November, 2019 − Rev. 0 1 Publication Order Number: NTMJS0D8N04CL/D NTMJS0D8N04CL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 18 VGS = 0 V, VDS = 40 V mV/°C TJ = 25°C 10 TJ = 125°C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 mA 100 mA nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 1.2 2.0 −5.7 VGS = 10 V ID = 50 A 0.60 0.72 VGS = 4.5 V ID = 50 A 0.91 1.15 gFS VDS =15 V, ID = 50 A V mV/°C mW 500 S pF CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS 9600 Output Capacitance COSS 4690 Reverse Transfer Capacitance CRSS VGS = 0 V, f = 1 MHz, VDS = 25 V 119 nC Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 32 V; ID = 50 A 78 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 32 V; ID = 50 A 162 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Plateau Voltage VGP 2.7 V td(ON) 36 ns 14 VGS = 10 V, VDS = 32 V; ID = 50 A 25 29 SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(OFF) VGS = 4.5 V, VDS = 32 V, ID = 50 A, RG = 2.5 W tf 50 81 37 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD VGS = 0 V, IS = 50 A TJ = 25°C 0.73 TJ = 125°C 0.6 tRR ta tb 83 VGS = 0 V, dIs/dt = 100 A/ms, IS = 50 A QRR 1.2 V ns 53 30 163 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NTMJS0D8N04CL TYPICAL CHARACTERISTICS 360 240 VGS = 3.2 V 200 160 120 80 2.4 V 2.8 V 40 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 280 1 3 2 4 5 200 TJ = 25°C 160 120 80 TJ = 125°C 0 2.5 2.0 1.5 1.0 4 5 3 4 5 6 7 8 10 9 VGS, GATE−TO−SOURCE VOLTAGE (V) 2.0 TJ = 25°C 1.8 1.6 1.4 1.2 VGS = 4.5 V 1.0 0.8 VGS = 10 V 0.6 0.4 50 100 150 200 250 300 350 400 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.9 1E+09 VGS = 10 V ID = 50 A TJ = 175°C 1E+08 TJ = 150°C 1E+07 TJ = 125°C 1E+06 TJ = 85°C IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 3 Figure 2. Transfer Characteristics 3.0 1.5 1.3 1E+05 1.1 TJ = 25°C 1E+04 0.9 0.7 0.5 −50 2 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 25°C ID = 50 A 1.7 1 TJ = −55°C VDS, DRAIN−TO−SOURCE VOLTAGE (V) 3.5 2 240 Figure 1. On−Region Characteristics 4.0 0.5 320 280 40 0 2.6 V 0 VDS = 10 V 360 3.6 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 400 10 V to 4 V 320 1E+03 −25 0 25 50 75 100 125 150 175 1E+02 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NTMJS0D8N04CL TYPICAL CHARACTERISTICS CISS 10K C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 100K COSS 1K 100 0 5 10 15 20 25 30 35 t, SWITCHING TIME (ns) 4 QGS QGD 3 2 1 0 0 20 40 60 80 100 120 140 VGS = 0 V tr td(on) VGS = 10 V VDS = 32 V ID = 50 A 10 20 30 40 50 160 1000 10 100 10 1 0.1 0.01 TJ = 175°C 0.001 60 0 0.2 TJ = −55°C TJ = 25°C 0.4 0.6 0.8 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 1000 100 10 ms TC = 25°C Single Pulse VGS ≤ 10 V 1 1 ms 10 ms RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 TJ(initial) = 25°C 100 IPEAK (A) ID, DRAIN CURRENT (A) 5 Figure 8. Gate−to−Source Voltage vs. Total Charge 100 0.1 6 Figure 7. Capacitance Variation tf 10 7 QG, TOTAL GATE CHARGE (nC) td(off) 0 8 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 TJ = 25°C ID = 50 A VDS = 32 V 9 40 IS, SOURCE CURRENT (A) 10 CRSS VGS = 0 V TJ = 25°C f = 1 MHz 10 TJ(initial) = 100°C 10 100 ms 100 1000 1 0.0001 0.001 0.01 VDS, DRAIN−TO−SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Drain Current vs. Time in Avalanche www.onsemi.com 4 NTMJS0D8N04CL TYPICAL CHARACTERISTICS RqJA(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (°C/W) 100 Duty Cycle = 0.5 0.2 0.1 0.05 1 0.02 10 0.01 0.1 0.01 0.001 Single Pulse 0.000001 0.00001 0.0001 0.001 0.01 1 0.1 10 100 1000 t, PULSE TIME (s) Figure 13. Transient Thermal Impedance DEVICE ORDERING INFORMATION Device NTMJS0D8N04CLTWG Marking Package Shipping† 0D8N04CL LFPAK8 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS LFPAK8 5x6 CASE 760AA ISSUE C GENERIC MARKING DIAGRAM* XXXXXX XXXXXX AWLYW DOCUMENT NUMBER: DESCRIPTION: XXXXXX A WL Y W DATE 13 AUG 2019 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week *This information is generic. Please refer to device data sheet for actual part marking. Some products may not follow the Generic Marking. 98AON82475G LFPAK8 5x6 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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