NTMSD6N303,
NVMSD6N303
Power MOSFET
6 Amps, 30 Volts
N−Channel SO−8 FETKYt
http://onsemi.com
The FETKY product family incorporates low RDS(on) MOSFETs
packaged with an industry leading, low forward drop, low leakage
Schottky Barrier rectifier to offer high efficiency components in a
space saving configuration. Independent pinouts for MOSFET and
Schottky die allow the flexibility to use a single component for
switching and rectification functions in a wide variety of applications.
MOSFET
6.0 AMPERES
30 VOLTS
24 mW @ VGS = 10 V (Typ)
SCHOTTKY DIODE
6.0 AMPERES
30 VOLTS
420 mV @ IF = 3.0 A
Features
• These Devices are Pb−Free and are RoHS Compliant
• NVMSD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
A
A
Applications
•
•
•
•
•
•
•
S
Buck Converter
Buck−Boost
Synchronous Rectification
Low Voltage Motor Control
Battery Packs
Chargers
Cell Phones
G
C
C
6
D
3
D
4
5
(TOP VIEW)
SO−8
CASE 751
STYLE 18
Value
Unit
Drain−to−Source Voltage
VDSS
30
Vdc
Drain−to−Gate Voltage (RGS = 1.0 MW)
VDGR
30
Vdc
Gate−to−Source Voltage − Continuous
VGS
"20
Vdc
Drain Current − (Note 2)
− Continuous @ TA = 25°C
− Single Pulse (tp ≤ 10 ms)
ID
IDM
6.0
30
Adc
Apk
Total Power Dissipation @ TA = 25°C
(Note 2)
PD
2.0
Watts
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 30 Vdc, VGS = 5.0 Vdc,
VDS = 20 Vdc, IL = 9.0 Apk,
L = 10 mH, RG = 25 W)
EAS
325
mJ
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Pulse Test: Pulse Width ≤ 250 ms, Duty Cycle ≤ 2.0%.
2. Mounted on 2″ square FR4 board
(1 in sq, 2 oz. Cu 0.06″ thick single sided), 10 sec. max.
1
C
C
D D
E6N3x
AYWW G
G
1
Symbol
December, 2012 − Rev. 3
7
8
8
(TJ = 25°C unless otherwise noted) (Note 1)
© Semiconductor Components Industries, LLC, 2012
8
2
MARKING DIAGRAM &
PIN ASSIGNMENT
MOSFET MAXIMUM RATINGS
Rating
1
1
A A S G
E6N3 = Device Code
x
= Blank or S
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMSD6N303R2G
SO−8
2500/Tape & Reel
(Pb−Free)
NTMSD6N303R2SG
SO−8
2500/Tape & Reel
(Pb−Free)
NVMSD6N303R2G
SO−8
2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMSD6N303R2/D
NTMSD6N303, NVMSD6N303
SCHOTTKY RECTIFIER MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Peak Repetitive Reverse Voltage
DC Blocking Voltage
VRRM
VR
30
Volts
Average Forward Current (Note 3)
(Rated VR) TA = 104°C
IO
2.0
Amps
Peak Repetitive Forward Current (Note 3)
(Rated VR, Square Wave, 20 kHz) TA = 108°C
Ifrm
4.0
Amps
Non−Repetitive Peak Surge Current
(Surge applied at rated load conditions, half−wave, single phase, 60 Hz)
Ifsm
30
Amps
Thermal Resistance − Junction−to−Ambient (Note 4) − MOSFET
RqJA
167
°C/W
Thermal Resistance − Junction−to−Ambient (Note 5) − MOSFET
RqJA
97
Thermal Resistance − Junction−to−Ambient (Note 3) − MOSFET
RqJA
62.5
Thermal Resistance − Junction−to−Ambient (Note 4) − Schottky
RqJA
197
Thermal Resistance − Junction−to−Ambient (Note 5) − Schottky
RqJA
97
Thermal Resistance − Junction−to−Ambient (Note 3) − Schottky
RqJA
62.5
TJ, Tstg
−55 to +150
Rating
THERMAL CHARACTERISTICS − SCHOTTKY AND MOSFET
Operating and Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. Mounted on 2″ square FR4 board (1 in sq, 2 oz. Cu 0.06″ thick single sided), 10 sec. max.
4. Mounted with minimum recommended pad size, PC Board FR4.
5. Mounted on 2″ square FR4 board (1 in sq, 2 oz. Cu 0.06″ thick single sided), Steady State.
SCHOTTKY RECTIFIER ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristics
Symbol
VF
Maximum Instantaneous Forward Voltage (Note 6)
IF = 100 mAdc
IF = 3.0 Adc
IF = 6.0 Adc
Maximum Instantaneous Reverse Current (Note 6)
VR = 30 V
Maximum Voltage Rate of Change
VR = 30 V
6. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%
http://onsemi.com
2
IR
dV/dt
Value
Unit
TJ = 25°C
TJ = 125°C
0.28
0.42
0.50
0.13
0.33
0.45
TJ = 25°C
TJ = 125°C
250
−
−
25
10,000
Volts
mA
mA
V/ms
NTMSD6N303, NVMSD6N303
MOSFET ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
30
−
−
30
−
−
−
−
−
−
1.0
20
−
−
100
1.0
−
1.8
4.6
2.5
−
−
−
0.024
0.030
0.032
0.040
−
10
−
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 mA)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 24 Vdc, VGS = 0 Vdc, TJ = 25°C)
(VDS = 24 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
Gate−Body Leakage Current
(VGS = ±20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
nAdc
ON CHARACTERISTICS (Note 7)
Gate Threshold Voltage
(VDS = VGS, ID = 250 mAdc)
Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−State Resistance
(VGS = 10 Vdc, ID = 6 Adc)
(VGS = 4.5 Vdc, ID = 3.9 Adc)
RDS(on)
Forward Transconductance
(VDS = 15 Vdc, ID = 5.0 Adc)
gFS
Vdc
mV/°C
W
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 24 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Output Capacitance
Reverse Transfer Capacitance
Ciss
−
680
950
Coss
−
210
300
Crss
−
70
135
td(on)
−
9
18
tr
−
22
40
td(off)
−
45
80
tf
−
45
80
td(on)
−
13
30
tr
−
27
50
td(off)
−
22
40
pF
SWITCHING CHARACTERISTICS (Notes 7 & 8)
Turn−On Delay Time
(VDD = 15 Vdc, ID = 1 A,
VGS = 10 V,
RG = 6 W)
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
(VDD = 15 Vdc, ID = 1 A,
VGS = 4.5 V,
RG = 6 W)
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
(VDS = 15 Vdc,
VGS = 10 Vdc,
ID = 5 A)
ns
ns
tf
−
34
70
QT
−
19
30
Q1
−
2.4
−
Q2
−
5.0
−
Q3
−
4.3
−
VSD
−
−
0.75
0.62
1.0
−
Vdc
trr
−
26
−
ns
ta
−
11
−
tb
−
15
−
QRR
−
0.015
−
nC
BODY−DRAIN DIODE RATINGS (Note 7)
Diode Forward On−Voltage
(IS = 1.7 Adc, VGS = 0 V)
(IS = 1.7 Adc, VGS = 0 V, TJ = 150°C)
Reverse Recovery Time
(IS = 5 A, VGS = 0 V,
dIS/dt = 100 A/ms)
Reverse Recovery Stored Charge
(IS = 5 A, dIS/dt = 100 A/ms, VGS = 0 V)
7. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
8. Switching characteristics are independent of operating junction temperature.
http://onsemi.com
3
mC
NTMSD6N303, NVMSD6N303
TYPICAL MOSFET ELECTRICAL CHARACTERISTICS
12
TJ = 25°C
3.6 V
4V
3.8 V
ID, DRAIN CURRENT (AMPS)
10
3.2 V
8
6
3V
4
2.8 V
2
VGS = 2.6 V
0
0.2
0.05
0.4
0.6
0.8
1
1.2
1.4
2
1.8
1.6
2
TJ = 125°C
TJ = −55°C
0
1
2
4
3
5
Figure 2. Transfer Characteristics
T = 125°C
0.03
0.025
T = 25°C
0.02
T = −55°C
0.015
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
TJ = 25°C
4
Figure 1. On−Region Characteristics
0.035
1
6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.04
0.01
8
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
VGS = 10
0.045
VDS ≥ 10 V
10
0
2
3
4
5
6
7
8
9
10
11
12
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
3.4 V
10 V
6V
0.05
TJ = 25°C
0.045
0.04
0.035
VGS = 4.5 V
0.03
0.025
0.02
VGS = 10 V
0.015
0.01
1
2
4
3
5
7
6
8
9
10
11 12
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
and Temperature
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
10,000
1.8
1.6
VGS = 0 V
ID = 3 A
VGS = 10 V
IDSS, LEAKAGE (nA)
ID, DRAIN CURRENT (AMPS)
12
1.4
1.2
1
TJ = 150°C
1000
TJ = 125°C
100
0.8
0.6
−50
−25
0
25
50
75
100
125
10
150
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
http://onsemi.com
4
30
1400
C, CAPACITANCE (pF)
10
Ciss
TJ = 25°C
1200
1000
Crss
800
Ciss
600
400
Coss
200
Crss
0
VDS = 0 V
10
5
VGS = 0 V
0
5
10
15
20
VGS
VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
25
8
VGS
6
Q1
4
10
Q3
0
4
td(off)
tf
10
td(on)
1
10
14
16
18 20
0
2
1
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1.0
0.7
0.8
0.9
Figure 10. Diode Forward Voltage versus
Current
Mounted on 2″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″
thick single sided) with
one die operating,
1.0 ms
10 10 s max.
10 ms
VGS = 12 V
SINGLE PULSE
TC = 25°C
0.6
0.5
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (AMPS)
12
3
0
100
100
0.1
10
4
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
0.01
8
VGS = 0 V
TJ = 25°C
5
RG, GATE RESISTANCE (W)
0.1
6
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
2
Qg, TOTAL GATE CHARGE (nC)
tr
1
ID = 6 A
TJ = 25°C
6
VDD = 15 V
ID = 6 A
VGS = 10 V
100
1
Q2
2
0
20
VDS
Figure 7. Capacitance Variation
1000
30
QT
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1600
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
NTMSD6N303, NVMSD6N303
325
300
275
250
225
200
175
150
125
100
75
50
25
0
ID = 6 A
25
50
75
100
125
150
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
http://onsemi.com
5
NTMSD6N303, NVMSD6N303
TYPICAL FET ELECTRICAL CHARACTERISTICS
1.0
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
D = 0.5
0.1
0.2
0.1
0.05
0.02
0.0106 W 0.0431 W 0.1643 W 0.3507 W 0.4302 W
0.01
CHIP
JUNCTION
0.01
0.0253 F
0.1406 F
0.5064 F 2.9468 F 177.14 F
SINGLE PULSE
AMBIENT
0.001
0.00001
0.0001
0.001
0.01
0.1
t, TIME (s)
1.0
100
10
1000
Figure 13. FET Thermal Response
di/dt
IS
trr
ta
tb
TIME
0.25 IS
tp
IS
Figure 14. Diode Reverse Recovery Waveform
10
85°C
IF, INSTANTANEOUS FORWARD CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD CURRENT (AMPS)
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
25°C
-40°C
TJ = 125°C
1.0
0.1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
10
85°C
TJ = 125°C
25°C
1.0
0.1
0
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
Figure 15. Typical Forward Voltage
Figure 16. Maximum Forward Voltage
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6
0.8
NTMSD6N303, NVMSD6N303
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
IR, MAXIMUM REVERSE CURRENT (AMPS)
IR, REVERSE CURRENT (AMPS)
0.1
TJ = 125°C
0.01
85°C
0.001
0.0001
25°C
0.00001
0.000001
0.1
TJ = 125°C
0.01
0.001
25°C
0.0001
0.00001
0.000001
0
5.0
10
15
20
25
30
0
5.0
VR, REVERSE VOLTAGE (VOLTS)
IO , AVERAGE FORWARD CURRENT (AMPS)
10
15
25
20
dc
4.5
FREQ = 20 kHz
4.0
3.5
SQUARE WAVE
3.0
Ipk/Io = p
2.5
Ipk/Io = 5.0
2.0
1.5
Ipk/Io = 10
1.0
Ipk/Io = 20
0.5
0
0
30
20
40
60
80
100
120
TA, AMBIENT TEMPERATURE (°C)
Figure 19. Typical Capacitance
Figure 20. Current Derating
1.75
dc
1.50
SQUARE
WAVE
Ipk/Io = p
1.25
Ipk/Io = 5.0
1.00
Ipk/Io = 10
0.75
Ipk/Io = 20
0.50
0.25
0
0
30
5.0
VR, REVERSE VOLTAGE (VOLTS)
PFO , AVERAGE POWER DISSIPATION (WATTS)
C, CAPACITANCE (pF)
100
10
25
Figure 18. Maximum Reverse Current
1000
5.0
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 17. Typical Reverse Current
0
15
10
1.0
2.0
3.0
4.0
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 21. Forward Power Dissipation
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7
5.0
140
160
NTMSD6N303, NVMSD6N303
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
1.0
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
D = 0.5
0.2
0.1
0.1
NORMALIZED TO RqJA AT STEADY STATE (1″ PAD)
0.05
0.02
0.1010 W
CHIP
JUNCTION 39.422 mF
0.01
0.01
1.2674 W
27.987 W 30.936 W 36.930 W
493.26 mF 0.0131 F
0.2292 F 2.267 F
SINGLE PULSE
AMBIENT
0.001
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
t, TIME (s)
1.0E+00
1.0E+01
1.0E+02
Figure 22. Schottky Thermal Response
TYPICAL APPLICATIONS
STEP DOWN SWITCHING REGULATORS
LO
+
+
Vin
CO
-
Vout
LOAD
-
Buck Regulator
LO
+
+
Vin
CO
-
Vout
-
Synchronous Buck Regulator
http://onsemi.com
8
LOAD
1.0E+03
NTMSD6N303, NVMSD6N303
TYPICAL APPLICATIONS
STEP UP SWITCHING REGULATORS
L1
+
+
Vin
CO
Vout
LOAD
Q1
-
-
Boost Regulator
+
+
Vin
CO
-
Vout
LOAD
-
Buck−Boost Regulator
MULTIPLE BATTERY CHARGERS
Buck Regulator/Charger
Q1
Q2
LO
D2
BATT #1
+
Vin
D1
CO
-
Q3
D3
BATT #2
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9
NTMSD6N303, NVMSD6N303
TYPICAL APPLICATIONS
Li−Ion BATTERY PACK APPLICATIONS
Battery Pack
PACK +
Li-Ion
BATTERY
CELLS
SMART IC
DISCHARGE
CHARGE
Q1
Q2
PACK -
SCHOTTKY
SCHOTTKY
•
Applicable in battery packs which require a high current level.
•
During charge cycle Q2 is on and Q1 is off. Schottky can reduce power loss during fast charge.
•
During discharge Q1 is on and Q2 is off. Again, Schottky can reduce power dissipation.
•
Under normal operation, both transistors are on.
FETKY is a trademark of International Rectifier Corporation.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
8
1
SCALE 1:1
−X−
DATE 16 FEB 2011
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
8
8
1
1
IC
4.0
0.155
XXXXX
A
L
Y
W
G
IC
(Pb−Free)
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
XXXXXX
AYWW
1
1
Discrete
XXXXXX
AYWW
G
Discrete
(Pb−Free)
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
1.270
0.050
SCALE 6:1
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
8
8
XXXXX
ALYWX
G
XXXXX
ALYWX
1.52
0.060
0.6
0.024
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
7.0
0.275
DIM
A
B
C
D
G
H
J
K
M
N
S
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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SOIC−8 NB
CASE 751−07
ISSUE AK
DATE 16 FEB 2011
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. COLLECTOR
4. EMITTER
5. EMITTER
6. BASE
7. BASE
8. EMITTER
STYLE 2:
PIN 1. COLLECTOR, DIE, #1
2. COLLECTOR, #1
3. COLLECTOR, #2
4. COLLECTOR, #2
5. BASE, #2
6. EMITTER, #2
7. BASE, #1
8. EMITTER, #1
STYLE 3:
PIN 1. DRAIN, DIE #1
2. DRAIN, #1
3. DRAIN, #2
4. DRAIN, #2
5. GATE, #2
6. SOURCE, #2
7. GATE, #1
8. SOURCE, #1
STYLE 4:
PIN 1. ANODE
2. ANODE
3. ANODE
4. ANODE
5. ANODE
6. ANODE
7. ANODE
8. COMMON CATHODE
STYLE 5:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. DRAIN
5. GATE
6. GATE
7. SOURCE
8. SOURCE
STYLE 6:
PIN 1. SOURCE
2. DRAIN
3. DRAIN
4. SOURCE
5. SOURCE
6. GATE
7. GATE
8. SOURCE
STYLE 7:
PIN 1. INPUT
2. EXTERNAL BYPASS
3. THIRD STAGE SOURCE
4. GROUND
5. DRAIN
6. GATE 3
7. SECOND STAGE Vd
8. FIRST STAGE Vd
STYLE 8:
PIN 1. COLLECTOR, DIE #1
2. BASE, #1
3. BASE, #2
4. COLLECTOR, #2
5. COLLECTOR, #2
6. EMITTER, #2
7. EMITTER, #1
8. COLLECTOR, #1
STYLE 9:
PIN 1. EMITTER, COMMON
2. COLLECTOR, DIE #1
3. COLLECTOR, DIE #2
4. EMITTER, COMMON
5. EMITTER, COMMON
6. BASE, DIE #2
7. BASE, DIE #1
8. EMITTER, COMMON
STYLE 10:
PIN 1. GROUND
2. BIAS 1
3. OUTPUT
4. GROUND
5. GROUND
6. BIAS 2
7. INPUT
8. GROUND
STYLE 11:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 13:
PIN 1. N.C.
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 14:
PIN 1. N−SOURCE
2. N−GATE
3. P−SOURCE
4. P−GATE
5. P−DRAIN
6. P−DRAIN
7. N−DRAIN
8. N−DRAIN
STYLE 15:
PIN 1. ANODE 1
2. ANODE 1
3. ANODE 1
4. ANODE 1
5. CATHODE, COMMON
6. CATHODE, COMMON
7. CATHODE, COMMON
8. CATHODE, COMMON
STYLE 16:
PIN 1. EMITTER, DIE #1
2. BASE, DIE #1
3. EMITTER, DIE #2
4. BASE, DIE #2
5. COLLECTOR, DIE #2
6. COLLECTOR, DIE #2
7. COLLECTOR, DIE #1
8. COLLECTOR, DIE #1
STYLE 17:
PIN 1. VCC
2. V2OUT
3. V1OUT
4. TXE
5. RXE
6. VEE
7. GND
8. ACC
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 19:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. MIRROR 2
7. DRAIN 1
8. MIRROR 1
STYLE 20:
PIN 1. SOURCE (N)
2. GATE (N)
3. SOURCE (P)
4. GATE (P)
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 21:
PIN 1. CATHODE 1
2. CATHODE 2
3. CATHODE 3
4. CATHODE 4
5. CATHODE 5
6. COMMON ANODE
7. COMMON ANODE
8. CATHODE 6
STYLE 22:
PIN 1. I/O LINE 1
2. COMMON CATHODE/VCC
3. COMMON CATHODE/VCC
4. I/O LINE 3
5. COMMON ANODE/GND
6. I/O LINE 4
7. I/O LINE 5
8. COMMON ANODE/GND
STYLE 23:
PIN 1. LINE 1 IN
2. COMMON ANODE/GND
3. COMMON ANODE/GND
4. LINE 2 IN
5. LINE 2 OUT
6. COMMON ANODE/GND
7. COMMON ANODE/GND
8. LINE 1 OUT
STYLE 24:
PIN 1. BASE
2. EMITTER
3. COLLECTOR/ANODE
4. COLLECTOR/ANODE
5. CATHODE
6. CATHODE
7. COLLECTOR/ANODE
8. COLLECTOR/ANODE
STYLE 25:
PIN 1. VIN
2. N/C
3. REXT
4. GND
5. IOUT
6. IOUT
7. IOUT
8. IOUT
STYLE 26:
PIN 1. GND
2. dv/dt
3. ENABLE
4. ILIMIT
5. SOURCE
6. SOURCE
7. SOURCE
8. VCC
STYLE 29:
PIN 1. BASE, DIE #1
2. EMITTER, #1
3. BASE, #2
4. EMITTER, #2
5. COLLECTOR, #2
6. COLLECTOR, #2
7. COLLECTOR, #1
8. COLLECTOR, #1
STYLE 30:
PIN 1. DRAIN 1
2. DRAIN 1
3. GATE 2
4. SOURCE 2
5. SOURCE 1/DRAIN 2
6. SOURCE 1/DRAIN 2
7. SOURCE 1/DRAIN 2
8. GATE 1
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42564B
SOIC−8 NB
STYLE 27:
PIN 1. ILIMIT
2. OVLO
3. UVLO
4. INPUT+
5. SOURCE
6. SOURCE
7. SOURCE
8. DRAIN
STYLE 28:
PIN 1. SW_TO_GND
2. DASIC_OFF
3. DASIC_SW_DET
4. GND
5. V_MON
6. VBULK
7. VBULK
8. VIN
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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