NUP2115L, SZNUP2115L
ESD Protection Diode
Low Capacitance ESD Protection for
High Speed Data
The SZ/NUP2115L has been designed to protect the FlexRay
transceiver from ESD and other harmful transient voltage events. This
device provides bidirectional protection for each data line with a
single compact SOT−23 package, giving the system designer a low
cost option for improving system reliability and meeting stringent
EMI requirements.
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SOT−23
DUAL BIDIRECTIONAL
VOLTAGE SUPPRESSOR
200 W PEAK POWER
Features
•
•
•
•
•
•
•
•
•
•
200 W Peak Power Dissipation per Line (8/20 ms Waveform)
Diode Capacitance Matching
Low Reverse Leakage Current (< 100 nA)
Low Capacitance High−Speed FlexRay Data Rates
IEC Compatibility: − IEC 61000−4−2 (ESD): Level 4
− IEC 61000−4−4 (EFT): 50 A – 5/50 ns
− IEC 61000−4−5 (Lighting) 3.0 A (8/20 ms)
ISO 7637−1, Nonrepetitive EMI Surge Pulse 2, 8.0 A
(1/50 ms)
ISO 7637−3, Repetitive Electrical Fast Transient (EFT)
EMI Surge Pulses, 50 A (5/50 ns)
Flammability Rating UL 94 V−0
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These are Pb−Free Devices
SOT−23
CASE 318
STYLE 27
PIN 1
PIN 3
PIN 2
Applications
• Automotive Networks
♦
FlexRay Bus
MARKING DIAGRAM
25WMG
G
1
25W
M
G
= Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2005
October, 2017 − Rev. 4
1
Publication Order Number:
NUP2115L/D
NUP2115L, SZNUP2115L
MAXIMUM RATINGS (TJ = 25°C, unless otherwise specified)
Symbol
PPK
Rating
Peak Power Dissipation, 8 x 20 ms Double Exponential Waveform (Note 1)
Value
Unit
200
W
TJ
Operating Junction Temperature Range
−55 to 150
°C
TJ
Storage Temperature Range
−55 to 150
°C
TL
Lead Solder Temperature (10 s)
260
°C
Human Body Model (HBM)
Machine Model (MM)
IEC 61000−4−2 Specification (Contact)
8.0
400
30
kV
V
kV
ESD
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse per Figure 1.
ELECTRICAL CHARACTERISTICS (TJ = 25°C, unless otherwise specified)
Symbol
VRWM
VBR
Parameter
Test Conditions
Reverse Working Voltage
(Note 2)
Breakdown Voltage
IT = 1 mA (Note 3)
Min
Typ
Max
Unit
24
−
−
V
26.2
−
32
V
IR
Reverse Leakage Current
VRWM = 24 V
−
15
100
nA
VC
Clamping Voltage
IPP = 1 A (8/20 ms Waveform)
(Note 4)
−
33.4
36.6
V
VC
Clamping Voltage
IPP = 3 A (8/20 ms Waveform)
(Note 4)
−
44
50
V
IPP
Maximum Peak Pulse Current
8/20 ms Waveform (Note 4)
−
−
3.0
A
CJ
Capacitance
VR = 0 V, f = 1 MHz (Line to GND)
−
−
10
pF
DC
Diode Capacitance Matching
VR = 0 V, 5 MHz (Note 5)
−
0.1
2
%
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Surge protection devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater
than the DC or continuous peak operating voltage level.
3. VBR is measured at pulse test current IT.
4. Pulse waveform per Figure 1.
5. DC is the percentage difference between CJ of lines 1 and 2 measured according to the test conditions given in the electrical characteristics
table.
ORDERING INFORMATION
Package
Shipping†
NUP2115LT1G
SOT−23
(Pb−Free)
3,000 / Tape & Reel
SZNUP2115LT1G
SOT−23
(Pb−Free)
3,000 / Tape & Reel
NUP2115LT3G
SOT−23
(Pb−Free)
10,000 / Tape & Reel
SZNUP2115LT3G
SOT−23
(Pb−Free)
10,000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
NUP2115L, SZNUP2115L
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
% OF PEAK PULSE CURRENT
WAVEFORM
PARAMETERS
tr = 8 ms
td = 20 ms
90
80
c−t
70
IPP, PEAK PULSE CURRENT (A)
3.5
110
100
60
td = IPP/2
50
40
30
20
10
0
0
10
5
20
15
2.5
2.0
1.5
1.0
0.5
0.0
30
30
25
3.0
35
Figure 2. Clamping Voltage vs Peak Pulse Current
Figure 1. Pulse Waveform, 8 × 20 ms
50
9
45
40
125°C
7
35
25°C
6
IT, (mA)
C, CAPACITANCE (pF)
8
5
30
25
20
15
4
25°C
10
3
0
10
5
15
20
0
20
25
TA = −55°C
22
24
26
28
30
32
34
VBR, VOLTAGE (V)
Figure 4. VBR versus IT Characteristics
Figure 3. Typical Junction Capacitance vs
Reverse Voltage
120
25
−55°C
+25°C
TA = +150°C
100
PERCENT DERATING (%)
20
15
10
5
0
65°C
125°C
5
VR, REVERSE VOLTAGE (V)
VR, REVERSE BIAS VOLTAGE (V)
50
VC, CLAMPING VOLTAGE (V)
t, TIME (ms)
2
45
40
0
1
2
3
IL, LEAKAGE CURRENT (nA)
4
80
60
40
20
0
−60
5
Figure 5. IR versus Temperature Characteristics
−30
0
30
60
90
TEMPERATURE (°C)
120
150 180
Figure 6. Temperature Power Dissipation Derating
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3
NUP2115L, SZNUP2115L
APPLICATIONS
Figure 7 provides an example of a dual bidirectional surge
protection diode array that can be used for protection with
the FlexRay network. The bidirectional array is created from
four identical Zener surge protection diodes. The clamping
voltage of the composite device is equal to the breakdown
voltage of the diode that is reversed biased, plus the diode
drop of the second diode that is forwarded biased.
Surge protection diodes provide a low cost solution to
conducted and radiated Electromagnetic Interference (EMI)
and Electrostatic Discharge (ESD) noise problems. The
noise immunity level and reliability of FlexRay transceivers
can be easily increased by adding external surge protection
diodes to prevent transient voltage failures.
The NUP2115L provides a surge protection solution for
FlexRay data communication lines. The NUP2115L is a
dual bidirectional surge protection device in a compact
SOT−23 package. This device is based on Zener technology
that optimizes the active area of a PN junction to provide
robust protection against transient EMI surge voltage and
ESD.
Surge Protection Diode Protection Circuit
Surge protection diodes provide protection to a
transceiver by clamping a surge voltage to a safe level. surge
protection diodes have high impedance below and low
impedance above their breakdown voltage. A surge
protection Zener diode has its junction optimized to absorb
the high peak energy of a transient event, while a standard
Zener diode is designed and specified to clamp a
steady state voltage.
Figure 7. FlexRay Surge Protection Circuit
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318
ISSUE AT
DATE 01 MAR 2023
SCALE 4:1
GENERIC
MARKING DIAGRAM*
XXXMG
G
1
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318
ISSUE AT
DATE 01 MAR 2023
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. CATHODE
PIN 1. NO CONNECTION PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. ANODE
3. CATHODE−ANODE
3. GATE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
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