ALED8102S
Datasheet
8 channel LED driver with direct switch control
Features
HTSSOP16
(Exposed pad)
•
•
•
•
•
•
•
•
•
8 constant current output channels controlled by four switch inputs
Output enable input for global dimming
Output current: from 5 mA to 100 mA
Current programmable through external resistor
Supply voltage: 3 V to 5.5 V
Thermal shutdown
20 V current generator rated voltage
Available in high thermal efficiency HTSSOP exposed pad package
ESD protection 2.0 kV HBM, 100 V MM
Applications
•
Automotive LED interior and exterior lighting
–
Clusters
–
LCD back-light
–
Ambient light
–
Dome light
–
Rear combination light
Description
Maturity status link
ALED8102S
Device summary
Order code
ALED8102SXTTR
Package
HTSSOP16
Packing
2500 parts per reel
The ALED8102S is a monolithic, low voltage, 8 low-side channels. The ALED8102S
guarantees up to 20 V output driving capability allowing users to connect several
LEDs in series. In the output stage, 8 regulated current sources provide from 5 mA to
100 mA constant current to drive the LEDs. Current is programmed though a single
external resistor.
The ALED8102S is equipped with a thermal management that protects the device
forcing it in shutdown (typically: power-off at 170 °C with 15 °C hysteresis to restart).
The thermal protection switches OFF the output channels only.
The operative supply voltage range is between 3 V and 5.5 V. The output control is
provided by four switch inputs, proving an on/off toggle action suitable also for local
dimming. Moreover, on all active output LEDs brightness can be adjusted with a
global PWM signal applied to the output enable pin (OE). Outputs can be connected
in parallel, or left unconnected if not used, as required by the application.
DS12430 - Rev 1 - January 2018
For further information contact your local STMicroelectronics sales office.
www.st.com/
ALED8102S
Pin description
1
Pin description
Figure 1. Pinout for HTSSOP16
GND
VDD
SW1
R-EXT
SW2
OE
SW3
SW4
OUT0
OUT7
OUT1
OUT6
OUT2
OUT5
OUT3
OUT4
Table 1. Pin description
DS12430 - Rev 1
HTSSOP16
Symbol
Name and function
1
GND
Ground terminal
2
SW1
Providing local dimming capability
3
SW2
Providing local dimming capability
4
SW3
Providing local dimming capability
5-12
OUT0-OUT7
Output terminals
13
SW4
Providing local dimming capability
14
OE
Global PWM brightness control input terminal (it must be
connected to GND if not used)
15
R-EXT
Terminal for external resistor for constant current
programming
16
VDD
Supply voltage terminal
page 2/19
ALED8102S
Simplified internal block diagram
2
Simplified internal block diagram
Figure 2. ALED8102S simplified block diagram
SWx
DS12430 - Rev 1
page 3/19
ALED8102S
Absolute maximum ratings
3
Absolute maximum ratings
Stressing the device above the ratings listed in the table below may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or any other conditions above those indicated
in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 2. Absolute maximum ratings
3.1
Symbol
Parameter
Value
Unit
VDD
Supply voltage
0 to 7
V
VO
Output voltage
- 0.5 to 20
V
IO
Output current
100
mA
VI
Input voltage
-0.4 to VDD
V
IGND
GND terminal current
800
mA
ESD
Electrostatic discharge protection HBM human body model
±2
KV
Electrostatic discharge protection MM machine model
100
V
Thermal characteristics
Table 3. Thermal characteristics
Symbol
Parameter
Value
Unit
TJ
Operative junction temperature range
-40 to +150
°C
TSTG
Storage ambient temperature range
-55 to +150
Rthj-amb
Thermal resistance junction-ambient (HTSSOP16) (1)
37.5
°C/W
1. The exposed pad should be soldered directly to the PCB to realize the thermal benefits.
DS12430 - Rev 1
page 4/19
ALED8102S
Electrical characteristics
4
Electrical characteristics
VDD = 5 V, Tj = -40 to 125 °C, REXT = 386 Ω, VO = 0.85 V unless otherwise specified.
Table 4. Electrical characteristics
Symbol
Parameter
VDD
Supply voltage
VUVLO
UVLO threshold (rising)
Conditions
UVLO threshold (falling)
HyUVLO
UVLO hysteresis
VO
Output voltage (1)(2)
VIH
SWx / OE input voltage
Min.
Typ.
Max.
Unit
3.0
-
5.5
V
2.7
2.9
2.1
2.3
0.4
OUT0 – OUT7
VIL
0.85
-
19
0.8VDD
-
VDD
GND
-
0.2VDD
RUP
Pull-up resistor for OE pin
-
300
-
RDW
Pull-down resistor for SWx pins
-
310
-
REXT
External current set-up resistance
-
-
3.9
IDD(OFF1)
Supply current (OFF)
OUT0 to 7 = OFF
-
7
8
REXT = 190 Ω
-
14
16
-
14
16
VO from 1 V to 3 V;
-
0.1
-
VDD from 3 V to 5.5 V
-
1
-
IDD(OFF2)
KΩ
mA
OUT0 to 7 = OFF
IDD(ON)
Supply current (ON)
REXT = 190 Ω
VO = 1.4 V
OUT0 to 7 = ON
%/dVO
Output current vs. outputvoltage regulation
%/dVDD
Output current vs. supply voltage regulation (1)(4)
∆IOL
Output current precision: chip to chip (1)
-
-
±6
%
∆IOL1
Output current precision: channel to channel (1) (5)
-
±1.5
±4
%
VO = 1.4 V; REXT = 190 Ω
-
±1.2
±4
VO = 19 V OUTn = OFF
-
0.5
2
(1) (3)
∆IOL2
|%/V|
IOleak
Single output leakage current
µA
Tsd
Thermal shutdown (6)
170
°C
Tsd_hys
Thermal shutdown hysteresis (6)
15
°C
1. Test with just one output ON.
2. Minimum regulation voltage @ IO = 50 mA.
3.
4.
Δ % /V =
Δ % /V =
Ion@Von3.0V − Ion@Von1.0V
100
×
Ion@Von = 1.0V
3−1
Ion@VDD = 5.5V − Ion@VDD = 3.0V
100
×
5.5 − 1
Ion@VDD = 3.0V
5. ((IOn – IOavg0-7)/ IOavg0-7) x 100.
6. Not tested in production.
DS12430 - Rev 1
page 5/19
ALED8102S
Switching characteristics
5
Switching characteristics
VDD = 5 V, Tj = 25 °C, IO = 50 mA, RL = 60 Ω, CL = 10 pF, VL = 5 V, unless otherwise specified.
Table 5. Switching characteristics
Symbol
tPLH1
tPLH2
tPHL1
tPHL2
tON
tOFF
tW(OE)
Parameter
Conditions
Min.
Typ.
Max.
Unit
ns
SWx – OUTn
Propagation delay time
VDD = 3.3 V
-
220
-
(OE just “0”)
(“L” to “H”)
VDD = 5 V
-
200
-
OE - OUTn
Propagation delay time
VDD = 3.3 V
-
220
-
(SWx just “1”)
(“L” to “H”)
VDD = 5 V
-
200
-
SWx – OUTn
Propagation delay time
VDD = 3.3 V
-
100
-
(OE just “0”)
(“H” to “L”)
VDD = 5 V
-
100
-
OE - OUTn
Propagation delay time
VDD = 3.3 V
-
90
-
(SWx just “1”)
(“H” to “L”)
VDD = 5 V
-
100
-
OUTn Current rise time.
VDD = 3.3 V
-
430
-
Evaluated as OUTn falling time
VDD = 5 V
-
400
-
OUTn current fall time.
VDD = 3.3 V
-
430
-
Evaluated as OUTn rising time
VDD = 5 V
-
400
-
1
-
-
Output enable minimum pulse width
µs
Figure 3. tON - tOFF time evaluation
Figure 4. tPLH - tPHL time evaluation
DS12430 - Rev 1
page 6/19
ALED8102S
Simplified internal block diagram
6
Simplified internal block diagram
Inputs OE and SWx terminals have pull-up and pull-down connection respectively:
Figure 5. OE Terminal
VDD
300 KW
OE
1 KW
GND
Figure 6. SWx Terminals
VDD
1 KW
SWx
300 KW
GND
DS12430 - Rev 1
page 7/19
ALED8102S
The switch output control
7
The switch output control
All switch inputs (SWx) are pulled down by a 300 kΩ. If the generic SWx pin is left floating or connected to GND
or polarized at low logic level, the corresponding outputs are in OFF condition. If SWx pin is connected to VDD or
polarized at high logic level, the corresponding outputs are in ON condition. See below the complete truth table:
Table 6. Switch output control
Switch inputs
Outputs controlled (ON/OFF)
SW1
OUT0 and OUT1 simultaneously
SW2
OUT2 and OUT3 simultaneously
SW3
OUT4 and OUT5 simultaneously
SW4
OUT6 and OUT7 simultaneously
Table 7. Switches vs. output truth table
DS12430 - Rev 1
SW4
SW3
SW2
SW1
OE
Out0
Out1
Out2
Out3
Out4
Out5
Out6
Out7
0
0
0
0
x
off
off
off
off
off
off
off
off
0
0
0
1
0
on
on
off
off
off
off
off
off
0
0
1
0
0
off
off
on
on
off
off
off
off
0
0
1
1
0
on
on
on
on
off
off
off
off
0
1
0
0
0
off
off
off
off
on
on
off
off
0
1
0
1
0
on
on
off
off
on
on
off
off
0
1
1
0
0
off
off
on
on
on
on
off
off
0
1
1
1
0
on
on
on
on
on
on
off
off
1
0
0
0
0
off
off
off
off
off
off
on
on
1
0
0
1
0
on
on
off
off
off
off
on
on
1
0
1
0
0
off
off
on
on
off
off
on
on
1
0
1
1
0
on
on
on
on
off
off
on
on
1
1
0
0
0
off
off
off
off
on
on
on
on
1
1
0
1
0
on
on
off
off
on
on
on
on
1
1
1
0
0
off
off
on
on
on
on
on
on
1
1
1
1
0
on
on
on
on
on
on
on
on
x
x
x
x
1
off
off
off
off
off
off
off
off
page 8/19
ALED8102S
Typical characteristics
8
Typical characteristics
Figure 7. ISET vs. dropout voltage (VDROP @ 25 °C)
910
810
Vdrop (mV)
710
610
Vdd 5.0 V
Vdd 3.0 V
510
410
310
210
110
10
0
10
20
30
40
50
60
70
80
90
100 110
Iset (mA)
Table 8. Table settings
Vdd
Iset (mA)
Rext (Ω)
VDROP min. (mV)
VDROP max. (mV)
VDROP AVG (mV)
3
5
3930
46.5
52.9
48.63
10
1910
80.9
100
82.26
20
963
150
161
157
50
386
392
396
394.3
80
241
636
646
640.3
100
192
846
850
848
5
3930
40.8
41.7
41.16
10
1910
80.1
105
89.2
20
963
153
154
154
5
DS12430 - Rev 1
50
386
379
386
382
80
241
618
626
621
100
192
825
830
827
page 9/19
ALED8102S
Typical application
9
Typical application
Figure 8. Typical application circuit
Typical application circuit
The figure above shows a typical application schematic for the ALED8102S, Cled value depends on common rail
voltage connection length and driver total output current, typically it is around 47 µF; Cin is about 1 µF; current
setting resistor depends on output current set (ex. with REXT = 386 Ω → IO ≈ 50 mA). The external programming
resistor between R-EXT and GND should be connected as close as possible to the device.
To have the proper device functionality, it is strongly suggested to follow a correct power-up sequence: VDD and
VLED power supplies must be provided simultaneously or at least, VDD must be connected before VLED so to
activate all internal digital control blocks earlier than LEDs power supply. If VLED anticipates driver VDD, this could
result in a visible flash on connected LEDs (output stage undesired activation).
Device thermal management
The aim of this section is to provide some recommendation that can be useful to design the application PCB for a
better power dissipation:
•
•
•
•
•
•
•
To decrease the device working temperature, the package exposed pad needs soldering to the board.
To improve thermal performance at least a 4-layer (e.g. 2S2P) PCB should be used.
The copper area below the package thermal pad should be as wide as possible also outside the package
perimeter (using the package sides without pins)
A reasonable number of vias must connect the copper area below the package to all available PCB layers
especially just below the device package (e.g. 3x3 or 4x3 vias array) but also outside the package perimeter.
The smaller and closely spaced vias are, the better solution is. The best implementation is represented by
copper filled vias.
On each inner layer a copper area must be provided for dissipation (wider it is better, if possible at least 4
times or more the package dimensions). A good condition is to have at least a power layer as an entire
copper area (e.g. GND layer)
Traces for pin connection must be as wide as layout constrains allow
Several devices in power dissipation on the same board must be properly spaced.
Figure 9 shows, once the maximum power dissipation is fixed, which ambient temperature range can be covered
according to the maximum junction temperature and package thermal resistance: 37.5 °C/W for HTSSOP16 on
DS12430 - Rev 1
page 10/19
ALED8102S
Typical application
Jedec PCB (2S2P) and conditions. With the same thermal resistance, figure 10 shows the junction temperature
as a function of ambient temperature considering 1 W of power dissipation.
Figure 9. Power dissipation rating vs. ambient temperature (Rth = 37.5 °C/W; Tj = 125 °C)
5.00
4.50
4.00
Tj=125 °C
Rth=37.5 °C/W
Pd [ W ]
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
-40
-20
0
20
40
60
80
100
120
140
Ta [ °C ]
Figure 10. Junction temperature vs. ambient temperature (Rth = 37.5°C/W; Pd = 1 W)
140
120
Tj [ °C/W ]
100
80
Pd=1W
Rth=37.5 °C/W
60
40
20
0
-40
-20
0
20
40
60
80
100
120
140
Ta [ °C ]
DS12430 - Rev 1
page 11/19
ALED8102S
Package information
10
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS12430 - Rev 1
page 12/19
ALED8102S
HTSSOP16 package information
10.1
HTSSOP16 package information
Figure 11. HTSSOP16 exposed pad package outline
7419276_B
Table 9. HTSSOP16 exposed pad mechanical data
Dim.
mm
Min.
Max.
A
1.20
A1
0.15
A2
0.80
b
0.19
0.30
c
0.09
0.20
D
4.90
5.00
5.10
D1
2.80
3.00
3.20
E
6.20
6.40
6.60
E1
4.30
4.40
4.50
E2
2.80
3.00
3.20
e
L
k
aaa
1.00
1.05
0.65
0.45
L1
DS12430 - Rev 1
Typ.
0.60
0.75
1.00
0.00
8.00
0.10
page 13/19
ALED8102S
HTSSOP16 packing information
10.2
HTSSOP16 packing information
Figure 12. HTSSOP16 tape and reel outline
Table 10. HTSSOP16 tape and reel mechanical data
Dim.
mm
Min.
A
Max.
330
C
12.8
D
20.2
N
60
T
DS12430 - Rev 1
Typ.
13.2
22.4
Ao
6.7
6.9
Bo
5.3
5.5
Ko
1.6
1.8
Po
3.9
4.1
P
7.9
8.1
page 14/19
ALED8102S
Revision history
Table 11. Document revision history
DS12430 - Rev 1
Date
Version
29-Jan-2018
1
Changes
Initial release.
page 15/19
ALED8102S
Contents
Contents
1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Simplified internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6
Simplified internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7
The switch output control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
8
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
9
Typical application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
10
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
10.1
HTSSOP16 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10.2
HTSSOP16 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
DS12430 - Rev 1
page 16/19
ALED8102S
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Pin description. . . . . . . . . . . . . . . . . . . .
Absolute maximum ratings . . . . . . . . . . .
Thermal characteristics. . . . . . . . . . . . . .
Electrical characteristics . . . . . . . . . . . . .
Switching characteristics. . . . . . . . . . . . .
Switch output control . . . . . . . . . . . . . . .
Switches vs. output truth table . . . . . . . . .
Table settings . . . . . . . . . . . . . . . . . . . .
HTSSOP16 exposed pad mechanical data
HTSSOP16 tape and reel mechanical data
Document revision history . . . . . . . . . . . .
DS12430 - Rev 1
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page 17/19
ALED8102S
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
DS12430 - Rev 1
Pinout for HTSSOP16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ALED8102S simplified block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
tON - tOFF time evaluation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
tPLH - tPHL time evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OE Terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SWx Terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ISET vs. dropout voltage (VDROP @ 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power dissipation rating vs. ambient temperature (Rth = 37.5 °C/W; Tj = 125 °C)
Junction temperature vs. ambient temperature (Rth = 37.5°C/W; Pd = 1 W) . . . .
HTSSOP16 exposed pad package outline . . . . . . . . . . . . . . . . . . . . . . . . . . .
HTSSOP16 tape and reel outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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page 18/19
ALED8102S
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12430 - Rev 1
page 19/19
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