STB130N6F7

STB130N6F7 N-channel 60 V, 4.2 mΩ typ., 80 A STripFET™ F7 Power MOSFET in a D²PAK package Datasheet - production data Features TAB Order code VDS RDS(on) max. ID PTOT STB130N6F7 60 V 5.0 mΩ 80 A 160 W • • • • 3 1 Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness D2PAK Applications • Figure 1: Internal schematic diagram Switching applications Description This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. D(2, TAB) G(1) S(3) AM01475v1_Tab Table 1: Device summary Order code Marking Package Packing STB130N6F7 130N6F7 D²PAK Tape and reel July 2015 DocID027380 Rev 3 This is information on a product in full production. 1/14 www.st.com Contents STB130N6F7 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 5 3 Test circuits ..................................................................................... 7 4 Package information ....................................................................... 8 5 2/14 4.1 D²PAK type A package information ................................................... 8 4.2 D²PAK packing information ............................................................. 11 Revision history ............................................................................ 13 DocID027380 Rev 3 STB130N6F7 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ±20 V Drain current (continuous) at Tcase = 25 °C 80 Drain current (continuous) at Tcase = 100 °C 80 IDM Drain current (pulsed) 320 A PTOT Total dissipation at Tcase = 25 °C 160 W (3) EAS Single pulse avalanche energy 200 mJ -55 to 175 °C Value Unit (1) ID (2) Tstg Storage temperature Tj Operating junction temperature A Notes: (1) (2) (3) Current is limited by package. Pulse width is limited by safe operating area. starting Tj = 25 °C, ID = 20 A, VDD = 40 V. Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb (1) Thermal resistance junction-ambient 0.94 30 °C/W Notes: (1) When mounted on a 1-inch² FR-4, 2 Oz copper board. DocID027380 Rev 3 3/14 Electrical characteristics 2 STB130N6F7 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 4: Static Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage VGS = 0 V, ID = 1 mA IDSS Zero gate voltage drain current VGS = 0 V, VDS = 60 V 1 µA IGSS Gate-body leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 40 A 4.2 5.0 mΩ Min. Typ. Max. Unit - 2600 - - 1200 - - 115 - - 42 - - 13.6 - - 13 - Test conditions Min. Typ. Max. VDD = 30 V, ID = 40 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Switching times test circuit for resistive load" and Figure 18: "Switching time waveform") - 24 - - 44 - - 62 - - 24 - Min. Typ. Max. Unit 1.2 V V(BR)DSS 60 V 2 Table 5: Dynamic Symbol Ciss Parameter Test conditions Input capacitance VDS = 25 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 30 V, ID = 80 A, VGS = 10 V (see Figure 14: "Gate charge test circuit") pF nC Table 6: Switching times Symbol td(on) tr td(off) tf Parameter Turn-on delay time Rise time Turn-off delay time Fall time Unit ns Table 7: Source-drain diode Symbol (1) VSD Parameter Test conditions Forward on voltage VGS = 0 V, ISD = 80 A - trr Reverse recovery time - 50 ns Qrr Reverse recovery charge - 56 nC IRRM Reverse recovery current ISD = 80 A, di/dt = 100 A/µs, VDD = 48 V (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 2.2 A Notes: (1) 4/14 Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DocID027380 Rev 3 STB130N6F7 2.1 Electrical characteristics Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID027380 Rev 3 5/14 Electrical characteristics STB130N6F7 Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics 6/14 DocID027380 Rev 3 STB130N6F7 3 Test circuits Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID027380 Rev 3 7/14 Package information 4 STB130N6F7 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. 4.1 D²PAK type A package information Figure 19: D²PAK (TO-263) type A package outline 0079457_A_rev22 8/14 DocID027380 Rev 3 STB130N6F7 Package information Table 8: D²PAK (TO-263) type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10 E1 8.50 8.70 8.90 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 0.4 0° DocID027380 Rev 3 8° 9/14 Package information STB130N6F7 Figure 20: D²PAK (TO-263) recommended footprint (dimensions are in mm) 10/14 DocID027380 Rev 3 STB130N6F7 4.2 Package information D²PAK packing information Figure 21: Tape DocID027380 Rev 3 11/14 Package information STB130N6F7 Figure 22: Reel T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 9: D²PAK tape and reel mechanical data Tape Reel mm mm Dim. 12/14 Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 Max. 330 13.2 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID027380 Rev 3 26.4 30.4 STB130N6F7 5 Revision history Revision history Table 10: Document revision history Date Revision Changes 23-Jan-2015 1 First release. 16-Jun-2015 2 Datasheet promoted from preliminary data to production data Text and formatting edits throughout document In Section Electrical ratings: - updated Table Absolute maximum ratings In Section Electrical characteristics: - updated and renamed Table Static (was On/off states) - updated Table Switching times - updated Table Source drain diode Added Section Electrical characteristics (curves) 08-Jul-2015 3 In Section Electrical characteristics (curves): - updated Figures Output characteristics and Transfer characteristics DocID027380 Rev 3 13/14 STB130N6F7 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 14/14 DocID027380 Rev 3