STD6N60DM2
Datasheet
N-channel 600 V, 0.95 Ω typ., 5 A MDmesh™ DM2 Power MOSFET in a DPAK
package
Features
TAB
2 3
1
•
•
•
•
•
•
DPAK
D(2, TAB)
Order code
VDS
RDS(on) max.
ID
PTOT
STD6N60DM2
600 V
1.10 Ω
5A
60 W
Fast-recovery body diode
Extremely low gate charge and input capacitance
Low on-resistance
100% avalanche tested
Extremely high dv/dt ruggedness
Zener-protected
G(1)
Applications
•
S(3)
Switching applications
AM01475V1
Description
This high-voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast
recovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined
with low RDS(on), rendering it suitable for the most demanding high-efficiency
converters and ideal for bridge topologies and ZVS phase-shift converters.
Product status link
STD6N60DM2
Product summary
Order code
STD6N60DM2
Marking
6N60DM2
Package
DPAK
Packing
Tape and reel
DS12202 - Rev 2 - June 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD6N60DM2
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
VGS
Gate-source voltage
Value
Unit
±25
V
Drain current (continuous) at Tcase = 25 °C
5
Drain current (continuous) at Tcase = 100 °C
3.2
IDM (1)
Drain current (pulsed)
20
A
PTOT
Total dissipation at Tcase = 25 °C
60
W
dv/dt(2)
Peak diode recovery voltage slope
50
dv/dt(3)
MOSFET dv/dt ruggedness
50
Tstg
Storage temperature range
ID
Tj
Operating junction temperature range
A
V/ns
-55 to 150
°C
1. Pulse width is limited by safe operating area.
2. ISD ≤ 5 A, di/dt = 900 A/μs; VDS peak < V(BR)DSS, VDD = 480 V.
3. VDS ≤ 480 V.
Table 2. Thermal data
Symbol
Rthj-case
Rthj-pcb
(1)
Parameter
Value
Thermal resistance junction-case
2.08
Thermal resistance junction-pcb
50
Unit
°C/W
1. When mounted on a 1-inch² FR-4, 2 Oz copper board.
Table 3. Avalanche characteristics
Symbol
IAR (1)
EAS
(2)
Parameter
Value
Unit
Avalanche current, repetitive or not repetitive
1.7
A
Single pulse avalanche energy
132
mJ
1. Pulse width limited by Tjmax.
2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V.
DS12202 - Rev 2
page 2/19
STD6N60DM2
Electrical characteristics
2
Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 4. Static
Symbol
V(BR)DSS
Parameter
Drain-source breakdown
voltage
Test conditions
VGS = 0 V, ID = 1 mA
Min.
Typ.
Max.
600
Unit
V
VGS = 0 V, VDS = 600 V
1
VGS = 0 V, VDS = 600 V,
Tcase = 125 °C (1)
100
±5
µA
4
4.75
V
0.95
1.10
Ω
Unit
IDSS
Zero gate voltage drain
current
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source onresistance
VGS = 10 V, ID = 2.5 A
3.25
µA
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
-
274
-
-
15
-
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer capacitance
-
2
-
Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V
-
25
-
pF
-
6.5
-
Ω
-
6.2
-
-
1.8
-
-
2.7
-
Coss eq. (1)
RG
Intrinsic gate resistance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
VDS = 100 V, f = 1 MHz, VGS = 0 V
f = 1 MHz, ID = 0 A
VDD = 480 V, ID = 5 A, VGS = 0 to
10 V (see Figure 14. Test circuit for
gate charge behavior)
pF
nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.
Table 6. Switching times
Symbol
td(on)
tr
td(off)
tf
DS12202 - Rev 2
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD = 300 V, ID = 2.5 A RG = 4.7 Ω,
VGS = 10 V (see Figure 13. Test
circuit for resistive load switching
times and Figure 18. Switching time
waveform)
Min.
Typ.
Max.
-
9.2
-
-
5.6
-
-
12
-
-
19.6
-
Unit
ns
page 3/19
STD6N60DM2
Electrical characteristics
Table 7. Source-drain diode
Symbol
ISD
ISDM (1)
(2)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Source-drain current
-
5
A
Source-drain current (pulsed)
-
20
A
1.6
V
Forward on voltage
VGS = 0 V, ISD = 5 A
-
trr
Reverse recovery time
-
60
ns
Qrr
Reverse recovery charge
-
135
nC
IRRM
Reverse recovery current
ISD = 5 A, di/dt = 100 A/µs,
VDD = 60 V (see Figure 15. Test
circuit for inductive load switching and
diode recovery times )
-
4.5
A
ISD = 5 A, di/dt = 100 A/µs,
VDD = 60 V, Tj = 150 °C (see Figure
15. Test circuit for inductive load
switching and diode recovery times )
-
132
ns
-
429
nC
-
6.5
A
VSD
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DS12202 - Rev 2
page 4/19
STD6N60DM2
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characteristics
Figure 4. Transfer characteristics
ID
(A)
GIPD200620171223OCH
VGS = 9, 10 V
VGS = 8 V
8
ID
(A)
GIPD200620171234TCH
VDS = 20 V
8
VGS = 7 V
6
6
4
4
VGS = 6 V
2
2
VGS = 5 V
0
0
DS12202 - Rev 2
4
8
12
16
20
VDS (V)
0
4
5
6
7
8
VGS (V)
page 5/19
STD6N60DM2
Electrical characteristics (curves)
Figure 5. Gate charge vs gate-source voltage
VGS
(V)
GIPD200620171351QVG VDS
(V)
VDD = 480 V
ID = 5 A
12
10
600
500
VDS
Figure 6. Static drain-source on-resistance
RDS(on)
(Ω)
GIPD200620171401RID
1.01
VGS = 10 V
0.99
8
400
6
300
4
200
2
100
0.93
0
Qg (nC)
0.91
0
0.97
0
0
1
2
3
4
5
6
7
Figure 7. Capacitance variations
C
(pF)
0.95
1
2
3
4
5
ID (A)
Figure 8. Output capacitance stored energy
EOSS
(µJ)
GIPD200620171408CVR
GIPD270620171145EOS
2
10
3
1.6
CISS
10 2
1.2
0.8
10 1
COSS
CRSS
10 0
10 -1
10 0
10 1
10 2
VDS (V)
Figure 9. Normalized gate threshold voltage vs
temperature
VGS(th)
(norm.)
GIPD200620171427VTH
200
300
400
500
600
VDS (V)
Figure 10. Normalized on-resistance vs temperature
RDS(on)
(norm.)
GIPD200620171437RON
VGS = 10 V
1.5
0.9
1
0.8
0.5
0.7
DS12202 - Rev 2
100
2
1
0.6
-75
0
0
2.5
ID = 250 µA
1.1
0.4
-25
25
75
125
Tj (°C)
0
-75
-25
25
75
125
Tj (°C)
page 6/19
STD6N60DM2
Electrical characteristics (curves)
Figure 11. Source-drain diode forward characteristics
VSD
(V)
GIPD200620171441SDF
Tj = -50 °C
1.1
Figure 12. Normalized V(BR)DSS vs temperature
VGS(th)
(norm.)
GIPD200620171444VTH
1.1
1
ID = 1 mA
1.05
Tj = 25 °C
0.9
1
0.8
Tj = 150 °C
0.95
0.7
0.9
0.6
0.5
0
DS12202 - Rev 2
1
2
3
4
5
ISD (A)
0.85
-75
-25
25
75
125
Tj (°C)
page 7/19
STD6N60DM2
Test circuits
2.2
Test circuits
Figure 13. Test circuit for resistive load switching times
Figure 14. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 15. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
B
B
3.3
µF
D
G
+
VD
100 µH
fast
diode
B
Figure 16. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
V(BR)DSS
ton
VD
td(on)
90%
IDM
tf
90%
10%
10%
0
ID
VDD
toff
td(off)
tr
VDD
VGS
0
VDS
90%
10%
AM01472v1
AM01473v1
DS12202 - Rev 2
page 8/19
STD6N60DM2
Package information
3
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
DS12202 - Rev 2
page 9/19
STD6N60DM2
DPAK (TO-252) type A package information
3.1
DPAK (TO-252) package information
Figure 19. DPAK (TO-252) type A package outline
0068772_A_25
DS12202 - Rev 2
page 10/19
STD6N60DM2
DPAK (TO-252) type A package information
Table 8. DPAK (TO-252) type A mechanical data
Dim.
mm
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.64
0.90
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
D1
4.95
E
6.40
E1
4.60
4.70
4.80
e
2.159
2.286
2.413
e1
4.445
4.572
4.699
H
9.35
10.10
L
1.00
1.50
(L1)
2.60
2.80
3.00
L2
0.65
0.80
0.95
L4
0.60
R
V2
DS12202 - Rev 2
Typ.
5.10
5.25
6.60
1.00
0.20
0°
8°
page 11/19
STD6N60DM2
DPAK (TO-252) type C package information
3.2
DPAK (TO-252) type C package information
Figure 20. DPAK (TO-252) type C package outline
0068772_C_25
DS12202 - Rev 2
page 12/19
STD6N60DM2
DPAK (TO-252) type C package information
Table 9. DPAK (TO-252) type C mechanical data
Dim.
mm
Min.
Typ.
Max.
A
2.20
2.30
2.38
A1
0.90
1.01
1.10
A2
0.00
0.10
b
0.72
0.85
b4
5.13
c
0.47
0.60
c2
0.47
0.60
D
6.00
D1
5.25
E
6.50
E1
4.70
e
5.46
6.10
6.20
6.60
6.70
2.186
2.286
2.386
H
9.80
10.10
10.40
L
1.40
1.50
1.70
L1
L2
2.90 REF
0.90
L3
L4
1.25
0.51 BSC
0.60
L6
DS12202 - Rev 2
5.33
0.80
1.00
1.80 BSC
θ1
5°
7°
9°
θ2
5°
7°
9°
V2
0°
8°
page 13/19
STD6N60DM2
DPAK (TO-252) type C package information
Figure 21. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25_C
DS12202 - Rev 2
page 14/19
STD6N60DM2
DPAK (TO-252) packing information
3.3
DPAK (TO-252) packing information
Figure 22. DPAK (TO-252) tape outline
10 pitches cumulative
tolerance on tape +/- 0.2 mm
T
P0
Top cover
tape
P2
D
E
F
B1
K0
For machine ref. only
including draft and
radii concentric around B0
W
B0
A0
P1
D1
User direction of feed
R
Bending radius
User direction of feed
AM08852v1
DS12202 - Rev 2
page 15/19
STD6N60DM2
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) reel outline
T
40mm min.
access hole
at slot location
B
D
C
N
A
G measured
at hub
Tape slot
in core for
tape start
2.5mm min.width
Full radius
AM06038v1
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape
Dim.
mm
mm
Dim.
Min.
Max.
A0
6.8
7
A
B0
10.4
10.6
B
1.5
12.1
C
12.8
1.6
D
20.2
G
16.4
50
B1
DS12202 - Rev 2
Reel
Min.
Max.
330
13.2
D
1.5
D1
1.5
E
1.65
1.85
N
F
7.4
7.6
T
K0
2.55
2.75
P0
3.9
4.1
Base qty.
2500
P1
7.9
8.1
Bulk qty.
2500
P2
1.9
2.1
R
40
T
0.25
0.35
W
15.7
16.3
18.4
22.4
page 16/19
STD6N60DM2
Revision history
Table 11. Document revision history
DS12202 - Rev 2
Date
Revision
Changes
26-Jun-2017
1
First release
05-Jun-2018
2
Updated Table 5. Dynamic and Section 3.2 DPAK (TO-252) type C package
information.
page 17/19
STD6N60DM2
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.1
DPAK (TO-252) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2
DPAK (TO-252) type C package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
DS12202 - Rev 2
page 18/19
STD6N60DM2
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12202 - Rev 2
page 19/19
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