STD7ANM60N

STB7ANM60N, STD7ANM60N Datasheet Automotive-grade N-channel 600 V, 0.8 Ω typ., 5 A MDmesh™ II Power MOSFETs in D²PAK and DPAK packages Features TAB Order code TAB STB7ANM60N 2 3 2 1 3 STD7ANM60N 1 VDS RDS(on) max. ID 600 V 0.9 Ω 5A Package D²PAK DPAK DPAK D2PAK • • • • D(2, TAB) G(1) AEC-Q101 qualified 100% avalanche tested Low input capacitance and gate charge Low gate input resistance Applications • Switching applications S(3) AM01475v1_noZen Description These devices are N-channel Power MOSFETs developed using the second generation of MDmesh™ technology. These revolutionary Power MOSFETs associate a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. They are therefore suitable for the most demanding high-efficiency converters. Product status link STB7ANM60N STD7ANM60N Product summary Order code STB7ANM60N Marking 7ANM60N Package D²PAK Packing Tape and reel Order code STD7ANM60N Marking 7ANM60N Package DPAK Packing Tape and reel DS9116 - Rev 3 - November 2018 For further information contact your local STMicroelectronics sales office. www.st.com STB7ANM60N, STD7ANM60N Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 600 V VGS Gate-source voltage ±25 V Drain current (continuous) at TC = 25 °C 5 A Drain current (continuous) at TC = 100 °C 3 A Drain current (pulsed) 20 A Total power dissipation at TC = 25 °C 45 W Peak diode recovery voltage slope 15 V/ns -55 to 150 °C ID ID IDM (1) PTOT dv/dt (2) Tj Operating junction temperature range Tstg Storage temperature range 1. Pulse width limited by safe operating area. 2. ISD ≤ 5 A, di/dt ≤ 400 A/μs, VDSpeak ≤ V(BR)DSS, VDD = 80% V(BR)DSS. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-pcb (1) Thermal resistance junction-pcb Value D²PAK DPAK 2.78 35 Unit °C/W 50 °C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu. Table 3. Avalanche characteristics Symbol DS9116 - Rev 3 Parameter IAS Avalanche current, repetitive or not-repetitive (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAS, VDD = 50 V) Value Unit 2 A 119 mJ page 2/20 STB7ANM60N, STD7ANM60N Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions Min. ID = 1 mA, VGS = 0 V Typ. 600 Zero gate voltage drain current IGSS Gate body leakage current VDS = 0 V, VGS = ±20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on resistance VGS = 10 V, ID = 2.5 A VGS = 0 V, VDS = 600 V, TC = 125 °C 1 µA 100 µA ±100 nA 3 4 V 0.8 0.9 Ω Typ. Max. Unit - pF (1) 2 Unit V VGS = 0 V, VDS = 600 V IDSS Max. 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Test conditions Min. 363 VDS = 50 V, f = 1 MHz, VGS = 0 V - 24.6 1.1 Coss eq. (1) Equivalent capacitance time related VDS = 0 to 480 V, VGS = 0 V - 130 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 5.4 - Ω Qg Total gate charge Qgs Gate-source charge - nC Qgd Gate-drain charge VDD = 480 V, ID = 5 A, VGS = 0 to 10 V (see Figure 15. Test circuit for gate charge behavior) 14 - 2.7 7.7 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS9116 - Rev 3 Parameter Test conditions Turn-on delay time VDD = 300 V, ID = 2.5 A, Rise time RG = 4.7 Ω, VGS = 10 V Turn-off delay time (see Figure 14. Test circuit for resistive load switching times and Figure 19. Switching time waveform) Fall time Min. Typ. Max. Unit - ns 7 - 10 26 12 page 3/20 STB7ANM60N, STD7ANM60N Electrical characteristics Table 7. Source-drain diode Symbol Parameter Test conditions ISD Source-drain current ISDM (1) Source-drain current (pulsed) VSD (2) Forward on voltage ISD = 5 A, VGS = 0 V trr Reverse recovery time ISD = 5 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V (see Figure 16. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 5 A, di/dt = 100 A/µs Qrr Reverse recovery charge IRRM Reverse recovery current VDD = 60 V, Tj = 150 °C(see Figure 16. Test circuit for inductive load switching and diode recovery times) Min. Typ. Max. Unit 5 - 20 - - - 1.3 A V 213 ns 1.5 μC 14 A 265 ns 1.8 μC 14 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. DS9116 - Rev 3 page 4/20 STB7ANM60N, STD7ANM60N Electrical characteristics curves 2.1 Electrical characteristics curves Figure 1. Safe operating area for D²PAK Figure 2. Thermal impedance for D²PAK AM06476v1 ID ) on 10µs D S( O Li p e r m at ite io d ni by n m th is ax a R re a is 10 1 100µs 1ms Tj=150°C Tc=25°C 0.1 10ms S ingle puls e 0.01 0.1 1 VDS 100 Figure 3. Safe operating area for DPAK ID Figure 4. Thermal impedance for DPAK ) 10µs D S( on Li p e r m at ite io d ni by n m th is ax a R re a is AM06474v1 100µs O 0 1ms Tj=150°C Tc=25°C -1 10ms S ingle puls -2 -1 0 2 DS Figure 5. Output characterisics AM06477v1 ID (A) 9 VGS =10V AM06478v1 ID 9 6V 8 Figure 6. Transfer characteristics VDS =20V 8 7 7 6 6 5 5 4 4 5V 3 3 2 2 1 1 0 0 0 DS9116 - Rev 3 10 20 40 VDS (V) 0 4 8 VGS (V) page 5/20 STB7ANM60N, STD7ANM60N Electrical characteristics curves Figure 7. Gate charge vs gate-source voltage AM06479v1 VGS (V) VDD=480V ID=5A 12 VDS (V) 500 VDS 10 AM06480v1 R DS (on) (Ohm ) VGS =10V 0.88 0.86 400 8 300 6 200 4 0.84 0.82 0.80 0.78 100 2 0 Figure 8. Static drain-source on-resistance 0 2 6 4 8 0 14 16 Q g (nC) 10 12 Figure 9. Capacitance variations 0.76 0.74 2 1 0 3 4 5 ID(A) Figure 10. Output capacitance stored energy AM06482v1 E os s (µJ ) 2.5 103 2.0 1.5 102 1.0 101 0.5 100 10-1 101 100 0 0 102 Figure 11. Normalized gate threshold voltage vs temperature AM06483v1 VGS (th) (norm) 1.10 100 200 300 500 600 VDS (V) Figure 12. Normalized on-resistance vs temperature AM06484v1 R DS (on) (norm) ID=2.5A 2.1 ID=250µA 400 1.9 1.7 1.00 1.5 1.3 0.90 1.1 0.9 0.80 0.7 0.70 -50 DS9116 - Rev 3 -25 0 25 50 75 100 TJ (°C) 0.5 -50 -25 0 25 50 75 100 TJ (°C) page 6/20 STB7ANM60N, STD7ANM60N Electrical characteristics curves Figure 13. Normalized V(BR)DSS vs temperature AM06485v1 V(BR)DSS (norm) ID=1mA 1.07 1.05 1.03 1.01 0.99 0.97 0.95 0.93 -50 -25 DS9116 - Rev 3 0 25 50 75 100 TJ (°C) page 7/20 STB7ANM60N, STD7ANM60N Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 17. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 19. Switching time waveform Figure 18. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS9116 - Rev 3 page 8/20 STB7ANM60N, STD7ANM60N Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS9116 - Rev 3 page 9/20 STB7ANM60N, STD7ANM60N D²PAK (TO-263) type A package information 4.1 D²PAK (TO-263) type A package information Figure 20. D²PAK (TO-263) type A package outline 0079457_25 DS9116 - Rev 3 page 10/20 STB7ANM60N, STD7ANM60N D²PAK (TO-263) type A package information Table 8. D²PAK (TO-263) type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.30 8.50 8.70 E2 6.85 7.05 7.25 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 DS9116 - Rev 3 Typ. 0.40 0° 8° page 11/20 STB7ANM60N, STD7ANM60N DPAK (TO-252) type A package information 4.2 DPAK (TO-252) type A package information Figure 21. DPAK (TO-252) type A package outline 0068772_A_26 DS9116 - Rev 3 page 12/20 STB7ANM60N, STD7ANM60N DPAK (TO-252) type A package information Table 9. DPAK (TO-252) type A mechanical data Dim. mm Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 4.60 4.70 4.80 e 2.159 2.286 2.413 e1 4.445 4.572 4.699 H 9.35 10.10 L 1.00 1.50 (L1) 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 R V2 DS9116 - Rev 3 Typ. 5.10 5.25 6.60 1.00 0.20 0° 8° page 13/20 STB7ANM60N, STD7ANM60N DPAK (TO-252) type A package information Figure 22. DPAK (TO-252) type A recommended footprint (dimensions are in mm) FP_0068772_26 DS9116 - Rev 3 page 14/20 STB7ANM60N, STD7ANM60N D²PAK and DPAK packing information 4.3 D²PAK and DPAK packing information Figure 23. Tape outline DS9116 - Rev 3 page 15/20 STB7ANM60N, STD7ANM60N D²PAK and DPAK packing information Figure 24. Reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 10. D²PAK tape and reel mechanical data Tape Dim. DS9116 - Rev 3 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 16/20 STB7ANM60N, STD7ANM60N D²PAK and DPAK packing information Table 11. DPAK tape and reel mechanical data Tape Dim. mm mm Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 DS9116 - Rev 3 Reel Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 18.4 22.4 page 17/20 STB7ANM60N, STD7ANM60N Revision history Table 12. Document revision history Date Version 21-Jun-2012 1 Changes First release. – Modified: title, Features and Table 1 in cover page 12-Dec-2013 2 – Modified: Figure 15, 16, 17 and 18 – Updated: Table 10 and Figure 23, 24 – Minor text changes Removed maturity status indication from cover page. The document status is production data. 07-Nov-2018 3 Modified Table 4. On/off states. Updated Section 4 Package information. Minor text changes. DS9116 - Rev 3 page 18/20 STB7ANM60N, STD7ANM60N Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 D²PAK (TO-263) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 D²PAK and DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 DS9116 - Rev 3 page 19/20 STB7ANM60N, STD7ANM60N IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS9116 - Rev 3 page 20/20