STD90N03L
STD90N03L-1
N-channel 30V - 0.005Ω - 80A - DPAK/IPAK
STripFET™ III Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STD90N03L
STD90N03L-1
30V
30V
0.0057Ω
0.0057Ω
80A (1)
80A (1)
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3
3
2
1. Pulse width limited by safe operating area
■
RDS(on)*Qg industry’s benchmark
■
Conduction losses reduced
■
Switching losses reduced
■
Low threshold device
1
IPAK
Description
This device utilizes the latest advanced design
rules of ST’s proprietary STripFET™ technology.
This is suitable for the most demanding DC-DC
converter application where high efficiency is to
be achieved.
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Applications
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DPAK
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Switching applications
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Order codes
Part number
Marking
Package
Packaging
STD90N03L
D90N03L
DPAK
Tape & reel
STD90N03L-1
D90N03L-1
IPAK
Tube
October 2006
Rev1
1/16
www.st.com
16
Content
STD90N03L - STD90N03L-1
Content
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuit
................................................ 8
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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STD90N03L - STD90N03L-1
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Unit
VDS
Drain-source voltage (VGS = 0)
30
V
VGS
Gate-source voltage
±20
V
ID(1)
Drain current (continuous) at TC = 25°C
80
A
ID
Drain current (continuous) at TC=100°C
64
A
Drain current (pulsed)
320
Total dissipation at TC = 25°C
95
IDM
(2)
PTOT
Derating factor
0.63
EAS(3)
Single pulse avalanche energy
350
TJ
Operating junction temperature
Storage temperature
Tstg
2. Pulse width limited by safe operating area
Starting Tj = 25°C, ID =40A, VDD =15V
Table 2.
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Thermal data
Symbol
t
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u
Parameter
Rthj-amb
Thermal resistance junction-ambient max
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Pr
du
W/°C
mJ
-55 to 175
°C
Value
Unit
1.58
°C/W
100
°C/W
275
°C
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Thermal resistance junction-case max
Tj
W
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Rthj-case
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1. Value limited by wire bonding
3.
Value
Maximum lead temperature for soldering
purpose
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3/16
Electrical characteristics
2
STD90N03L - STD90N03L-1
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 3.
On/off states
Symbol
V(BR)DSS
Parameter
Drain-source breakdown
voltage
IGSS
Gate body leakage current
(VDS = 0)
VGS = ±20V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250µA
RDS(on)
Static drain-source on
resistance
VGS= 10V, ID= 40A
Coss
Qg
Qgs
Qgd
ete
Gate input resistance
Switching times
Symbol
Parameter
td(off)
tf
4/16
c
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d
Total gate charge
Gate-source charge
Gate-drain charge
Table 5.
tr
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Parameter
o
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P
RG
td(on)
VGS= 5V, ID= 40A
Turn-on delay time
Rise time
Turn-off delay time
Fall time
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Test conditions
)-
t(s
Crss
Typ.
Max.
30
Pr
Min.
(see Figure 13)
f=1MHz Gate Bias
Bias=0 Test Signal
Level=20mV
open drain
VDD=15V, ID=40A,
RG=4.7Ω, VGS=5V
(see Figure 12)
nA
V
0.005 0.0057
0.007 0.0011
Typ.
22
10
7
VGS =5V
(see Figure 12)
±100
Max.
2805
549
76
VDD=15V, ID = 80A
RG=4.7Ω, VGS=5V
µA
µA
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1
VGS=0
VDD=15V, ID=40A,
1
10
)
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VDS =25V, f=1MHz,
Test conditions
Unit
V
VDS = 30V, Tc=125°C
Dynamic
Input capacitance
Output capacitance
Reverse transfer
capacitance
Ciss
Min.
VDS = 30V
Zero gate voltage drain
current (VGS = 0)
Symbol
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ID = 250µA, VGS= 0
IDSS
Table 4.
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Test conditions
Typ.
Unit
pF
pF
pF
32
nC
nC
nC
Ω
1.2
Min.
Ω
Ω
Max.
Unit
19
135
ns
ns
24
33
ns
ns
STD90N03L - STD90N03L-1
Table 6.
Source drain diode
Symbol
ISD
ISDM
(1)
VSD(2)
trr
Qrr
IRRM
Electrical characteristics
Parameter
Test conditions
Min.
Typ.
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
ISD=40A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=80A, di/dt = 100A/µs,
VDD=19 V, Tj= 150°C
(see Figure 15)
36
32
1.8
Max.
Unit
80
320
A
A
1.3
V
ns
µC
A
)
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1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
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Electrical characteristics
STD90N03L - STD90N03L-1
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
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Figure 3.
Output characteristics
Figure 4.
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Transfer characteristics
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Figure 5.
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6/16
Static drain-source on resistance
Figure 6.
Normalized BVDSS vs temperature
STD90N03L - STD90N03L-1
Figure 7.
Electrical characteristics
Gate charge vs gate-source voltage Figure 8.
Capacitance variations
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Figure 9.
Normalized gate threshold voltage
vs temperature
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Figure 10. Normlaized on resistance vs
temperature
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Figure 11. Source-drain diode forward
characteristics
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Test circuit
3
STD90N03L - STD90N03L-1
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
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Figure 14. Test circuit for inductive load
Figure 15. Unclamped Inductive load test
switching and diode recovery times
circuit
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STD90N03L - STD90N03L-1
Appendix A
Figure 16. Buck Converter: Power Losses Estimation
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The power losses associated with the FETs in a Synchronous Buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the working
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
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The low side (SW2) device requires:
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■
Very low RDS(on) to reduce conduction losses
■
Small Qgls to reduce the gate charge losses
■
Small Coss to reduce losses due to output capacitance
■
Small Qrr to reduce losses on SW1 during its turn-on
■
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
■
voltage to avoid the cross conduction phenomenon;
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The high side (SW1) device requires:
■
Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on the
gate
■
Small Qg to have a faster commutation and to reduce gate charge losses
■
Low RDS(on) to reduce the conduction losses.
9/16
STD90N03L - STD90N03L-1
Table 7.
Power losses calculation
High Side Switching (SW1)
Low Side Switch (SW2)
R DS(on)SW1 * I 2L * δ
R DS(on)SW2 * I 2L * (1 − δ )
Pconduction
Vin * (Q gsth(SW1) + Q gd(SW1) ) * f *
Pswitching
Recovery
(1)
Not applicable
Conduction
Not applicable
IL
Ig
Zero voltage switching
)
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Vin * Q rr(SW2) * f
Pdiode
Pgate(QG)
Q g(SW1) * Vgg * f
Vin * Q oss(SW1) * f
PQoss
)
(s
1. Dissipated by SW1 during turn-on
Meaning
Duty-cycle
Pr
Qgsth
Qgls
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10/16
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Paramiters meaning
Parameter
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Q
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2
Table 8.
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Vf(SW2) * I L * t deadtime * f
Post threshold gate charge
Third quadrant gate charge
Pconduction
On state losses
Pswitching
On-off transition losses
Pdiode
Conduction and reverse recovery diode losses
Pgate
Gate drive losses
PQoss
Output capacitance losses
gls(SW2)
* Vgg * f
Vin * Q oss(SW2) * f
2
STD90N03L - STD90N03L-1
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data
STD90N03L - STD90N03L-1
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
B2
5.2
5.4
0.204
B3
)
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0.031
0.212
0.85
B5
0.033
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0.3
0.012
B6
0.95
r
P
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0.45
C2
0.48
0.6
0.019
D
6
6.2
0.236
0.244
E
6.4
6.6
0.252
0.260
G
4.4
4.6
H
15.9
L
9
L1
0.8
0.6
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16.3
9.4
1.2
)-
L2
0.8
0.023
0.023
0.173
0.181
0.626
0.641
0.354
0.370
0.031
0.047
1
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c
0.031
0.039
H
C2
A3
A
C
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A1
t
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B5
=
=
2
G
=
1
=
E
B2
=
3
B
B3
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L
D
B6
L2
=
r
P
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0.017
0.037
C
L1
0068771-E
12/16
STD90N03L - STD90N03L-1
Package mechanical data
DPAK MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
A1
A2
B
b4
C
C2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
TYP
2.2
0.9
0.03
0.64
5.2
0.45
0.48
6
MAX.
MIN.
2.4
1.1
0.23
0.9
5.4
0.6
0.6
6.2
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
6.6
0.252
5.1
r
P
e
4.7
2.28
4.6
10.1
2.8
0.8
1
-O
8°
0.173
0.368
0.039
t
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0.6
)
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0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
)
s
(
ct
0.260
0.185
0.090
4.4
9.35
1
0°
MAX.
u
d
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0.200
6.4
0.2
TYP.
0.110
0.031
0.023
0°
0.181
0.397
0.039
0.008
8°
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0068772-F
13/16
Packaging mechanical data
5
STD90N03L - STD90N03L-1
Packaging mechanical data
DPAK FOOTPRINT
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All dimensions are in millimeters
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TAPE AND REEL SHIPMENT
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REEL MECHANICAL DATA
DIM.
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TAPE MECHANICAL DATA
DIM.
14/16
inch
MIN.
MAX.
A0
6.8
7
0.267 0.275
B0
10.4
10.6
0.409 0.417
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Pr
mm
B1
D
1.5
D1
1.5
E
1.65
MIN.
MAX.
12.1
0.476
1.6
0.059 0.063
1.85
0.065 0.073
0.059
F
7.4
7.6
0.291 0.299
K0
2.55
2.75
0.100 0.108
0.153 0.161
P0
3.9
4.1
P1
7.9
8.1
0.311 0.319
P2
1.9
2.1
0.075 0.082
R
40
W
15.7
1.574
16.3
0.618
0.641
s
b
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mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
16.4
N
50
T
MAX.
inch
MIN.
MAX.
330
12.992
13.2
0.504 0.520
18.4
0.645 0.724
0.059
0.795
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
2500
STD90N03L - STD90N03L-1
6
Revision history
Revision history
Table 9.
Revision history
Date
Revision
20-Oct-2006
1
Changes
Initial release.
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Revision history
STD90N03L - STD90N03L-1
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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