STL130N6F7

STL130N6F7

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    PowerFLAT-8

  • 描述:

    MOS管 N-Channel VDS=60V VGS=±20V ID=130A Pd=125W POWERFLAT 5X6

  • 详情介绍
  • 数据手册
  • 价格&库存
STL130N6F7 数据手册
STL130N6F7 N-channel 60 V, 0.003 Ω typ., 130 A STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features     Order code VDS RDS(on) max ID STL130N6F7 60 V 0.0035 Ω 130 A Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications Figure 1: Internal schematic diagram  Switching applications Description This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary Order code STL130N6F7 June 2015 Marking Package 130N6F7 TM PowerFLAT DocID027519 Rev 3 This is information on a product in full production. Packaging 5x6 Tape and reel 1/14 www.st.com Contents STL130N6F7 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 5 3 Test circuits ..................................................................................... 7 4 Package mechanical data ............................................................... 8 5 2/14 4.1 PowerFLAT™ 5x6 type C package information ................................ 9 4.2 PowerFLAT™ 5x6 packing information ........................................... 11 Revision history ............................................................................ 13 DocID027519 Rev 3 STL130N6F7 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ± 20 V (1) ID Drain current (continuous) at TC = 25 °C 130 A (1) ID Drain current (continuous) at TC = 100 °C 95 A (1)(2) IDM Drain current (pulsed) 520 A (3) ID Drain current (continuous) at Tpcb = 25 °C 26 A (3) ID Drain current (continuous) at Tpcb = 100 °C 19 A (2)(3) IDM Drain current (pulsed) 104 A PTOT (1) Total dissipation at TC = 25 °C 125 W PTOT (3) Total dissipation at Tpcb = 25 °C 4.8 W -55 to 175 °C Tj Operating junction temperature Tstg Storage temperature Notes: (1) (2) (3) This value is rated according to Rthj-c Pulse width limited by safe operating area This value is rated according to Rthj-pcb Table 3: Thermal data Symbol Rthj-pcb (1) Rthj-case Parameter Value Unit Thermal resistance junction-pcb max. 31.3 °C/W Thermal resistance junction-case max. 1.2 °C/W Notes: (1) When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 sec DocID027519 Rev 3 3/14 Electrical characteristics 2 STL130N6F7 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 V IDSS Zero gate voltage drain current VGS = 0 V VDS = 60 V IGSS Gate-body leakage current VGS = 20 V, VDS = 0 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 μA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 13 A V(BR)DSS Min. Typ. Max. 60 Unit V 1 µA 100 nA 4 V 0.0035 Ω 2 0.003 Table 5: Dynamic Symbol Ciss Parameter Test conditions Min. Typ. Max. Unit - 2600 - pF - 1200 - pF - 115 - pF - 42 - nC - 13.6 - nC - 13 - nC Input capacitance VDS = 25 V, f = 1 MHz, VGS = 0 V Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 30 V, ID = 26 A, VGS = 10 V Table 6: Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time - 24 - ns Rise time - 44 - ns - 62 - ns - 24 - ns VDD = 30 V, ID = 26 A, RG = 4.7 Ω, VGS = 10 V Turn-off delay time Fall time Table 7: Source-drain diode Symbol (1) VSD Parameter Test conditions Forward on voltage ISD =26 A, VGS = 0 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ID = 26 A, di/dt = 100 A/µs VDD = 48 V Notes: (1) 4/14 Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID027519 Rev 3 Min. Typ. - Max. Unit 1.2 V - 50 ns - 56 nC - 2.2 A STL130N6F7 2.1 Electrical characteristics Electrical characteristics (curves) Figure 3: Thermal impedance Figure 2: Safe operating area GIPD110520151416FSR ID (A) 100 is ea ar on) is RDS( h t in ax n m tio y ra d b e p ite O im L 10µs 100µs 10 1ms Tj < 175°C Tc = 25°C Single pulse 1 0.1 10ms 10 1 VDS(V) Figure 5: Transfer characteristics Figure 4: Output characteristics ID (A) 160 GIPD28042015 1144FSR ID (A) GIPD28042015 1137FSR VGS= 7, 8, 9, 10 V VDS = 6 V 6V 150 5V 120 100 80 4V 50 40 0 0 3V 2 4 6 8 Figure 6: Gate charge vs gate-source voltage GIPD280420151205FSR VGS (V) 0 0 VDS(V) 4 6 8 VGS(V) Figure 7: Static drain-source on-resistance GIPD2804201512 11FSR RDS(on) (mΩ) VDD = 30 V ID = 26 A 12 2 VGS= 10V 3.20 10 3.12 8 3.04 6 4 2.96 2 0 0 10 20 30 40 50 Qg(nC) DocID027519 Rev 3 2.88 5 10 15 20 25 ID(A) 5/14 Electrical characteristics STL130N6F7 Figure 9: Normalized gate threshold voltage vs temperature Figure 8: Capacitance variations GIPD280420151219FSR C (pF) f= 1MHz 10000 Ciss 1000 Coss 100 Crss 10 0.1 1 10 VDS(V) Figure 11: Normalized V(BR)DSS vs temperature Figure 10: Normalized on-resistance vs temperature GIPD280420151227FSR RDS(on) (norm) 2.2 GIPD280420151232FSR V(BR)DSS (norm) ID= 1mA 1.04 VGS= 10V ID= 13A 1.8 1.02 1.4 1.00 1.0 0.98 0.6 0.2 -75 -25 25 75 125 0.96 -75 175 Tj(°C) -25 25 75 Figure 12: Source-drain diode forward characteristics GIPD280420151236FSR VSD (V) Tj= -55°C 0.9 0.8 Tj= 25°C 0.7 0.6 0.5 6/14 Tj= 175°C 5 10 15 20 DocID027519 Rev 3 25 ISD(A) 125 175 Tj(°C) STL130N6F7 3 Test circuits Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID027519 Rev 3 7/14 Package mechanical data 4 STL130N6F7 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. 8/14 DocID027519 Rev 3 STL130N6F7 4.1 Package mechanical data PowerFLAT™ 5x6 type C package information Figure 19: PowerFLAT™ 5x6 type C package outline DocID027519 Rev 3 9/14 Package mechanical data STL130N6F7 Table 8: PowerFLAT™ 5x6 type C mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 b 0.25 0.30 D 0.50 5.20 E 6.15 D2 4.11 4.31 E2 3.50 3.70 e 1.27 e1 0.65 L 0.715 1.015 K 1.05 1.35 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 Figure 20: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) 10/14 DocID027519 Rev 3 STL130N6F7 4.2 Package mechanical data PowerFLAT™ 5x6 packing information Figure 21: PowerFLAT™ 5x6 tape (dimensions are in mm) Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape DocID027519 Rev 3 11/14 Package mechanical data STL130N6F7 Figure 23: PowerFLAT™ 5x6 reel 12/14 DocID027519 Rev 3 STL130N6F7 5 Revision history Revision history Table 9: Document revision history Date Revision Changes 17-Feb-2015 1 First release. 11-May-2015 2 Updated and Section 2: "Electrical characteristics" Added Section 2.1: "Electrical characteristics (curves)" Updated Section 4: "Package mechanical data" Minor text changes. 30-Jun-2015 3 Document status promoted from preliminary to production data. DocID027519 Rev 3 13/14 STL130N6F7 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 14/14 DocID027519 Rev 3
STL130N6F7
物料型号:STL130N6F7

器件简介: - 这是一个N通道的功率MOSFET,采用STripFET™ F7技术,具有增强的沟槽栅结构,从而实现非常低的导通电阻,同时减少内部电容和栅极电荷,以实现更快更高效的开关。 - 该器件具有市场上最低的RDS(on)之一,出色的性能指标(FoM),低Crss/Ciss比率以提高电磁干扰(EMI)的免疫力,以及高耐压能力。

引脚分配: - D(5,6,7,8):漏极引脚 - G(4):栅极引脚 - S(1,2,3):源极引脚

参数特性: - 绝对最大额定值包括:漏源电压(Vps)60V,栅源电压(Vas)±20V,连续漏极电流(lo)25°C时130A,100°C时95A,脉冲漏极电流520A等。 - 热数据包括:结到PCB的热阻(Rih-pcb)最大值31.3°C/W,结到封装的热阻(Rth-case)最大值1.2°C/W。

功能详解: - 该器件适用于开关应用,具有低导通电阻和快速开关特性。

应用信息: - 适用于开关应用。

封装信息: - 封装类型为PowerFLAT™ 5x6,采用胶带和卷轴包装。 - 封装机械数据包括尺寸和推荐焊盘尺寸。
STL130N6F7 价格&库存

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STL130N6F7
  •  国内价格 香港价格
  • 1+26.895361+3.47467
  • 10+17.3933510+2.24709
  • 100+11.97056100+1.54651
  • 500+9.65201500+1.24697
  • 1000+9.156111000+1.18290

库存:4196

STL130N6F7
  •  国内价格
  • 1+4.57920
  • 10+3.73680
  • 30+3.31560
  • 100+2.89440
  • 500+2.34360

库存:914

STL130N6F7
  •  国内价格
  • 1+7.59200

库存:25