TS4973IJT

TS4973 1.2W TWO AUDIO INPUTS WITH GAIN CONTROL POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW ADVANCE DATA s OPERATING FROM VCC = 2.8V to 5.5V s RAIL TO RAIL OUTPUT s 1.2W OUTPUT POWER @ Vcc=5V, THD=1%, F=1kHz, with 8Ω Load MODE (10nA) PIN CONNECTIONS (top view) TS4973IJT - FLIP CHIP s ULTRA LOW CONSUMPTION IN STANDBY s 53dB PSRR @ 217Hz from 2.8 to 5V s LOW POP & CLICK s ULTRA LOW DISTORTION (0.05%) s GAIN SETTINGS PIN : GS s UNITY GAIN STABLE s FLIP CHIP PACKAGE 9 x 300µm bumps DESCRIPTION At 3.3v, the TS4973 is an Audio Power Amplifier capable of delivering 400mW of continuous RMS ouput power into a 8Ω bridged-tied loads with 1% THD+N, and 30mW( typ ) per channel of continuous average power into stereo 32Ω BTL loads with 0.5% THD+N from 20Hz to 20kHz. An external standby mode control reduces the supply current to less than 10nA. An internal over-temperature shutdown protection is provided. The TS4973 has been designed for high quality audio applications such as mobile phones and to minimize the number of external components. It has two inputs which can be used to switch the gain between 6dB ( internal ) or a user’s adjustable gain setting with one external resitance. APPLICATIONS Vin2 VCC STBY VOUT1 GS VOUT2 Vin1 GND BYPASS TYPICAL APPLICATION SCHEMATIC s Mobile Phones (Cellular / Cordless) s PDAs s Laptop/Notebook computers s Portable Audio Devices ORDER CODE Part Number TS4973IJT Temperature Range -40, +85°C Package Marking J • A73 VCC Cs 6 Cin1 Rin Audio Inputs 1 In1 VCC Vout 1 8 7 Cin2 Gain Setting level threshold = 0.9V In2 + RL 8 Ohms 9 Gain Setting AV = -1 Vout 2 4 3 Bypass + Standby level threshold = 0.9V 5 Standby Bias GND TS4973 Cb 2 J = Flip Chip Package - only available in Tape & Reel (JT)) February 2003 This is a preliminary information on a new product now in development. Details are subject to change without notice. 1/9 TS4973 ABSOLUTE MAXIMUM RATINGS Symbol VCC Vi Toper Tstg Tj Rthja Pd Supply voltage Input Voltage 2) 1) Parameter Value 6 GND to VCC -40 to + 85 -65 to +150 150 200 Internally Limited 2 200 200 250 4) Unit V V °C °C °C °C/W kV V mA °C Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Ambient 3) Power Dissipation ESD Human Body Model ESD Machine Model Latch-up Latch-up Immunity Lead Temperature (soldering, 10sec) 1. 2. 3. 4. All voltages values are measured with respect to the ground pin. The magnitude of input signal must never exceed VCC + 0.3V / G ND - 0.3V Device is protected in case of over temperature by a thermal shutdown active @ 150°C. Exceeding the power derating curves during a long period, involves abnormal operating condition. OPERATING CONDITIONS Symbol VCC VICM VSTB Supply Voltage Common Mode Input Voltage Range Standby Voltage Input : Device ON Device OFF Gain Setting Voltage Input : External Gain (In1 Input) Internal Gain (In2 Input) Load Resistor Thermal Resistance Junction to Ambient 1) Parameter Value 2.8 to 5.5 GND to VCC - 1.5V 1.5 ≤ VSTB ≤ VCC GND ≤ VSTB ≤ 0.4 1.5 ≤ VSTB ≤ VCC GND ≤ VSTB ≤ 0.4 4 - 32 90 Unit V V V VGS RL Rthja V Ω °C/W 1. With Heat Sink Surface = 125mm 2 2/9 TS4973 ELECTRICAL CHARACTERISTICS VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Po BTL GAIN THD + N Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = Gnd, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω GS = Low input signal Vin = 100mV rms, RL = 8Ω Total Harmonic Distortion + Noise Po = 250mW rms, GS = Low, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio2) F = 217Hz, RL = 8Ω, GS = Low, Vripple = 200mV rms Input Grounded, Cin = 220nF, Cb = 1µF Power Supply Rejection Ratio3) F = 217Hz, RL = 8Ω, GS = Low, Vripple = 200mV rms Input floating, Cb = 1µF Input Impedance GS = Low Internal Feedback Resistor Phase Margin at GS = Low RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω 37.5 37.5 50 0.85 5.6 Min. Typ. 6 10 5 1.2 6 0.1 6.4 Max. 8 1000 20 Unit mA nA mV W dB % PSRR 53 dB PSRR 75 dB Zin Rfeed ΦM GM GBP 50 50 70 20 2 62.5 62.5 KΩ KΩ Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to Gnd 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz 3. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz 3/9 TS4973 ELECTRICAL CHARACTERISTICS VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)4) Symbol ICC ISTANDBY Voo Po BTL GAIN THD + N Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω GS = Low input signal Vin = 100mV rms, RL = 8Ω Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, GS = Low, Vripple = 200mV rms Input Grounded, Cin = 220nF, Cb = 1µF Power Supply Rejection Ratio3) f = 217Hz, RL = 8Ω, GS = Low, Vripple = 200mV rms Input floating, Cb = 1µF Input Impedance GS = Low Internal Feedback Resistor Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω 37.5 37.5 50 350 5.6 Min. Typ. 5.5 10 5 500 6 0.1 6.4 Max. 8 1000 20 Unit mA nA mV mW dB % PSRR 53 dB PSRR 75 dB Zin Rfeed ΦM GM GBP 1. 2. 3. 4. 50 50 70 20 2 62.5 62.5 KΩ KΩ Degrees dB MHz Standby mode is actived when Vstdby is tied to Vcc Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz All electrical values are made by correlation between 2.8V and 5V measurements 4/9 TS4973 ELECTRICAL CHARACTERISTICS VCC = 2.8V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo BTL GAIN Po THD + N Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω GS = Low input signal Vin = 100mV rms, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio2) F = 217Hz, RL = 8Ω, GS = Low, Vripple = 200mV rms Input Grounded, Cin = 220nF, Cb = 1µF Power Supply Rejection Ratio3) F = 217Hz, RL = 8Ω, GS = Low, Vripple = 200mV rms Input Floating, Cb = 1µF Input Impedance GS = Low Internal Feedback Resistor Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω 37.5 37.5 50 5.6 250 Min. Typ. 5.5 10 5 6 350 0.1 Max. 8 1000 20 6.4 Unit mA nA mV dB mW % PSRR 53 dB PSRR 75 dB Zin Rfeed ΦM GM GBP 50 50 70 20 2 62.5 62.5 KΩ KΩ Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to Gnd 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ F = 217Hz 3. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ F = 217Hz 5/9 TS4973 Components Rin Cin1 Cin2 Cs Cb Gv Functional Description Inverting input resistor which sets the closed loop gain ( when GS = high) in conjunction with the internal feedback resistor Rfeed. This resistor also forms a high pass filter with Cin1 Fc = 1 / (2 x Pi x Rin x Cin1) Input coupling capacitor which blocks the DC voltage at the amplifier input terminal In1 Input coupling capacitor which blocks the DC voltage at the amplifier input terminal In2. This capacitor also forms a high pass filter with Zin (internal input impedance when Gs = Low Fc = 1 / (2 x Pi x Zin x Cin2) Supply Bypass capacitor which provides power supply filtering (Recommended value = 1µF) Bypass pin capacitor which provides half supply filtering (Recommended value = 1µF) Closed loop gain in BTL configuration When Gs = Low, Gv = 2 or 6dB When GS = high, Gv = 2 x (Rfeed / Rin). Rfeed value see Electrical Characteristics. REMARKS 1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 1µF. 2. The standby response time is about 1µs. 6/9 TS4973 DAISY CHAIN MECHANICAL DATA ( Top View : all drawings dimensions are in millimeters ) 3 Vn2 In2 Vcc Stdby 2 Vout1 GS 9 Vout2 1.6 mm 1 Vn1 In1 Gnd Bypass Bypass A B 2.26 mm C REMARKS Daisy chain sample is featuring pins connection two by two. The schematic above is illustrating the way connecting pins each other. This sample is used for testing continuity on board. PCB needs to be designed on the opposite way, where pin connections are not done on daisy chain samples. By that way, just connecting an Ohmeter between pin 8 and pin 1, the soldering process continuity can be tested. ORDER CODE Part Number TSDC05IJT Temperature Range -40, +85°C Package Marking J • DC5 TS4973 Footprint Recommendation 5 00 µ m 500 µ m 7 5µm min. 100 µ m max. Track Φ =250µ m Solder mask opening 5 00 µ m 5 00 µ m Φ =400µ m 150 µ m min. Pad in Cu 35 µ m with Flash NiAu (6 µ m, 0.15µ m) 7/9 TS4973 PIN OUT (top view) MARKING (top view) 3 2 1 Vin2 VCC STBY VOUT1 GS VOUT2 A73 YWW Vin1 GND BYPASS s Balls are underneath A B C s s s s Logo : ST Part Number : A73 Date Code : YWW The Dot is for marking pin A1 PACKAGE MECHANICAL DATA FLIP CHIP - 9 BUMPS 2.26 mm s Die size : 2.26mm x 1.6mm ( ±10%) s Die height (including bumps) : 600µm 1.6 mm s Bumps diameter : 300µm ±15µm 0.5mm ±30µm s Pitch: 500µm ±10µm 0.5mm ∅ 0.25mm 600µm 8/9 TS4973 TAPE & REEL SPECIFICATION ( top view ) 1 A A 1 User User direction of feed Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com 9/9