VNQ810M-E

VNQ810M-E QUAD CHANNEL HIGH SIDE DRIVER Table 1. General Features Type VNQ810M-E (*) Per each channel Figure 1. Package Iout 0.6A (*) RDS(on) 150mΩ (*) VCC 36V CMOS COMPATIBLE INPUTS OPEN DRAIN STATUS OUTPUTS s ON STATE OPEN LOAD DETECTION s OFF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT s s SO-28 (DOUBLE ISLAND) REVERSE BATTERY PROTECTION (**) s IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE s DESCRIPTION The VNQ810M-E is a quad HSD formed by assembling two VND810M-E chips in the same SO-28 package. The VNQ810M-E is a monolithic device made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The current limitation threshold is aimed at detecting the 21W/12V standard bulb as an overload fault. The device detects open load condition both in on and off state . Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. Table 2. Order Codes Package Tube VNQ810M-E Tape and Reel VNQ810MTR-E SO-28 Note: (**) See application schematic at page 10 Rev. 1 October 2004 1/21 VNQ810M-E Figure 2. Block Diagram VCC1,2 Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND1,2 CLAMP 1 OUTPUT1 DRIVER 1 CLAMP 2 INPUT1 STATUS1 CURRENT LIMITER 1 LOGIC OVERTEMP. 1 OPENLOAD ON 1 CURRENT LIMITER 2 INPUT2 OPENLOAD OFF 1 STATUS2 OPENLOAD ON 2 DRIVER 2 OUTPUT2 OPENLOAD OFF 2 OVERTEMP. 2 VCC3,4 Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND3,4 INPUT3 CLAMP 3 OUTPUT3 DRIVER 3 CLAMP 4 STATUS3 CURRENT LIMITER 3 LOGIC OVERTEMP. 3 OPENLOAD ON 3 CURRENT LIMITER 4 INPUT4 OPENLOAD OFF 3 STATUS4 OPENLOAD OFF 4 OVERTEMP. 4 OPENLOAD ON 4 DRIVER 4 OUTPUT4 2/21 VNQ810M-E Table 3. Absolute Maximum Ratings Symbol VCC Parameter Value Unit DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge R=1.5KΩ; C=100pF) (Human Body Model: 41 -0.3 -200 Internally Limited -6 +/- 10 +/- 10 V V mA A A mA mA - VCC - Ignd IOUT - IOUT IIN ISTAT VESD - INPUT - STATUS - OUTPUT - VCC Maximum Switching Energy 4000 4000 5000 5000 V V V V EMAX Ptot Tj Tstg (L=310mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=0.9A) Power dissipation (per island) at Tlead=25°C Junction Operating Temperature Storage Temperature 174 6.25 Internally Limited -55 to 150 mJ W °C °C Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins VCC1,2 GND 1,2 INPUT1 STATUS1 STATUS2 INPUT2 VCC1,2 VCC3,4 GND 3,4 INPUT3 STATUS3 STATUS4 INPUT4 VCC3,4 1 28 VCC1,2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4 14 15 VCC3,4 Connection / Pin Status Floating X To Ground N.C. X X Output X Input X Through 10KΩ resistor 3/21 VNQ810M-E Figure 4. Current and Voltage Conventions IS3,4 VCC3,4 IIN1 VIN1 VSTAT1 VIN2 VSTAT2 VIN3 VSTAT3 ISTAT1 IIN2 ISTAT2 IIN3 ISTAT3 IIN4 INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 GND3,4 IGND3,4 OUTPUT3 IOUT4 OUTPUT4 GND1,2 IGND1,2 VOUT4 VOUT3 OUTPUT2 IOUT3 OUTPUT1 IOUT2 IOUT1 VCC3,4 VCC1,2 IS1,2 VF1 (*) VCC1,2 VOUT1 VOUT2 VIN4 ISTAT4 VSTAT4 (*) V Fn = VCCn - VOUTn during reverse battery condition Table 4. Thermal Data (Per island) Symbol Rthj-lead Rthj-amb Rthj-amb Parameter Thermal Resistance Junction-lead per chip Thermal Resistance Junction-ambient (one chip ON) Thermal Resistance Junction-ambient (two chips ON) 60 (1) 46 (1) Value 20 44 (2) 31 (2) Unit °C/W °C/W °C/W Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm 2 of Cu (at least 35µm thick) connected to all V CC pins. Horizontal mounting and no artificial air flow Note: 2. When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow 4/21 VNQ810M-E ELECTRICAL CHARACTERISTICS (8V TTSD) L H L X X H H L H H L Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL Figure 5. OPENLOAD STATUS TIMING (with external pull-up) OVERTEMP STATUS TIMING VOUT > VOL VINn IOUT < IOL Tj > TTSD VINn VSTATn VSTATn tSDL tDOL(off) tDOL(on) tSDL 7/21 VNQ810M-E Figure 6. Switching time Waveforms vOUTn 90% 80% dVOUT/dt(on) dVOUT/dt(off) 10% t VINn td(on) td(off) t Table 13. Electrical Transient Requirements On VCC Pin ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω I C C C C C C IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 8/21 VNQ810M-E Figure 7. Waveforms NORMAL OPERATION INPUTn OUTPUT VOLTAGEn STATUSn UNDERVOLTAGE VCC VUSD INPUTn OUTPUT VOLTAGEn STATUSn undefined VUSDhyst OVERVOLTAGE VCC INPUTn OUTPUT VOLTAGEn STATUSn OPEN LOAD with external pull-up INPUTn OUTPUT VOLTAGEn STATUSn VOUT>VOL VOL VCCVOL OPEN LOAD without external pull-up INPUTn OUTPUT VOLTAGEn STATUSn OVERTEMPERATURE Tj INPUTn OUTPUT CURRENTn STATUSn TTSD TR 9/21 VNQ810M-E Figure 8. Application Schematic +5V +5V +5V VCC1,2 Rprot STATUS1 VCC3,4 Rprot INPUT1 Dld Rprot STATUS2 OUTPUT1 Rprot µC INPUT2 Rprot STATUS3 OUTPUT2 Rprot OUTPUT3 INPUT3 Rprot STATUS4 OUTPUT4 INPUT4 GND1,2 GND3,4 Rprot RGND +5V +5V VGND DGND Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2. GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / 2(IS(on)max). 2) RGND ≥ (− VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC