IRFIB7N50A
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
D
TO-220 FULLPAK
• Low gate charge Qg results in simple drive
requirement
• Improved gate, avalanche and dynamic dV/dt
ruggedness
• Fully characterized capacitance and avalanche
voltage and current
• Effective Coss specified
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
G
G
D
S
S
N-Channel MOSFET
APPLICATIONS
PRODUCT SUMMARY
VDS (V)
•
•
•
•
500
RDS(on) (Ω)
VGS = 10 V
0.52
Qg (Max.) (nC)
52
Qgs (nC)
13
Qgd (nC)
18
Configuration
Single
Switch mode power supply (SMPS)
Uninterruptible power supply
High speed power switching
High voltage isolation = 2.5 kVRMS (t = 60 s, f = 60 Hz)
TYPICAL SMPS TOPOLOGIES
• Two transistor forward
• Half and full bridge convertors
• Power factor correction boost
ORDERING INFORMATION
Package
TO-220 FULLPAK
Lead (Pb)-free
IRFIB7N50APbF
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-source voltage
VDS
500
Gate-source voltage
VGS
± 30
Continuous drain current f
VGS at 10 V
Continuous drain current
Pulsed drain current
TC = 25 °C
TC = 100 °C
a, e
ID
IDM
Linear derating factor
UNIT
V
6.6
4.2
A
44
0.48
W/°C
mJ
Single pulse avalanche energy b, e
EAS
275
Repetitive avalanche current a, e
IAR
11
A
Repetitive avalanche energy a
EAR
6.0
mJ
Maximum power dissipation
TC = 25 °C
Peak diode recovery dV/dt c, e
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
Mounting torque
d
PD
60
W
dV/dt
6.9
V/ns
TJ, Tstg
-55 to +150
For 10 s
300
M3 screw
0.6
°C
Nm
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Starting TJ = 25 °C, L = 4.5 mH, RG = 25 Ω, IAS = 11 A (see fig. 12)
c. ISD ≤ 11 A, dI/dt ≤ 140 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case
e. Uses IRFB11N50A, SiHFB11N50A data and test conditions
f. Drain current limited by maximum junction temperature
S21-0975-Rev. D, 11-Oct-2021
Document Number: 91176
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IRFIB7N50A
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum junction-to-ambient
RthJA
-
65
Maximum junction-to-case (drain)
RthJC
-
2.1
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
VDS
VGS = 0 V, ID = 250 μA
MIN.
TYP.
MAX.
UNIT
500
-
-
V
-
610
-
mV/°C
Static
Drain-ssource breakdown voltage
VDS temperature coefficient
ΔVDS/TJ
Reference to 25 °C, ID = 1
mAd
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
Gate-source leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero gate voltage drain current
IDSS
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
Gate-source threshold voltage
Drain-source on-state resistance
Forward transconductance
RDS(on)
gfs
ID = 4.0 Ab
VGS = 10 V
VDS = 50 V, ID = 6.6 Ad
μA
-
-
0.52
Ω
6.1
-
-
S
-
1423
-
-
208
-
-
8.1
-
-
2000
-
Dynamic
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance
Crss
Output capacitance
Effective output capacitance
Total gate charge
Coss
Gate-drain charge
Qgd
Turn-on delay time
td(on)
Fall time
VGS = 0 V
VDS = 400 V, f = 1.0 MHz
-
55
-
VDS = 0 V to 400 V c, d
-
97
-
-
-
52
-
-
13
-
-
18
-
14
-
Qg
Qgs
Rise time
VDS = 1.0 V, f = 1.0 MHz
Coss eff.
Gate-source charge
Turn-off delay time
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5 d
tr
td(off)
VGS = 10 V
ID = 11 A, VDS = 400 V
see fig. 6 and 13 b, d
VDD = 250 V, ID = 11 A
RG = 9.1 Ω, RD = 22 Ω,
see fig. 10b, d
tf
pF
nC
-
35
-
-
32
-
-
28
-
-
-
6.6
-
-
44
-
-
1.5
-
510
770
ns
-
3.4
5.1
μC
ns
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current a
ISM
Body diode voltage
VSD
Body diode reverse recovery time
trr
Body diode reverse recovery charge
Qrr
Forward turn-on time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 11 A, VGS = 0 V b
TJ = 25 °C, IF = 11 A, dI/dt = 100 A/μs b, d
V
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS
d. Uses IRFB11N50A, SiHFB11N50A data and test conditions
S21-0975-Rev. D, 11-Oct-2021
Document Number: 91176
2
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFIB7N50A
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Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
10
1
4.5V 20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
TJ = 150 ° C
TJ = 25 ° C
1
0.1
4.0
100
VDS , Drain-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
10
20µs PULSE WIDTH
TJ = 150 ° C
1
10
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
S21-0975-Rev. D, 11-Oct-2021
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
3.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
4.5V
6.0
7.0
8.0
9.0
Fig. 3 - Typical Transfer Characteristics
TOP
1
5.0
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
V DS = 100V
20µs PULSE WIDTH
ID = 11A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91176
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IRFIB7N50A
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2400
100
ISD , Reverse Drain Current (A)
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
2000
C, Capacitance (pF)
Vishay Siliconix
Ciss
1600
Coss
1200
800
Crss
400
0
10
TJ = 150° C
1
TJ = 25 ° C
0.1
0.0
A
1
10
100
1000
VDS , Drain-to-Source Voltage (V)
OPERATION IN THIS AREA LIMITED
BY RDS(on)
VDS = 400 V
VDS = 250 V
VDS = 100 V
16
100
12
8
10us
10
100us
1ms
1
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
10
1.6
1000
A
ID = 11
6.6A
0
1.2
Fig. 7 - Typical Source-Drain Diode Forward Voltage
I D , Drain Current (A)
VGS , Gate-to-Source Voltage (V)
0.8
VSD ,Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
V GS = 0 V
0.4
20
30
40
50
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S21-0975-Rev. D, 11-Oct-2021
0.1
10ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91176
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IRFIB7N50A
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Vishay Siliconix
7.0
RD
VDS
VGS
6.0
D.U.T.
ID , Drain Current (A)
RG
+
- VDD
5.0
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
4.0
3.0
Fig. 10a - Switching Time Test Circuit
2.0
VDS
90 %
1.0
0.0
25
50
75
100
125
150
TC , Case Temperature ( °C)
10 %
VGS
t d(on)
tr
t d(off) t f
Fig. 10b - Switching Time Waveforms
Fig. 9 - Maximum Drain Current vs. Case Temperature
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
P DM
0.05
0.1
t1
0.02
t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S21-0975-Rev. D, 11-Oct-2021
Document Number: 91176
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFIB7N50A
www.vishay.com
Vishay Siliconix
15 V
Driver
L
VDS
D.U.T.
RG
+
A
- VDD
IAS
20 V
A
0.01 Ω
tp
Fig. 12a - Unclamped Inductive Test Circuit
V DS
V DSav , Avalanche Voltage (V)
660
640
620
600
580
0.0
tp
A
1.0
2.0
3.0
4.0
5.0
6.0
7.0
I av , Avalanche Current (A)
Fig. 12d -Typical Drain-to-Source Voltage vs.
Avalanche Current
I AS
QG
Fig. 12b - Unclamped Inductive Waveforms
EAS , Single Pulse Avalanche Energy (mJ)
10 V
600
TOP
500
BOTTOM
ID
4.9A
7.0A
11A
QGS
Q GD
VG
400
Charge
300
Fig. 13a - Basic Gate Charge Waveform
200
Current regulator
Same type as D.U.T.
100
50 kΩ
0
12 V
25
50
75
100
125
0.2 µF
0.3 µF
150
Starting TJ , Junction Temperature ( °C)
D.U.T.
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
+
V
- DS
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
S21-0975-Rev. D, 11-Oct-2021
Document Number: 91176
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IRFIB7N50A
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Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91176.
S21-0975-Rev. D, 11-Oct-2021
Document Number: 91176
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
TO-220 FULLPAK (High Voltage)
OPTION 1: FACILITY CODE = 9
A
F
G
Q1
E
D
ØR
A3
L1
3 x b2
3 x b1
Mold flash
bleeding
Q
L
Exposed Cu
3xb
2xe
C
Bottom view
MILLIMETERS
DIM.
MIN.
NOM.
A
4.60
4.70
4.80
b
0.70
0.80
0.91
b1
1.20
1.30
1.47
b2
1.10
1.20
1.30
C
0.45
0.50
0.63
D
15.80
15.87
15.97
e
MAX.
2.54 BSC
E
10.00
10.10
F
2.44
2.54
10.30
2.64
G
6.50
6.70
6.90
L
12.90
13.10
13.30
L1
3.13
3.23
3.33
Q
2.65
2.75
2.85
Q1
3.20
3.30
3.40
ØR
3.08
3.18
3.28
Notes
1. To be used only for process drawing
2. These dimensions apply to all TO-220 FULLPAK leadframe versions 3 leads
3. All critical dimensions should C meet Cpk > 1.33
4. All dimensions include burrs and plating thickness
5. No chipping or package damage
6. Facility code will be the 1st character located at the 2nd row of the unit marking
Revision: 08-Apr-2019
Document Number: 91359
1
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
OPTION 2: FACILITY CODE = Y
A
A1
E
ØP
n
d1
d3
D
u
L1
V
L
b3
A2
b2
c
b
MILLIMETERS
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
A
4.570
4.830
0.180
0.190
A1
2.570
2.830
0.101
0.111
A2
2.510
2.850
0.099
0.112
b
0.622
0.890
0.024
0.035
b2
1.229
1.400
0.048
0.055
b3
1.229
1.400
0.048
0.055
c
0.440
0.629
0.017
0.025
D
8.650
9.800
0.341
0.386
d1
15.88
16.120
0.622
0.635
d3
12.300
12.920
0.484
0.509
E
10.360
10.630
0.408
e
2.54 BSC
0.419
0.100 BSC
L
13.200
13.730
0.520
0.541
L1
3.100
3.500
0.122
0.138
n
6.050
6.150
0.238
0.242
ØP
3.050
3.450
0.120
0.136
u
2.400
2.500
0.094
0.098
V
0.400
0.500
0.016
0.020
ECN: E19-0180-Rev. D, 08-Apr-2019
DWG: 5972
Notes
1. To be used only for process drawing
2. These dimensions apply to all TO-220 FULLPAK leadframe versions 3 leads
3. All critical dimensions should C meet Cpk > 1.33
4. All dimensions include burrs and plating thickness
5. No chipping or package damage
6. Facility code will be the 1st character located at the 2nd row of the unit marking
Revision: 08-Apr-2019
Document Number: 91359
2
For technical questions, contact: hvmos.techsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
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Statements regarding the suitability of products for certain types of applications are based on Vishay's knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer's responsibility to validate that a particular product
with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
to the warranty expressed therein.
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Revision: 01-Jan-2022
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Document Number: 91000
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