SI2305ADS-T1-E3

New Product Si2305ADS Vishay Siliconix P-Channel 8-V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) RDS(on) (Ω) ID (A) 0.040 at VGS = - 4.5 V - 4.1 -8 0.060 at VGS = - 2.5 V - 3.4 0.088 at VGS = - 1.8 V - 2.0 • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • 100 % Rg Tested Qg (Typ.) 7.8 nC APPLICATIONS • Load Switch • DC/DC Converter TO-236 (SOT-23) G 1 S 2 S 3 D G Top View Si2305ADS (5A)* * Marking Code D Ordering Information: Si2305ADS-T1-E3 (Lead (Pb)-free) Si2305ADS-T1-GE3 (Lead (Pb)-free and Halogen-free) P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150 °C) Symbol VDS VGS TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C IDM Pulsed Drain Current Continuous Source-Drain Diode Current Maximum Power Dissipation Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Notes: a. Surface Mounted on 1" x 1" FR4 board. b. t = 10 s. Document Number: 69940 S09-0538-Rev. D, 06-Apr-09 ID TC = 25 °C TA = 25 °C TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C IS PD TJ, Tstg Limit -8 ±8 - 5.4 - 4.3 - 4.1a, b - 3.3a, b - 10 - 1.4 - 0.8a, b 1.7 1.1 0.96a, b 0.62a, b - 50 to 150 260 Unit V A W °C www.vishay.com 1 New Product Si2305ADS Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter t ≤ 10 s Steady State Maximum Junction-to-Ambienta, b Maximum Junction-to-Foot (Drain) Symbol RthJA RthJF Typical 100 60 Maximum 130 75 Unit °C/W Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Maximum under Steady State conditions is 175 °C/W. SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS VGS = 0 V, ID = - 250 µA -8 ΔVDS/TJ VGS(th) Temperature Coefficient ΔVGS(th)/TJ ID = - 250 µA Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = - 250 µA Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 8 V Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea RDS(on) Forward Transconductancea Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg gfs tr Rise Time Fall Time Turn-On Delay Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current a Pulse Diode Forward Current Body Diode Voltage V nA -1 - 10 -5 0.040 VGS = - 2.5 V, ID = - 3.4 A 0.048 0.060 VGS = - 1.8 V, ID = - 2.0 A 0.070 0.088 VDS = - 5 V, ID = - 4.1 A 8 740 VDS = - 4 V, VGS = 0 V, f = 1 MHz 290 pF 190 VDS = - 4 V, VGS = - 4.5 V, ID = - 4.1 A VDS = - 4 V, VGS = - 2.5 V, ID = - 4.1 A 7.8 15 4.5 9 1.2 VDD = - 4 V, RL = 1.2 Ω ID ≅ - 3.3 A, VGEN = - 4.5 V, Rg = 1 Ω 1.4 7 14 13 20 tf 10 20 5 10 VDD = - 4 V, RL = 1.2 Ω ID ≅ - 3.3 A, VGEN = - 8 V, Rg = 1 Ω 11 17 22 33 16 24 TC = 25 °C - 1.4 ISM Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb nC 1.6 f = 1 MHz td(on) VSD Ω S 53 IS µA A 0.032 tf Fall Time - 0.8 ± 100 48 td(off) Turn-Off DelayTime - 0.45 35 tr Rise Time mV/°C 2.1 VDS = - 8 V, VGS = 0 V VDS ≤ - 5 V, VGS = - 4.5 V VGS = - 4.5 V, ID = - 4.1 A Unit V - 55 32 td(off) Turn-Off DelayTime Max. VDS = - 8 V, VGS = 0 V, TJ = 55 °C td(on) Turn-On Delay Time Typ. - 10 IF = - 3.3 A IF = - 3.3 A, dI/dt = 100 A/µs, TJ = 25 °C Ω ns A - 0.8 - 1.2 V 33 50 ns 14 21 nC 14 19 ns Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 69940 S09-0538-Rev. D, 06-Apr-09 New Product Si2305ADS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 12 VGS = 4.5 V thru 2 V 9 9 6 I D - Drain Current (A) I D - Drain Current (A) 12 VGS = 1.5 V 3 6 3 TC = 125 °C TC = 25 °C VGS = 0.5 V VGS = 1 V 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 TC = - 55 °C 0 0.0 4.0 0.5 VDS - Drain-to-Source Voltage (V) 1.5 2.0 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 1200 0.10 VGS = 1.8 V 0.08 900 C - Capacitance (pF) RDS(on) - On-Resistance (Ω) 1.0 0.06 VGS = 2.5 V Ciss 600 Coss 300 0.04 VGS = 4.5 V Crss 0 0.02 0 2 4 6 8 0 10 2 4 6 8 VDS - Drain-to-Source Voltage (V) ID - Drain Current (A) On-Resistance vs. Drain Current and Gate Voltage Capacitance 1.5 4.5 2.7 VDS = 6.4 V 1.8 VDS = 2.5 V, ID = 3.4 A 1.3 (Normalized) VDS = 4 V RDS(on) - On-Resistance VGS - Gate-to-Source Voltage (V) ID = 4.1 A 3.6 1.1 VDS = 4.5 V, ID = 4.1 A 0.9 0.9 0.0 0.0 1.5 3.0 4.5 6.0 Qg - Total Gate Charge (nC) Gate Charge Document Number: 69940 S09-0538-Rev. D, 06-Apr-09 7.5 9.0 0.7 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature www.vishay.com 3 New Product Si2305ADS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 0.10 RDS(on) - On-Resistance (Ω) I S - Source Current (A) ID = 4.1 A 10 TJ = 150 °C TJ = 25 °C 1 0.1 0.0 0.08 0.06 TA = 125 °C 0.04 TA = 25 °C 0.02 0.00 0.2 0.4 0.6 0.8 1.0 0 1.2 2 4 6 8 VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 30 0.7 0.6 ID = 250 µA Power (W) VGS(th) (V) 20 0.5 0.4 10 0.3 0.2 - 50 - 25 0 25 50 75 100 125 150 0 0.001 0.01 0.1 1 10 TJ - Temperature (°C) Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 100 I D - Drain Current (A) Limited by RDS(on)* 10 1 ms 1 10 ms 100 ms 1s 10 s DC 0.1 TA = 25 °C Single Pulse 0.01 0.1 1 10 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient www.vishay.com 4 Document Number: 69940 S09-0538-Rev. D, 06-Apr-09 New Product Si2305ADS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 6.0 I D - Drain Current (A) 4.5 3.0 1.5 0.0 0 25 50 75 100 125 150 TC - Case Temperature (°C) 2.0 1.00 1.5 0.75 Power (W) Power (W) Current Derating* 1.0 0.5 0.50 0.25 0.0 0.00 0 25 50 75 100 TC - Case Temperature (°C) Power, Junction-to-Case 125 150 0 25 50 75 100 125 150 TA - Ambient Temperature (°C) Power, Junction-to-Ambient * The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 69940 S09-0538-Rev. D, 06-Apr-09 www.vishay.com 5 New Product Si2305ADS Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 Notes: 0.02 PDM t1 0.01 Single Pulse t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 175 °C/W 3. TJM - TA = PDMZthJA(t) 4. Surface Mounted 0.001 10 -4 10 -3 10 -2 10 -1 1 10 100 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?69940. www.vishay.com 6 Document Number: 69940 S09-0538-Rev. D, 06-Apr-09 Package Information Vishay Siliconix SOT-23 (TO-236): 3-LEAD b 3 E1 1 E 2 e S e1 D 0.10 mm C 0.004" A2 A C q Gauge Plane Seating Plane Seating Plane C A1 Dim 0.25 mm L L1 MILLIMETERS Min INCHES Max Min Max 0.044 A 0.89 1.12 0.035 A1 0.01 0.10 0.0004 0.004 A2 0.88 1.02 0.0346 0.040 b 0.35 0.50 0.014 0.020 c 0.085 0.18 0.003 0.007 D 2.80 3.04 0.110 0.120 E 2.10 2.64 0.083 0.104 E1 1.20 1.40 0.047 e 0.95 BSC e1 L 1.90 BSC 0.40 L1 q 0.0748 Ref 0.60 0.016 0.64 Ref S 0.024 0.025 Ref 0.50 Ref 3° 0.055 0.0374 Ref 0.020 Ref 8° 3° 8° ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479 Document Number: 71196 09-Jul-01 www.vishay.com 1 AN807 Vishay Siliconix Mounting LITTLE FOOTR SOT-23 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. ambient air. This pattern uses all the available area underneath the body for this purpose. 0.114 2.9 0.081 2.05 0.150 3.8 0.059 1.5 0.0394 1.0 0.037 0.95 FIGURE 1. Footprint With Copper Spreading The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board. Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the Document Number: 70739 26-Nov-03 Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device. www.vishay.com 1 Application Note 826 Vishay Siliconix 0.049 (1.245) 0.029 0.022 (0.559) (0.724) 0.037 (0.950) (2.692) 0.106 RECOMMENDED MINIMUM PADS FOR SOT-23 0.053 (1.341) 0.097 (2.459) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72609 Revision: 21-Jan-08 www.vishay.com 25 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000