SIHB35N60E-GE3

SiHB35N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES • A specific on resistance (m-cm2) reduction of 25 % • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Reduced switching and conduction losses • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 D D2PAK (TO-263) G G D S S APPLICATIONS N-Channel MOSFET • Power factor correction power supplies (PFC) • Hard switching PWM stages • Computing - Switch mode power supplies (SMPS) • Lighting - Light emitting diode (LED) - High intensity discharge (HID) • Telecom - Server power supplies • Renewable energy - Photovoltaic inverters • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Uniterruptable power supplies PRODUCT SUMMARY VDS (V) at TJ max. RDS(on) typ. () at 25 °C Qg max. (nC) Qgs (nC) Qgd (nC) Configuration 650 VGS = 10 V 0.082 132 22 46 Single ORDERING INFORMATION D2PAK (TO-263) SiHB35N60E-GE3 SiHB35N60ET1-GE3 SiHB35N60ET5-GE3 Package Lead (Pb)-free and halogen-free ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-source voltage Gate-source voltage Continuous drain current (TJ = 150 °C) Pulsed drain current a Linear derating factor Single pulse avalanche energy b Maximum power dissipation Operating junction and storage temperature range Drain-source voltage slope Reverse diode dV/dt d Soldering recommendations (peak temperature) c SYMBOL VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C ID IDM EAS PD TJ, Tstg TJ = 125 °C for 10 s dV/dt LIMIT 600 ± 30 32 20 80 2 691 250 -55 to +150 57 31 300 UNIT V A W/°C mJ W °C V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 7 A c. 1.6 mm from case d. ISD  ID, dI/dt = 100 A/μs, starting TJ = 25 °C S20-0272-Rev. B, 20-Apr-2020 Document Number: 91581 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHB35N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum junction-to-ambient RthJA - 62 Maximum junction-to-case (drain) RthJC - 0.5 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage (N) VDS VGS = 0 V, ID = 250 μA 600 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V Gate-source leakage IGSS Zero gate voltage drain current IDSS VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 25 μA - 0.082 0.094  gfs VDS = 30 V, ID = 17 A - 13 - S Input capacitance Ciss - 2760 - Output capacitance Coss - 118 - Reverse transfer capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - 5 - Effective output capacitance, energy related a Co(er) - 118 - Effective output capacitance, time related b Co(tr) - 429 - Total gate charge Qg - 88 132 Gate-source charge Qgs - 22 - Drain-source on-state resistance Forward transconductance RDS(on) VGS = 10 V ID = 17 A Dynamic VDS = 0 V to 480 V, VGS = 0 V VGS = 10 V ID = 17 A, VDS = 480 V Gate-drain charge Qgd - 46 - Turn-on delay time td(on) - 29 58 Rise time Turn-off delay time tr td(off) Fall time tf Gate input resistance Rg VDD = 480 V, ID = 17 A, VGS = 10 V, Rg = 9.1  - 61 92 - 78 117 - 32 64 f = 1 MHz, open drain 0.25 0.5 1 - - 32 - - 80 pF nC ns  Drain-Source Body Diode Characteristics Continuous source-drain diode current IS Pulsed diode forward current ISM Diode forward voltage VSD Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery current IRRM MOSFET symbol showing the  integral reverse p - n junction diode D A G TJ = 25 °C, IS = 17 A, VGS = 0 V TJ = 25 °C, IF = IS = 17 A, dI/dt = 100 A/μs, VR = 25 V S - 0.9 1.2 V - 455 910 ns - 8 16 μC - 30 - A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS S20-0272-Rev. B, 20-Apr-2020 Document Number: 91581 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHB35N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 80 3.0 TJ = 25 °C ID = 17 A RDS(on), Drain-to-Source On-Resistance (Normalized) 60 40 20 2.5 2.0 1.5 VGS = 10 V 1.0 0.5 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 0 -60 -40 -20 30 Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics 60 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 40 100 000 TJ = 150 °C 30 20 Ciss 1000 100 Coss Crss 10 10 0 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 10 000 C, Capacitance (pF) ID, Drain-to-Source Current (A) 50 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) 1 0 5 10 15 20 25 0.1 30 0 100 VDS, Drain-to-Source Voltage (V) 200 300 400 500 VDS, Drain-to-Source Voltage (V) 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 18 100 TJ = 25 °C 16 80 14 12 60 Coss (pF) ID, Drain-to-Source Current (A) 5000 TJ = 150 °C 10 Coss Eoss 500 8 Eoss (μJ) ID, Drain-to-Source Current (A) 100 40 6 4 20 2 VDS = 27.4 V 0 50 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S20-0272-Rev. B, 20-Apr-2020 25 0 0 100 200 300 VDS 400 500 600 Fig. 6 - Coss and Eoss vs. VDS Document Number: 91581 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHB35N60E www.vishay.com Vishay Siliconix VDS = 480 V VDS = 300 V VDS = 120 V 20 30 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 0 0 30 60 90 120 Qg, Total Gate Charge (nC) 150 180 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 25 VDS, Drain-to-Source Breakdown Voltage (V) TJ = 25 °C 10 1 VGS = 0 V 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-Drain Voltage (V) 1.4 1.6 Fig. 8 - Typical Source-Drain Diode Forward Voltage 100 Operation in this Area Limited by RDS(on) 10 Limited by RDS(on)a 150 750 725 700 675 650 625 ID = 250 μA 600 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM Limited 100 μs 1 1 ms 10 ms 0.1 0.01 75 100 125 TC, Case Temperature (°C) 775 TJ = 150 °C 0.1 50 Fig. 10 - Maximum Drain Current vs. Case Temperature 100 ISD, Reverse Drain Current (A) 10 4 0 ID, Drain Current (A) 20 TC = 25 °C TJ = 150 °C Single Pulse 1 BVDSS Limited 10 100 VDS, Drain-to-Source Voltage (V) 1000 Fig. 9 - Maximum Safe Operating Area Note a. VGS > minimum VGS at which RDS(on) is specified S20-0272-Rev. B, 20-Apr-2020 Document Number: 91581 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHB35N60E www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 Pulse Time (s) 0.1 1 Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 16 - Unclamped Inductive Waveforms Fig. 13 - Switching Time Test Circuit VDS QG 10 V 90 % QGS QGD VG 10 % VGS td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L Vary tp to obtain required IAS VDS 50 kΩ D.U.T RG + - IAS 12 V 0.2 µF 0.3 µF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S20-0272-Rev. B, 20-Apr-2020 Document Number: 91581 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHB35N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91581. S20-0272-Rev. B, 20-Apr-2020 Document Number: 91581 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0° to 8° 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail “A” Rotated 90° CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B ± 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 AN826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 0.355 0.635 (16.129) (9.017) (10.668) 0.145 (3.683) 0.135 (3.429) 0.200 0.050 (5.080) (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Document Number: 73397 11-Apr-05 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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ALL RIGHTS RESERVED Revision: 01-Jan-2022 1 Document Number: 91000