20ETS12PBF

VS-20ETS..PbF, VS-20ATS..PbF www.vishay.com Vishay Semiconductors High Voltage Input Rectifier Diode, 20 A TO-220AC TO-220AB FEATURES • Designed and JEDEC-JESD47 qualified according to • Compliant to RoHS Directive 2002/95/EC APPLICATIONS Base cathode 2 Cathode to base 2 • Typical applications are in input rectification and these products are designed to be used with Vishay HPP switches and output rectifiers which are available in identical package outlines DESCRIPTION 1 Cathode 3 Anode 1 Anode 3 Anode VS-20ETS..PbF VS-20ATS..PbF PRODUCT SUMMARY Package IF(AV) VR VF at IF IFSM TJ max. Diode variation TO-220AC, TO-220AB 20 A 800 V to 1200 V 1.1 V 300 A 150 °C Single die, common anode The VS-20ETS..PbF, VS-20ATS..PbF rectifier high voltage series has been optimized for very low forward voltage drop, with moderate leakage. The glass passivation technology used has reliable operation up to 150 °C junction temperature. OUTPUT CURRENT IN TYPICAL APPLICATIONS APPLICATIONS Capacitive input filter TA = 55 °C, TJ = 125 °C common heatsink of 1 °C/W SINGLE-PHASE BRIDGE 16.3 THREE-PHASE BRIDGE 21 UNITS A MAJOR RATINGS AND CHARACTERISTICS SYMBOL IF(AV) VRRM IFSM VF TJ 10 A, TJ = 25 °C CHARACTERISTICS Sinusoidal waveform VALUES 20 800/1200 300 1.0 - 40 to 150 UNITS A V A V °C VOLTAGE RATINGS PART NUMBER VS-20ETS08PbF, VS-20ATS08PbF VS-20ETS12PbF, VS-20ATS12PbF VRRM, MAXIMUM PEAK REVERSE VOLTAGE V 800 1200 VRSM, MAXIMUM NON-REPETITIVE PEAK REVERSE VOLTAGE V 900 1 1300 IRRM AT 150 °C mA Revision: 18-Aug-11 Document Number: 94341 1 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-20ETS..PbF, VS-20ATS..PbF www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER Maximum average forward current Maximum peak one cycle non-repetitive surge current Maximum I2t for fusing Maximum I2t for fusing SYMBOL IF(AV) IFSM I2 t I2t TEST CONDITIONS TC = 105 °C, 180° conduction half sine wave 10 ms sine pulse, rated VRRM applied 10 ms sine pulse, no voltage reapplied 10 ms sine pulse, rated VRRM applied 10 ms sine pulse, no voltage reapplied t = 0.1 ms to 10 ms, no voltage reapplied VALUES 20 250 300 316 442 4420 A2s A2s A UNITS ELECTRICAL SPECIFICATIONS PARAMETER Maximum forward voltage drop Forward slope resistance Threshold voltage Maximum reverse leakage current SYMBOL VFM rt VF(TO) IRM TEST CONDITIONS 20 A, TJ = 25 °C TJ = 150 °C TJ = 25 °C TJ = 150 °C VR = Rated VRRM VALUES 1.1 10.4 0.85 0.1 1.0 UNITS V m V mA THERMAL - MECHANICAL SPECIFICATIONS PARAMETER Maximum junction and storage temperature range Maximum thermal resistance, junction to case Typical thermal resistance, case to heatsink Approximate weight minimum maximum Case style TO-220AC Marking device Case style TO-220AB SYMBOL TJ, TStg RthJC RthCS DC operation Mounting surface, smooth and greased TEST CONDITIONS VALUES - 40 to 150 1.3 °C/W 0.5 2 0.07 6 (5) 12 (10) g oz. kgf · cm (lbf · in) UNITS °C Mounting torque 20ETS08 20ETS12 20ATS08 20ATS12 Revision: 18-Aug-11 Document Number: 94341 2 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-20ETS..PbF, VS-20ATS..PbF www.vishay.com Vishay Semiconductors 35 150 Maxiumum Average Forward Power Loss (W) RthJC (DC) = 1.3 °C/W Maximum Allowable Case Temperature (°C) 140 130 120 110 100 Ø 30 25 20 Conduction angle DC 180° 120° 90° 60° 30° RMS limit 15 10 5 0 Ø 30° 90 60° 90° 120° 180° Conduction period TJ = 150 °C 0 5 10 15 20 25 0 2 4 6 8 10 12 14 16 18 20 22 Average Forward Current (A) Fig. 1 - Current Rating Characteristics Average Forward Current (A) Fig. 4 - Forward Power Loss Characteristics 150 300 RthJC (DC) = 1.3 °C/W Maximum Allowable Case Temperature (°C) 140 130 120 110 100 90 Ø Peak Half Sine Wave Forward Current (A) 250 At any rated load condition and with rated VRRM applied following surge. Initial TJ = 150 °C at 60 Hz 0.0083 s at 50 Hz 0.0100 s Conduction period 200 150 30° 60° 90° 120° 180° DC 100 50 0 5 10 15 20 25 30 35 1 10 100 Average Forward Current (A) Fig. 2 - Current Rating Characteristics Number of Equal Amplitude Half Cycle Current Pulse (N) Fig. 5 - Maximum Non-Repetitive Surge Current 30 Maxiumum Average Forward Power Loss (W) 25 20 15 10 5 Peak Half Sine Wave Forward Current (A) 180° 120° 90° 60° 30° RMS limit 300 250 Maximum non-repetitive surge current versus pulse train duration. Initial TJ = 150 °C No voltage reapplied Rated VRRM reapplied 200 150 Ø Conduction angle TJ = 150 °C 0 100 50 0 4 8 12 16 20 24 0.01 0.1 1 Average Forward Current (A) Fig. 3 - Forward Power Loss Characteristics Pulse Train Duration (s) Fig. 6 - Maximum Non-Repetitive Surge Current Revision: 18-Aug-11 Document Number: 94341 3 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-20ETS..PbF, VS-20ATS..PbF www.vishay.com Vishay Semiconductors 1000 Instantaneous Forward Current (A) TJ = 25 °C 100 TJ = 150 °C 10 1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Instantaneous Forward Voltage (V) Fig. 7 - Forward Voltage Drop Characteristics 10 ZthJC - Transient Thermal Impedance (°C/W) Steady state value (DC operation) 1 0.1 Single pulse 0.01 0.0001 D = 0.50 D = 0.33 D = 0.25 D = 0.17 D = 0.08 0.001 0.01 0.1 1 Square Wave Pulse Duration (s) Fig. 8 - Thermal Impedance ZthJC Characteristics Revision: 18-Aug-11 Document Number: 94341 4 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-20ETS..PbF, VS-20ATS..PbF www.vishay.com ORDERING INFORMATION TABLE Device code Vishay Semiconductors VS1 1 2 3 20 2 - E 3 T 4 S 5 12 6 PbF 7 Vishay Semiconductors product Current rating (20 = 20 A) Circuit configuration: E = TO-220AC A = TO-220AB 4 5 - Package: T = TO-220 Type of silicon: S = Standard recovery rectifier 08 = 800 V 12 = 1200 V 6 7 - Voltage code x 100 = VRRM PbF = Lead (Pb)-free LINKS TO RELATED DOCUMENTS Dimensions Part marking information www.vishay.com/doc?95180 www.vishay.com/doc?95181 Revision: 18-Aug-11 Document Number: 94341 5 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Outline Dimensions Vishay Semiconductors TO-220AB, TO-220AC DIMENSIONS FOR TO-220AB in millimeters and inches A ØP E Q H1 4 D D1 1 (3) C C B Seating plane A A1 A H1 D2 E Thermal pad Detail B θ 2 D 3 D L1 (2) E1 C L View A - A C 2xe e1 0.015 M B A M C Lead assignments HEXFET b, b2 c b1, b3 Section C - C and D - D c1 1. - Gate 2. - Drain 3. - Source IGBTs, CoPAK 1. - Gate 2. - Collector 3. - Emitter A A2 Sheet 2 1 Diodes 1. - Anode/open 2. - Cathode 3. - Anode C C 2 D 3 D 3 x b2 Detail B 3xb SYMBOL A A1 A2 b b1 b2 b3 c c1 c2 D D1 MILLIMETERS MIN. MAX. 4.25 4.65 1.14 1.40 2.56 2.92 0.69 1.01 0.38 0.96 1.20 1.73 1.15 1.73 0.36 0.61 0.36 0.56 0.31 1.14 14.85 15.25 8.38 9.02 INCHES MIN. MAX. 0.167 0.183 0.045 0.055 0.101 0.115 0.027 0.040 0.015 0.038 0.047 0.068 0.045 0.068 0.014 0.024 0.014 0.022 0.012 0.045 0.585 0.600 0.330 0.355 NOTES SYMBOL D2 E E1 e e1 H1 L L1 ØP Q  4 4 3 MILLIMETERS MIN. MAX. 12.19 12.88 10.11 10.51 8.38 8.89 2.41 2.67 4.88 5.28 6.09 6.48 13.52 14.02 3.32 3.82 3.54 3.73 2.60 3.00 90° to 93° INCHES MIN. MAX. 0.480 0.507 0.398 0.414 0.330 0.350 0.095 0.105 0.192 0.208 0.240 0.255 0.532 0.552 0.131 0.150 0.139 0.147 0.102 0.118 90° to 93° L1 NOTES 3 2 Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Lead dimension and finish uncontrolled in L1 (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Dimension b1 and c1 apply to base metal only (5) Controlling dimensions: inches Document Number: 95180 Revision: 25-Oct-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 1 Outline Dimensions Vishay Semiconductors TO-220AB, TO-220AC DIMENSIONS FOR TO-220AC in millimeters and inches (6) E A ØP B A A1 Seating plane A E Thermal pad Q (6) H1 D D1 1 L3 C C H1 D2 (6) Detail B θ 2 D 3 D L1 (2) C L4 L E1 (6) C A2 e1 0.015 M B A M A View A - A Plating b, b2 Base metal 1 2 D 3 D C c c1 (4) C b1, b3 Section C - C and D - D (4) 2 x b2 Detail B 2xb SYMBOL A A1 A2 b b1 b2 b3 c c1 D D1 D2 MILLIMETERS MIN. MAX. 4.25 4.65 1.14 1.40 2.56 2.92 0.69 1.01 0.38 0.96 1.20 1.73 1.15 1.73 0.36 0.61 0.36 0.56 14.85 15.25 8.38 9.02 12.19 12.88 INCHES MIN. MAX. 0.167 0.183 0.045 0.055 0.101 0.115 0.027 0.040 0.015 0.038 0.047 0.068 0.045 0.068 0.014 0.024 0.014 0.022 0.585 0.600 0.330 0.355 0.480 0.507 NOTES SYMBOL E E1 e e1 H1 L L1 L3 L4 ØP Q  4 4 4 3 6 MILLIMETERS MIN. MAX. 10.11 10.51 8.38 8.89 2.41 2.67 4.88 5.28 6.09 6.48 13.52 14.02 3.32 3.82 1.78 2.13 0.76 1.27 3.54 3.73 2.60 3.00 90° to 93° INCHES MIN. MAX. 0.398 0.414 0.330 0.350 0.095 0.105 0.192 0.208 0.240 0.255 0.532 0.552 0.131 0.150 0.070 0.084 0.030 0.050 0.139 0.147 0.102 0.188 90° to 93° L1 NOTES 3, 6 6 6 2 Notes (1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Lead dimension and finish uncontrolled in L1 (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Dimension b1, b3 and c1 apply to base metal only (5) Controlling dimensions: inches (6) Thermal pad contour optional within dimensions E, H1, D2 and E1 (7) Outline conforms are derived from the actual package outline www.vishay.com 2 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 95180 Revision: 25-Oct-10 Outline Dimensions Vishay Semiconductors TO-220AC DIMENSIONS in millimeters and inches B Seating plane ØP 0.014 M B A M (6) H1 (7) Detail B D1 1 L3 L4 L 23 C E1 (6) Lead assignments Diodes 1 + 2 - Cathode 3 - Anode c e1 0.015 M B A M A2 A Conforms to JEDEC outline TO-220AC θ A A A1 H1 D2 (6) 2 x b2 Detail B 2xb E Thermal pad C C 1 2 D 3 D L1 (6) E E2 (7) Q A (6) D Lead tip View A - A SYMBOL A A1 A2 b b1 b2 b3 c c1 D D1 D2 E MILLIMETERS MIN. 4.25 1.14 2.56 0.69 0.38 1.20 1.14 0.36 0.36 14.85 8.38 11.68 10.11 MAX. 4.65 1.40 2.92 1.01 0.97 1.73 1.73 0.61 0.56 15.25 9.02 12.88 10.51 INCHES MIN. 0.167 0.045 0.101 0.027 0.015 0.047 0.045 0.014 0.014 0.585 0.330 0.460 0.398 MAX. 0.183 0.055 0.115 0.040 0.038 0.068 0.068 0.024 0.022 0.600 0.355 0.507 0.414 NOTES SYMBOL E1 E2 e e1 MILLIMETERS MIN. 6.86 2.41 4.88 6.09 13.52 3.32 1.78 0.76 3.54 2.60 MAX. 8.89 0.76 2.67 5.28 6.48 14.02 3.82 2.13 1.27 3.73 3.00 INCHES MIN. 0.270 0.095 0.192 0.240 0.532 0.131 0.070 0.030 0.139 0.102 MAX. 0.350 0.030 0.105 0.208 0.255 0.552 0.150 0.084 0.050 0.147 0.118 NOTES 6 7 4 H1 L 6, 7 4 L1 L3 2 4 3 L4 ØP Q  2 6 3, 6 90° to 93° 90° to 93° Notes (1) Dimensioning and tolerancing as per ASME Y14.5M-1994 (2) Lead dimension and finish uncontrolled in L1 (3) Dimension D, D1 and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body (4) Dimension b1, b3 and c1 apply to base metal only (5) Controlling dimension: inches (6) Thermal pad contour optional within dimensions E, H1, D2 and E1 (7) Dimension E2 x H1 define a zone where stamping and singulation irregularities are allowed (8) Outline conforms to JEDEC TO-220, D2 (minimum) where dimensions are derived from the actual package outline Document Number: 95221 Revision: 07-Mar-11 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1