IRFB16N60L

IRFB16N60L, SiHFB16N60L Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 100 30 46 Single D FEATURES 600 0.385 • Super Fast Body Diode Eliminates the Need for External Diodes in ZVS Applications • Lower Gate Charge Results in Simpler Drive Requirements Available RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness • Higher Gate Voltage Threshold Offers Improved Noise Immunity • Lead (Pb)-free Available TO-220 APPLICATIONS G • Zero Voltage Switching SMPS • Telecom and Server Power Supplies S N-Channel MOSFET S G D • Uninterruptible Power Supplies • Motor Control Applications ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-220 IRFB16N60LPbF SiHFB16N60L-E3 IRFB16N60L SiHFB16N60L ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM EAS IAR EAR PD dV/dt TJ, Tstg LIMIT 600 ± 30 16 10 60 2.5 310 16 31 310 10 - 55 to + 150 300d 10 1.1 UNIT V A W/°C mJ A mJ W V/ns °C lbf · in N·m TC = 25 °C for 10 s 6-32 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 2.5 mH, RG = 25 Ω, IAS =16 A, dV/dt = 10 V/ns (see fig. 12a). c. ISD ≤ 16 A, dI/dt ≤ 340 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 www.vishay.com 1 WORK-IN-PROGRESS IRFB16N60L, SiHFB16N60L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJC TYP. MAX. 62 0.4 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related) Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Body Diode Reverse Recovery Charge Body Diode Reverse Recovery Current Forward Turn-On Time IS ISM VSD trr MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 600 V, VGS = 0 V VDS = 480 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 9.0 Ab VDS = 50 V, ID = 9.0 A 600 3.0 8.3 0.39 0.385 - 5.0 ± 100 50 2.0 0.460 - V V/°C V nA µA mA Ω S Ciss Coss Crss Coss eff. Coss eff. (ER) Qg Qgs Qgd td(on) tr td(off) tf VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 2720 26 20 120 100 20 44 28 5.5 100 30 46 ns nC pF VGS = 0 V VDS = 0 V to 480 Vc - ID = 16 A, VDS = 480 V, see fig. 7 and 15b VGS = 10 V VDD = 300 V, ID = 16 A, RG = 1.8 Ω, see fig. 11a and 11bb - - 130 240 450 1080 5.8 16 A 60 1.5 200 360 670 1620 8.7 V ns G S TJ = 25 °C, IS = 16 A, VGS = 0 Vb TJ = 25 °C, IF = 16 A, TJ = 125 °C, dI/dt = 100 A/µsb TJ = 25 °C, IS = 16 A, TJ = 125 °C, dI/dt = 100 A/µsb TJ = 25 °C Qrr IRRM ton nC A Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss whil VDS is rising from 0 to 80 % VDS. www.vishay.com 2 Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 IRFB16N60L, SiHFB16N60L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1000 TOP VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V 1000 ID, Drain-to-Source Current (Α) ID, Drain-to-Source Current (A) 100 100 10 BOTTOM 10 T J = 150°C 1 0.1 5.0V 1 T J = 25°C 0.1 0.01 20μs PULSE WIDTH Tj = 25°C 0.001 0.1 1 10 100 0.01 4 6 8 VDS = 50V 20μs PULSE WIDTH 10 12 14 16 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics VGS , Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 100 TOP 3.0 RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) 10 BOTTOM VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V ID = 15A 2.5 VGS = 10V 2.0 (Normalized) 5.0V 1 1.5 1.0 0.1 20μs PULSE WIDTH Tj = 150°C 0.01 0.1 1 10 100 0.5 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics T J , Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 www.vishay.com 3 IRFB16N60L, SiHFB16N60L Vishay Siliconix 100000 VGS , Gate-to-Source Voltage (V) 10000 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd 12.0 ID= 15A 10.0 VDS= 480V VDS= 300V VDS= 120V 8.0 C, Capacitance(pF) Ciss 1000 Coss 100 6.0 Crss 10 4.0 2.0 1 1 10 100 1000 0.0 0 10 20 30 40 50 60 70 VDS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nC) Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 25 100.00 ISD, Reverse Drain Current (A) 20 10.00 T J = 150°C Energy (μJ) 15 10 1.00 T J = 25°C 5 0 0 100 200 300 400 500 600 700 VGS = 0V 0.10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V) Fig. 8 - Maximum Safe Operating Area VDS, Drain-to-Source Voltage (V) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 IRFB16N60L, SiHFB16N60L Vishay Siliconix 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 18 16 14 ID, Drain Current (A) 10000 ID, Drain-to-Source Current (A) 100 12 10 8 6 4 2 10 100μsec 1 Tc = 25°C Tj = 150°C Single Pulse 0.1 1 10 100 1msec 10msec 0 1000 25 50 75 100 125 150 VDS, Drain-to-Source Voltage (V) Fig. 9 - Maximum Safe Operating Area T C , Case Temperature (°C) Fig. 10 - Maximum Darin Current vs. Case Temperature VDS VGS RG RD VDS 90 % D.U.T. + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 10 % VGS td(on) tr td(off) tf Fig. 11a - Switching Time Test Circuit Fig. 11b - Switching Time Waveforms 1 Thermal Response ( Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 P DM 0.01 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty factor D = 2. Peak T t1/ t 2 t1 t2 J = P DM x Z thJC +T C 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 www.vishay.com 5 IRFB16N60L, SiHFB16N60L Vishay Siliconix 5.0 15 V VGS(th) Gate threshold Voltage (V) 4.5 VDS L Driver 4.0 RG 20 V D.U.T. IAS + A - VDD 3.5 ID = 250μA 3.0 tp 0.01 Ω Fig. 14b - Unclamped Inductive Test Circuit 2.5 VDS tp 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) Fig. 13 - Threshold Voltage vs. Temperature IAS Fig. 14c - Unclamped Inductive Waveforms VGS QG 600 EAS , Single Pulse Avalanche Energy (mJ) 500 ID TOP 7.2A 10A BOTTOM 16A QGS QGD VG 400 Charge Fig. 15a - Basic Gate Charge Waveform 300 Current regulator Same type as D.U.T. 50 kΩ 200 100 12 V 0.2 µF 0.3 µF + 0 25 50 75 100 125 150 VGS 3 mA D.U.T. - VDS Starting T J , Junction Temperature (°C) IG ID Current sampling resistors Fig. 14a - Maximum Avalanche Energy vs. Drain Current Fig. 15b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 IRFB16N60L, SiHFB16N60L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 16 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91097. Document Number: 91097 S-Pending-Rev. A, 03-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1