SI4816BDY-T1-E3

Si4816BDY Vishay Siliconix Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode PRODUCT SUMMARY VDS (V) Channel-1 30 Channel-2 RDS(on) (Ω) 0.0185 at VGS = 10 V 0.0225 at VGS = 4.5 V 0.0115 at VGS = 10 V 0.016 at VGS = 4.5 V ID (A) 6.8 6.0 11.4 9.5 Qg (Typ.) 7.8 11.6 FEATURES • Halogen-free According to IEC 61249-2-21 Available • LITTLE FOOT® Plus Power MOSFET • 100 % Rg Tested SCHOTTKY PRODUCT SUMMARY VDS (V) 30 VSD (V) Diode Forward Voltage 0.50 V at 1.0 A IF (A) 2.0 D1 SO-8 G1 A/S2 A/S2 G2 1 2 3 4 Top View Ordering Information: Si4816BDY-T1-E3 (Lead (Pb)-free) Si4816BDY-T1-GE3 (Lead (Pb)-free and Halogen-free) 8 7 6 5 D1 D2/S1 D2/S1 D2/S1 G2 N-Channel 2 MOSFET S2 A Schottky Diode G1 N-Channel 1 MOSFET S1/D2 ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Channel-1 Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150 °C)a Pulsed Drain Current Continuous Source Current (Diode Conduction) Single Pulse Avalanche Current Avalanche Energy Maximum Power Dissipationa a Channel-2 10 s Steady State Unit V 11.4 9.0 40 2.2 20 20 mJ 1.25 0.8 W °C 8.2 6.5 A 1.15 30 20 Symbol VDS VGS TA = 25 °C TA = 70 °C ID IDM IS IAS EAS PD TJ, Tstg 10 s Steady State 6.8 5.5 30 1 10 5 1.4 0.9 5.8 4.6 0.9 L = 0.1 mH TA = 25 °C TA = 70 °C 1.0 0.64 2.4 1.5 - 55 to 150 Operating Junction and Storage Temperature Range THERMAL RESISTANCE RATINGS Channel-1 Parameter Maximum Junction-to-Ambienta Maximum Junction-to-Foot (Drain) Notes: a. Surface Mounted on 1" x 1" FR4 board. Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 www.vishay.com 1 t ≤ 10 s Steady State Steady State Symbol RthJA RthJF Typ. 72 100 51 Max. 90 125 63 Channel-2 Typ. 43 82 25 Max. 53 100 30 Schottky Typ. 48 80 28 Max. 60 100 35 °C/W Unit Si4816BDY Vishay Siliconix MOSFET SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Static Gate Threshold Voltage Gate-Body Leakage VGS(th) IGSS VDS = VGS, ID = 250 µA VDS = 0 V, VGS = 20 V VDS = 30 V, VGS = 0 V Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V, TJ = 85 °C On-State Drain Currentb ID(on) VDS = 5 V, VGS = 10 V VGS = 10 V, ID = 6.8 A Drain-Source On-State Resistanceb RDS(on) VGS = 10 V, ID = 11.4 A VGS = 4.5 V, ID = 6.0 A VGS = 4.5 V, ID = 9.5 A Forward Transconductanceb Diode Forward Voltageb Dynamica Total Gate Charge Gate-Source Charge Gate-Drain Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time Qg Qgs Qgd Rg td(on) tr td(off) tf trr Channel-1 VDD = 15 V, RL = 15 Ω ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω Channel-2 VDD = 15 V, RL = 15 Ω ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω IF = 1.3 A, dI/dt = 100 A/µs IF = 2.2 A, dI/dt = 100 µA/µs Channel-2 VDS = 15 V, VGS = 5 V, ID = - 11.4 A Ch-1 Channel-1 VDS = 15 V, VGS = 5 V, ID = 6.8 A Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 1.5 0.9 7.8 11.6 2.9 4.8 2.3 3.7 3.0 1.8 11 13 9 9 24 31 9 11 20 25 4.5 2.7 17 20 15 15 40 50 15 17 35 40 ns Ω 10 18 nC gfs VSD VDS = 15 V, ID = 6.8 A VDS = 15 V, ID = 11.4 A IS = 1 A, VGS = 0 V IS = 1 A, VGS = 0 V Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 20 30 0.0155 0.0093 0.0185 0.013 30 31 0.73 0.47 1.1 0.5 0.0185 0.0115 0.0225 0.016 S V Ω 1.0 1.0 3.0 3.0 100 100 1 100 15 2000 A µA V nA Symbol Test Conditions Min. Typ.a Max. Unit Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 Si4816BDY Vishay Siliconix SCHOTTKY SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Forward Voltage Drop Symbol VF Test Conditions IF = 1.0 A IF = 1.0 A, TJ = 125 °C V R = 30 V Maximum Reverse Leakage Current Junction Capacitance Irm CT VR = 30 V, TJ = 100 °C VR = - 30 V, TJ = 125 °C V R = 10 V Min. Typ. 0.47 0.36 0.004 0.7 3.0 50 Max. 0.50 0.42 0.100 10 20 pF mA Unit V Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 35 I D – Drain Current (A) 30 25 20 15 10 3V 5 2V 0 0 1 2 3 4 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 5 25 °C - 55 °C 3.5 4.0 4.5 VGS = 10 thru 4 V I D – Drain Current (A) 40 35 30 25 20 15 TC = 125 °C 10 VDS – Drain-to-Source Voltage (V) VGS – Gate-to-Source Voltage (V) Output Characteristics 0.05 1200 Transfer Characteristics RDS(on) – On-Resistance (Ω) C – Capacitance (pF) 0.04 1000 Ciss 800 0.03 VGS = 4.5 V 0.02 VGS = 10 V 0.01 600 400 Coss 200 Crss 0.00 0 5 10 15 20 25 30 35 40 0 0 5 10 15 20 25 30 ID – Drain Current (A) VDS – Drain-to-Source Voltage (V) On-Resistance vs. Drain Current Capacitance Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 www.vishay.com 3 Si4816BDY Vishay Siliconix CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 6 V GS – Gate-to-Source Voltage (V) VDS = 15 V ID = 6.8 A 1.4 R DS(on) – On-Resistance 1.6 VGS = 10 V ID = 6.8 A 5 4 (Normalized) 1.2 3 1.0 2 0.8 1 0.6 - 50 0 0 2 4 6 8 10 Qg – Total Gate Charge (nC) - 25 0 25 50 75 100 125 150 TJ – Junction Temperature (°C) Gate Charge 40 0.05 On-Resistance vs. Junction Temperature TJ = 150 °C 10 RDS(on) – On-Resistance (Ω) 0.04 I S – Source Current (A) 0.03 ID = 6.8 A 0.02 TJ = 25 °C 0.01 1 0.0 0.00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 2 4 6 8 10 VSD – Source-to-Drain Voltage (V) VGS – Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage 0.4 100 On-Resistance vs. Gate-to-Source Voltage 0.2 V GS(th) Variance (V) ID = 250 µA 0.0 Power (W) 80 60 - 0.2 40 - 0.4 20 - 0.6 - 0.8 - 50 0 - 25 0 25 50 75 100 125 150 0.001 0.01 0.1 Time (s) 1 10 TJ – Temperature (°C) Threshold Voltage Single Pulse Power, Junction-to-Ambient www.vishay.com 4 Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 Si4816BDY Vishay Siliconix CHANNEL-1 TYPICAL CHARACTERISTICS 100 Limited by RDS(on)* IDM Limited 25 °C, unless otherwise noted 10 I D – Drain Current (A) 1 ms 1 ID(on) Limited 10 ms 100 ms 0.1 TC = 25 °C Single Pulse BVDSS Limited 0.01 0.1 1s 10 s DC 1 10 100 VDS – Drain-to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified Safe Operating Area 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 0.05 t1 PDM 0.02 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 100 °C/W 3. T JM - TA = PDMZthJA(t) 4. Surface Mounted Single Pulse 0.01 10- 4 10- 3 10- 2 10- 1 1 Square Wave Pulse Duration (s) 10 100 600 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10- 4 10- 3 10- 2 10- 1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 www.vishay.com 5 Si4816BDY Vishay Siliconix CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 VGS = 10 thru 5 V 32 I D – Drain Current (A) I D – Drain Current (A) 4V 24 32 40 24 16 16 TC = 125 °C 8 25 °C - 55 °C 8 3V 2V 0 0 1 2 3 4 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VDS – Drain-to-Source Voltage (V) VGS – Gate-to-Source Voltage (V) Output Characteristics 0.020 2000 Transfer Characteristics RDS(on) – On-Resistance (Ω) 0.016 C – Capacitance (pF) VGS = 4.5 V 0.012 VGS = 10 V 0.008 1600 Ciss 1200 800 Coss 0.004 400 Crss 0.000 0 5 10 15 20 25 30 0 0 6 12 18 24 30 ID – Drain Current (A) VDS – Drain-to-Source Voltage (V) On-Resistance vs. Drain Current 6 V GS – Gate-to-Source Voltage (V) VDS = 15 V ID = 9.5 A R DS(on) – On-Resistance 1.6 VGS = 10 V ID = 9.5 A Capacitance 5 1.4 4 (Normalized) 1.2 3 1.0 2 1 0.8 0 0 3 6 9 12 15 0.6 - 50 - 25 0 25 50 75 100 125 150 Qg – Total Gate Charge (nC) TJ – Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature www.vishay.com 6 Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 Si4816BDY Vishay Siliconix CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 0.05 TJ = 150 °C 10 R DS(on) – On-Resistance (Ω) 0.04 I S – Source Current (A) 0.03 TJ = 25 °C 0.02 ID = 9.5 A 0.01 1 0.0 0.00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 2 4 6 8 10 VSD – Source-to-Drain Voltage (V) VGS – Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage 10 100 On-Resistance vs. Gate-to-Source Voltage 1 IR – Reverse Current (mA) VDS = 30 V 0.1 Power (W) 80 60 0.01 VDS = 24 V 40 0.001 20 0.0001 0.00001 0 25 50 75 100 125 150 0 0.001 0.01 0.1 Time (s) 1 10 TJ – Temperature (°C) Reverse Current vs. Junction Temperature 100 Limited by RDS(on)* Single Pulse Power, Junction-to-Ambient IDM Limited 10 I D – Drain Current (A) 1 ms 1 ID(on) Limited 10 ms 100 ms 0.1 TC = 25 °C Single Pulse BVDSS Limited 0.01 0.1 1 10 100 VDS – Drain-to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified 1s 10 s DC Safe Operating Area Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 www.vishay.com 7 Si4816BDY Vishay Siliconix CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 1 Duty Cycle = 0.5 Normalized Effective Transient Thermal Impedance 0.2 0.1 0.1 0.05 Notes: PDM t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 82 °C/W 0.02 Single Pulse 0.01 10- 4 10- 3 10- 2 10- 1 1 3. T JM - TA = PDMZthJA(t) 4. Surface Mounted 10 100 600 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10- 4 10- 3 10- 2 10- 1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot www.vishay.com 8 Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 Si4816BDY Vishay Siliconix SCHOTTKY TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 20 10 I R – Reverse Current (mA) TJ = 150 °C 1 I F − Forward Current (A) 10 0.1 30 V 24 V TJ = 25 °C 0.01 0.001 0.0001 0 25 50 75 100 125 150 TJ – Temperature (°C) 1 0.0 0.3 0.6 0.9 1.2 1.5 VF − Forward Voltage Drop (V) Reverse Current vs. Junction Temperature Forward Voltage Drop 200 160 C – Capacitance (pF) 120 80 Coss 40 0 0 6 12 18 24 30 VDS – Drain-to-Source Voltage (V) Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73026. Document Number: 73026 S09-0394-Rev. D, 09-Mar-09 www.vishay.com 9 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 7 6 5 E 1 2 3 4 H S D 0.25 mm (Gage Plane) A h x 45 C All Leads q L 0.101 mm 0.004" e B A1 MILLIMETERS DIM A A1 B C D E e H h L q S 5.80 0.25 0.50 0° 0.44 Min 1.35 0.10 0.35 0.19 4.80 3.80 1.27 BSC 6.20 0.50 0.93 8° 0.64 0.228 0.010 0.020 0° 0.018 Max 1.75 0.20 0.51 0.25 5.00 4.00 Min 0.053 0.004 0.014 0.0075 0.189 0.150 INCHES Max 0.069 0.008 0.020 0.010 0.196 0.157 0.050 BSC 0.244 0.020 0.037 8° 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 VISHAY SILICONIX TrenchFET® Power MOSFETs Application Note 808 Mounting LITTLE FOOT®, SO-8 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.288 7.3 0.288 7.3 0.050 1.27 0.088 2.25 0.027 0.69 0.078 1.98 0.088 2.25 0.2 5.07 Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. www.vishay.com 1 APPLICATION NOTE 0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07 Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading Document Number: 70740 Revision: 18-Jun-07 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-8 0.172 (4.369) 0.028 (0.711) (6.248) 0.022 (0.559) 0.050 (1.270) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE www.vishay.com 22 (1.194) 0.047 (3.861) 0.246 0.152 Document Number: 72606 Revision: 21-Jan-08 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1