74AUP2G04GXZ

74AUP2G04 Low-power dual inverter Rev. 6 — 17 September 2015 Product data sheet 1. General description The 74AUP2G04 provides two inverting buffers. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range from 0.8 V to 3.6 V  High noise immunity  Complies with JEDEC standards:  JESD8-12 (0.8 V to 1.3 V)  JESD8-11 (0.9 V to 1.65 V)  JESD8-7 (1.2 V to 1.95 V)  JESD8-5 (1.8 V to 2.7 V)  JESD8-B (2.7 V to 3.6 V)  ESD protection:  HBM JESD22-A114F Class 3A exceeds 5000 V  MM JESD22-A115-A exceeds 200 V  CDM JESD22-C101E exceeds 1000 V  Low static power consumption; ICC = 0.9 A (maximum)  Latch-up performance exceeds 100 mA per JESD 78 Class II  Inputs accept voltages up to 3.6 V  Low noise overshoot and undershoot < 10 % of VCC  IOFF circuitry provides partial power-down mode operation  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C 74AUP2G04 Nexperia Low-power dual inverter 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G04GW 40 C to +125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP2G04GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1  1.45  0.5 mm 74AUP2G04GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1  1  0.5 mm 74AUP2G04GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9  1.0  0.35 mm SOT1115 74AUP2G04GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0  1.0  0.35 mm SOT1202 74AUP2G04GX 40 C to +125 C X2SON6 plastic thermal extremely thin small outline package; no leads; 6 terminals; body 1  0.8  0.35 mm SOT1255 4. Marking Table 2. Marking Type number Marking code[1] 74AUP2G04GW p4 74AUP2G04GM p4 74AUP2G04GF p4 74AUP2G04GN p4 74AUP2G04GS p4 74AUP2G04GX p4 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram  $ <   $ <    Logic symbol 74AUP2G04 Product data sheet    < $ PQE PQE Fig 1.  Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 6 — 17 September 2015 PQD Fig 3. Logic diagram © Nexperia B.V. 2017. All rights reserved 2 of 20 74AUP2G04 Nexperia Low-power dual inverter 6. Pinning information 6.1 Pinning $83* $83* $