0.1 GHz to 6 GHz Silicon SP5T Switch
ADRF5250
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VSS
RFC
ADRF5250
NEGATIVE
VOLTAGE
GENERATOR
DIGITAL
CONTROL
V2
V1
RF5
50Ω
BIAS
VDD
RF1
RF4
50Ω
50Ω
50Ω
50Ω
RF2
RF3
APPLICATIONS
V3
15506-001
Nonreflective 50 Ω design
Low insertion loss: 1.5 dB at 4 GHz
High isolation: 50 dB at 4 GHz
High input linearity
0.1 dB compression (P0.1dB): 34 dBm typical
Third-order intercept (IP3): 57 dBm typical
High power handling at 85°C
33 dBm through path
27 dBm terminated path
ESD rating
3.5 kV HBM, Class 2
Single-supply or dual-supply operation
Optional internal negative voltage generator (NVG)
1.8 V logic-compatible control
4 mm × 4 mm, 24-lead LFCSP
Figure 1.
Cellular/4G infrastructure
Wireless infrastructure
Mobile radios
Test equipment
GENERAL DESCRIPTION
The ADRF5250 is a general-purpose, single-pole, five-throw
(SP5T), nonreflective switch manufactured using a silicon
process. The ADRF5250 is available in a 4 mm × 4 mm, 24-lead
lead frame chip scale package (LFCSP) and provides high
isolation and low insertion loss from 100 MHz to 6 GHz.
Rev. 0
The ADRF5250 incorporates a negative voltage generator to
operate with a single positive supply voltage from 3.3 V to 5 V
applied to the VDD pin when the VSS pin is connected to
ground. The negative voltage generator can be disabled when
an external negative supply voltage of −3.3 V is applied to the
VSS pin. The ADRF5250 provides a 1.8 V logic-compatible,
3-pin control interface.
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ADRF5250
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Interface Schematics .....................................................................7
Applications ....................................................................................... 1
Typical Performance Characterics ..................................................8
Functional Block Diagram .............................................................. 1
Insertion Loss, Return Loss, And Isolation ...............................8
General Description ......................................................................... 1
Input Power Compression and Third-Order Intercept (IP3) ....9
Revision History ............................................................................... 2
Theory of Operation ...................................................................... 11
Specifications..................................................................................... 3
Applications Information .............................................................. 12
Absolute Maximum Ratings ............................................................ 5
Evaluation Board ........................................................................ 12
ESD Caution .................................................................................. 5
Outline Dimensions ....................................................................... 14
Pin Configuration and Function Descriptions ............................. 6
Ordering Guide .......................................................................... 14
REVISION HISTORY
6/2017—Revision 0: Initial Version
Rev. 0 | Page 2 of 15
Data Sheet
ADRF5250
SPECIFICATIONS
VDD = 5 V, VSS = 0 V, V1 = V2 = V3 = 0 V/VDD, TCASE = 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter
FREQUENCY RANGE
INSERTION LOSS
Between RFC and RFx (On)
Symbol
f
ISOLATION
Between RFC and RFx (Off )
RETURN LOSS
RFC and RFx (On)
RFx (Off )
SWITCHING
Rise Time
Fall Time
On and Off Time
Settling Time (RFx to RFx)
0.1 dB
0.05 dB
INPUT LINEARITY
0.1 dB Compression
Third-Order Intercept
SUPPLY CURRENT
Positive
Negative
DIGITAL CONTROL INPUTS
Voltage
Low
High
Current
Low and High
tRISE
tFALL
tON, tOFF
Test Conditions/Comments
Min
0.1
ISS
VINL
VINH
IINL, IINH
Max
6
Unit
GHz
0.1 GHz to 2 GHz
2 GHz to 4 GHz
4 GHz to 6 GHz
1.3
1.5
1.8
dB
dB
dB
0.1 GHz to 2 GHz
2 GHz to 4 GHz
4 GHz to 6 GHz
55
50
46
dB
dB
dB
0.1 GHz to 2 GHz
2 GHz to 4 GHz
4 GHz to 6 GHz
0.1 GHz to 2 GHz
2 GHz to 4 GHz
4 GHz to 6 GHz
15
13
13
17
15
8
dB
dB
dB
dB
dB
dB
10% to 90% of radio frequency (RF) output
10% to 90% of RF output
50% of digital control voltage (V1, V2, V3) to 90% of
RF output
40
80
150
ns
ns
ns
50% of V1, V2, V3 to 0.1 dB of final RF output
50% of V1, V2, V3 to 0.05 dB of final RF output
400
500
ns
ns
34
57
dB
dBm
360
280
−60
µA
µA
µA
P0.1dB
IP3
IDD
Typ
VDD, VSS pins
NVG enabled (VSS = 0 V)
NVG disabled (VSS = −3.3 V)
NVG disabled (VSS = −3.3 V)
V1, V2, V3 pins
VDD = 3.3 V
VDD = 5 V
VDD = 3.3 V
VDD = 5 V
VDD = 3.3 V to 5 V
Rev. 0 | Page 3 of 15
0
0
1.3
1.6
0.8
1.2
3.3
5
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