STB45N30M5

STB45N30M5 Datasheet N-channel 300 V, 53 A, 0.037 Ω typ., MDmesh™ M5 Power MOSFET in a D2PAK package Features TAB 2 3 1 D²PAK D(2, TAB) Order code VDS RDS(on) max. ID STB45N30M5 300 V 0.040 Ω 53 A • Extremely low RDS(on) • • • Low gate charge and input capacitance Excellent switching performance 100% avalanche tested Applications • Switching applications G(1) Description S(3) AM01475v1_noZen This device is an N-channel Power MOSFET based on the MDmesh™ M5 innovative vertical process technology combined with the well-known PowerMESH™ horizontal layout. The resulting product offers extremely low on-resistance, making it particularly suitable for applications requiring high power and superior efficiency. Product status link STB45N30M5 Product summary Order code STB45N30M5 Marking 45N30M5 Package D2PAK Packing Tape and reel DS12585 - Rev 1 - May 2018 For further information contact your local STMicroelectronics sales office. www.st.com STB45N30M5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at Tcase = 25 °C 53 Drain current (continuous) at Tcase = 100 °C 34 IDM(1) Drain current (pulsed) 212 A PTOT Total dissipation at Tcase = 25 °C 250 W Peak diode recovery voltage slope 15 V/ns -55 to 150 °C Value Unit VGS ID dv/dt(2) Tstg Tj Parameter Storage temperature range Operating junction temperature range A 1. Pulse width is limited by safe operating area. 2. ISD ≤ 53 A, di/dt ≤ 400 A/μs, VDS peak < V(BR)DSS,VDD = 240 V Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 0.5 Rthj-pcb(1) Thermal resistance junction-pcb 30 °C/W 1. When mounted on an 1-inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol IAR EAS DS12585 - Rev 1 Parameter Avalanche current, repetitive or not repetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Value Unit 16 A 550 mJ page 2/15 STB45N30M5 Electrical characteristics 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 4. On-/off-states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS= 0 V, ID = 1 mA Min. Typ. 300 Zero gate voltage drain current 1 µA 100 µA ±100 nA 4 5 V 0.037 0.040 Ω Min. Typ. Max. Unit - 4240 - pF - 205 - pF - 9.5 - pF - 373 - pF - 202 - pF VGS = 0 V, VDS = 300 V, TC = 125 °C(1) IGSS Gate body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 26.5 A Unit V VGS = 0 V, VDS = 300 V IDSS Max. 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Co(er)(2) Time-related equivalent capacitance Energy-related equivalent capacitance Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V VDS = 0 to 240 V, VGS = 0 V RG Gate input resistance f = 1 MHz, ID = 0 A - 1.4 - Ω Qg Total gate charge VDD = 240 V, ID = 24 A, - 95 - nC Qgs Gate-source charge VGS = 0 to 10 V - 23 - nC Gate-drain charge (see Figure 15. Test circuit for gate charge behavior) - 37 - nC Qgd 1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. Table 6. Switching times Symbol Test conditions Min. Typ. Max. Unit td(v) Voltage delay time VDD = 240 V, ID = 32 A, - 66 - ns tr(v) Voltage rise time RG = 4.7 Ω, VGS = 10 V - 15 - ns Current fall time (see Figure 16. Test circuit for inductive load switching and diode recovery times and Figure 19. Switching time waveform) - 24 - ns - 22.5 - ns tf(i) tc(off) DS12585 - Rev 1 Parameter Crossing time page 3/15 STB45N30M5 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM(1) (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 53 A Source-drain current (pulsed) - 212 A 1.5 V Forward on voltage ISD = 53 A, VGS = 0 V - trr Reverse recovery time ISD = 48 A, di/dt = 100 A/µs, - 223 ns Qrr Reverse recovery charge VDD = 60 V - 2.5 µC Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 23 A trr Reverse recovery time ISD = 48 A, di/dt = 100 A/µs, - 280 ns Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C - 3.9 µC IRRM Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 28 A VSD IRRM 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DS12585 - Rev 1 page 4/15 STB45N30M5 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance AM18133v1 ID (A) 100 is ea ) ar S(on D R t x in n ma tio y ra d b e e p O imit L s hi 10 10µs 100µs 1ms 10ms 1 Tj=150°C Tc=25°C Single pulse 0.1 0.1 1 10 100 VDS(V) Figure 4. Transfer characteristics Figure 3. Output characteristics AM18134v1 ID (A) VGS=10V 140 9V 8V 120 VDS=25V 120 100 100 80 80 7V 60 AM18135v1 ID (A) 140 60 40 40 20 20 6V 0 0 10 5 20 15 VDS(V) Figure 5. Gate charge vs gate-source voltage AM18136v1 VGS (V) 12 VDD=240V ID=24A VDS 10 0 4 3 5 7 6 8 9 VGS(V) Figure 6. Static drain-source on-resistance VDS (V) RDS(on) (Ω ) 250 0.04 200 0.038 150 0.036 100 0.034 50 0.032 0 Qg(nC) 0.03 AM18137v1 VGS=10V 8 6 4 2 0 DS12585 - Rev 1 0 20 40 60 80 100 0 10 20 30 40 50 ID(A) page 5/15 STB45N30M5 Electrical characteristics (curves) Figure 7. Capacitance variations Figure 8. Output capacitance stored energy AM18138v1 C (pF) AM18139v1 Eoss (µJ) 10 10000 Ciss 8 1000 6 Coss 100 4 Crss 10 1 0.1 1 100 10 VDS(V) Figure 9. Normalized gate threshold voltage vs temperature AM07101v1 VGS(th) (norm) 1.10 2 0 50 VDS(V) AM07102v1 R DS(on) (norm) ID =26.5A VGS =10V 2.1 ID =250 µA 200 250 300 100 150 Figure 10. Normalized on-resistance vs temperature 1.00 1.7 0.90 1.3 0.9 0.80 0.70 -50 0 -25 0 25 50 75 100 TJ (°C) Figure 11. Normalized V(BR)DSS vs temperature AM10399v1 V(BR)DS S (norm) 1.08 0.5 -50 -25 25 0 50 75 100 TJ (°C) Figure 12. Source-drain diode forward characteristics AM07104v1 VSD (V) TJ =-50°C 1.2 ID = 1mA 1.06 TJ =25°C 1.0 1.04 0.8 1.02 1.00 0.6 0.98 TJ =150°C 0.4 0.96 0.2 0.94 0.92 -50 -25 DS12585 - Rev 1 0 0 25 50 75 100 TJ (°C) 0 10 20 30 40 50 ISD (A) page 6/15 STB45N30M5 Electrical characteristics (curves) Figure 13. Switching energy vs gate resistance AM18140v1 E (µJ) 1000 Eon VDD=240V VGS=10V ID=32A 800 600 Eoff 400 200 0 0 DS12585 - Rev 1 10 20 30 40 RG(Ω) page 7/15 STB45N30M5 Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A B L A B 3.3 µF D G + VD 100 µH fast diode B Figure 17. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform V(BR)DSS Figure 19. Switching time waveform Concept waveform for Inductive Load Turn-off Id VD 90%Vds 90%Id Tdelay -off IDM Vgs 90%Vgs on ID Vgs(I(t )) VDD VDD 10%Vds 10%Id Vds Trise AM01472v1 DS12585 - Rev 1 Tfall Tcross --over AM05540v2_for_M5 page 8/15 STB45N30M5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 D²PAK (TO-263) type A2 package information Figure 20. D²PAK (TO-263) type A2 package outline 0079457_A2_24 DS12585 - Rev 1 page 9/15 STB45N30M5 D²PAK (TO-263) type A2 package information Table 8. D²PAK (TO-263) type A2 package mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.70 8.90 9.10 E2 7.30 7.50 7.70 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 0.40 0° 8° Figure 21. D²PAK (TO-263) recommended footprint (dimensions are in mm) Footprint DS12585 - Rev 1 page 10/15 STB45N30M5 D²PAK packing information 4.2 D²PAK packing information Figure 22. D²PAK tape outline DS12585 - Rev 1 page 11/15 STB45N30M5 D²PAK packing information Figure 23. D²PAK reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 9. D²PAK tape and reel mechanical data Tape Dim. DS12585 - Rev 1 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 12/15 STB45N30M5 Revision history Table 10. Document revision history DS12585 - Rev 1 Date Version 16-May-2018 1 Changes Initial release page 13/15 STB45N30M5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 4.1 D²PAK (TO-263) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 DS12585 - Rev 1 page 14/15 STB45N30M5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS12585 - Rev 1 page 15/15