IAUZ40N06S5N050ATMA1 数据手册
IAUZ40N06S5N050
OptiMOS™-5 Power Transistor
Product Summary
Features
• OptiMOS™ power MOSFET for automotive applications
• N-channel - Enhancement mode - Normal level
VDS
60
V
RDS(on),max
5
mW
ID
40
A
• MSL1 up to 260°C peak reflow
PG-TSDSON-8-33
• 175 °C operating temperature
• Green product (RoHS compliant)
• 100% Avalanche tested
Type
Package
Marking
IAUZ40N06S5N050
PG-TSDSON-8-33
5N06050
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Drain current
ID
Conditions
V GS=10 V, Chip
limitation1,2)
V GS=10V, DC
current3)
T a=85 °C, V GS=10 V,
Value
86
Unit
A
40
R thJA on 2s2p2,4)
14
Pulsed drain current2)
I D,pulse
T C=25 °C, t p= 100 µs
241
Avalanche energy, single pulse2)
E AS
I D=20 A
115
mJ
Avalanche current, single pulse
I AS
-
40
A
Gate source voltage
V GS
-
±20
V
Power dissipation
P tot
T C=25 °C
71
W
Operating and storage temperature
T j, T stg
-
-55 ... +175
°C
Rev. 1.1
page 1
2021-03-18
IAUZ40N06S5N050
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics2)
Thermal resistance, junction - case
R thJC
-
-
-
2.1
Thermal resistance, junction ambient4)
R thJA
-
-
35.5
-
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0V, I D=1mA
60
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=29µA
2.2
2.8
3.4
Zero gate voltage drain current
I DSS
V DS=60V, V GS=0V,
T j=25°C
-
-
1
T j=125°C1)
-
-
100
V DS=60V, V GS=0V,
V
µA
Gate-source leakage current
I GSS
V GS=20V, V DS=0V
-
-
100
nA
Drain-source on-state resistance
R DS(on)
V GS=7V, I D=10A
-
5.0
6.0
mW
V GS=10V, I D=20A
-
4.0
5.0
-
-
1.5
-
Gate resistance2)
Rev. 1.1
RG
page 2
W
2021-03-18
IAUZ40N06S5N050
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
1692
2200
-
373
485
Dynamic characteristics2)
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
18
26
Turn-on delay time
t d(on)
-
3.8
-
Turn-off delay time
t d(off)
-
8.9
-
Rise time
tr
-
1.0
-
Fall time
tf
-
4.6
-
Gate to source charge
Q gs
-
7.7
10.0
Gate to drain charge
Q gd
-
4.4
6.6
Gate charge total
Qg
-
23.5
30.5
Gate plateau voltage
V plateau
-
4.5
-
V
A
V GS=0V, V DS=30V,
f =1MHz
V DD=30V, V GS=10V,
I D=20A, R G,ext=3.5W
pF
ns
Gate Charge Characteristics2)
V DD=30V, I D=20A,
V GS=0 to 10V
nC
Reverse Diode
Diode continous forward current2)
IS
T C=25°C
-
-
40
Diode pulse current2)
I S,pulse
T C=25 °C, t p= 100 µs
-
-
241
Diode forward voltage
V SD
V GS=0V, I F=20A,
T j=25°C
-
0.8
1.1
V
Reverse recovery time2)
t rr
-
30
-
ns
Reverse recovery charge2)
Q rr
-
22
-
nC
V R=30V, I F=40A,
di F/dt =100A/µs
1)
Practically the current is limited by the overall system design including the customer-specific PCB.
2)
The parameter is not subject to production test - verified by design/characterization.
3)
The product can operate at a specified current based on best practice to minimze electromigration at the solder
joint. For rare events and inrush currents, the value may be exceeded.
4)
Device on a four-layer 2s2p FR4 PCB defined in accordance with JEDEC standards (JESD51-5-7). PCB is vertical
in still air.
Rev. 1.1
page 3
2021-03-18
IAUZ40N06S5N050
1 Power dissipation
2 Drain current
P tot = f(T C); V GS = 10 V
I D = f(T C); V GS = 10 V
80
100
90
80
60
70
Chip current
ID [A]
Ptot [W]
60
40
50
DC current
40
30
20
20
10
0
0
0
50
100
150
200
0
50
100
TC [°C]
150
200
TC [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D = f(V DS); T C = 25 °C; D = 0
Z thJC = f(t p)
parameter: t p
parameter: D =t p/T
1000
101
1 µs
100
0.5
10 µs
100
ZthJC [K/W]
100 µs
ID [A]
150 µs
0.1
0.05
10-1
0.01
10
single pulse
10-2
1
10-3
0.1
1
10
100
VDS [V]
Rev. 1.1
10-6
10-5
10-4
10-3
10-2
10-1
100
tp [s]
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IAUZ40N06S5N050
5 Typ. output characteristics
6 Typ. drain-source on-state resistance
I D = f(V DS); T j = 25 °C
R DS(on) = f(I D); T j = 25 °C
parameter: V GS
parameter: V GS
200
30
10 V
7V
25
160
6V
5V
20
RDS(on) [mW]
ID [A]
120
5.5 V
80
15
5.5 V
10
5V
6V
40
7V
5
0
0
1
2
3
4
5
10 V
0
6
0
20
40
VDS [V]
60
80
100
ID [A]
7 Typ. transfer characteristics
8 Typ. drain-source on-state resistance
I D = f(V GS); V DS = 6V
R DS(on) = f(T j);
parameter: T j
parameter: ID, VGS
300
10
9
-55 °C
250
25 °C
VGS=7V, ID=10A
7
200
175 °C
RDS(on) [mW]
ID [A]
8
150
6
5
4
VGS=10V, ID=20A
100
3
2
50
1
0
1
2
3
4
5
6
7
VGS [V]
Rev. 1.1
0
-60
-20
20
60
100
140
180
Tj [°C]
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IAUZ40N06S5N050
9 Typ. gate threshold voltage
10 Typ. capacitances
V GS(th) = f(T j); V GS = V DS
C = f(V DS); V GS = 0 V; f = 1 MHz
parameter: I D
3.5
104
3
103
Ciss
Coss
C [pF]
VGS(th) [V]
290 µA
29 µA
102
2.5
Crss
2
1.5
101
-60
-20
20
60
100
140
0
180
10
20
30
40
50
60
VDS [V]
Tj [°C]
11 Typical forward diode characteristics
12 Avalanche characteristics
IF = f(VSD)
I AS= f(t AV)
parameter: T j
parameter: Tj(start)
100
103
25 °C
102
IF [A]
IAV [A]
100 °C
150 °C
10
101
175 °C
17525
°C°C 25 °C
100
0
0.2
0.4
0.6
0.8
1
1.2
1.4
VSD [V]
Rev. 1.1
1
0.1
1
10
100
1000
tAV [µs]
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IAUZ40N06S5N050
13 Avalanche energy
14 Drain-source breakdown voltage
E AS = f(T j)
V BR(DSS) = f(T j); I D = 1 mA
parameter: I D
66
250
64
10 A
200
EAS [mJ]
VBR(DSS) [V]
150
100
20 A
60
58
40 A
50
62
56
0
25
75
125
-55
175
-15
Tj [°C]
25
65
105
145
Tj [°C]
15 Typ. gate charge
16 Gate charge waveforms
V GS = f(Q gate); I D = 20 A pulsed
parameter: V DD
10
V GS
12 V
9
Qg
30 V
8
48V
7
VGS [V]
6
5
V gs(th)
4
3
2
Q g(th)
Q sw
Q gate
1
Q gs
0
0
2
4
6
Q gd
8 10 12 14 16 18 20 22 24
Qgate [nC]
Rev. 1.1
page 7
2021-03-18
IAUZ40N06S5N050
Package Outline
#######
Footprint
Packaging
Rev. 1.1
page 8
2021-03-18
IAUZ40N06S5N050
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2021
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.1
page 9
2021-03-18
IAUZ40N06S5N050
Revision History
Version
Date
Changes
Revision 1.0
05.05.2020
Final Data Sheet
Revision 1.1
18.03.2021
Modified package outline and
footprint
Rev. 1.1
page 10
2021-03-18