IAUZ40N08S5N100ATMA1

IAUZ40N08S5N100 OptiMOS™-5 Power-Transistor Product Summary Features • OptiMOS™ - power MOSFET for automotive applications • N-channel - Enhancement mode - Normal Level VDS 80 V RDS(on) 10 mW ID 40 A • MSL1 up to 260°C peak reflow PG-TSDSON-8 • 175°C operating temperature • Green product (RoHS compliant) • 100% Avalanche tested 1 Quality Features • Infineon Automotive Quality 1 • Extended qualification beyond AEC Q101 • Enhanced testing • Advanced adhesion against delamination • Complementary testing for board level reliability Type Package Marking IAUZ40N08S5N100 PG-TSDSON-8 5N08100 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continous drain current ID Conditions T C=25°C,V GS=10V1) T C=100 °C, Value 40 V GS=10 V2) 40 Unit A Pulsed drain current2) I D,pulse T C=25°C 160 Avalanche energy, single pulse2) E AS I D=20 A 75 mJ Avalanche current, single pulse I AS - 32 A Gate source voltage V GS - ±20 V Power dissipation P tot T C=25 °C 68 W Operating and storage temperature T j, T stg - -55 ... +175 °C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Rev. 1.0 page 1 2019-09-16 IAUZ40N08S5N100 Parameter Symbol Values Conditions Unit min. typ. max. - - 2.2 - 38.5 - Thermal characteristics2) Thermal resistance, junction - case R thJC Thermal resistance, junction - ambient3) RthJA - K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 80 - - Gate threshold voltage V GS(th) V DS=V GS, I D=27 µA 2.2 3 3.8 Zero gate voltage drain current I DSS V DS=80 V, V GS=0 V, T j=25 °C - - 1 T j=85 °C2) - - 100 V DS=80 V, V GS=0 V, V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance RDS(on) V GS=6 V, I D=10 A - 11.6 14.5 mΩ V GS=10 V, I D=20 A - 8.4 10 - 1.2 - Gate resistance2) RG W IAUZ40N08S5N100 Parameter Symbol Values Conditions Unit min. typ. max. - 1224 1591 - 231 300 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 13.5 20 Turn-on delay time t d(on) - 3 - Rise time tr - 1 - Turn-off delay time t d(off) - 7 - Fall time tf - 5 - Gate to source charge Q gs - 5.8 7.5 Gate to drain charge Q gd - 4.5 6.8 Gate charge total Qg - 18.6 24.2 Gate plateau voltage V plateau - 4.8 - V - - 40 A - - 147 - 0.9 1.2 V - 37 - ns - 32 - nC V GS=0 V, V DS=40 V, f =1 MHz V DD=40 V, V GS=10 V, I D=40 A, R G=3.5 W pF ns Gate Charge Characteristics2) V DD=40 V, I D=20 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD Reverse recovery time2) t rr Reverse recovery charge2) Q rr T C=25 °C V GS=0 V, I F=20 A, T j=25 °C V R=40 V, I F=40A, di F/dt =100 A/µs 1) Current is limited by bondwire; with an R thJC = 2.2 K/W the chip is able to carry 58A at 25°C. 2) The parameter is not subject to production test - verified by design/chracterization. 3) Device on four layer 2s2p PCB defined in accordance with JEDEC standards (JESD51-5-7). PCB is vertical in still air. Rev. 1.0 page 3 2019-09-16 IAUZ40N08S5N100 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS ≥ 6 V 80 45 70 40 35 60 30 ID [A] Ptot [W] 50 40 25 20 30 15 20 10 10 5 0 0 0 50 100 150 200 0 50 100 TC [°C] 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 101 1 µs 0.5 10 µs 100 100 ZthJC [K/W] ID [A] 100 µs 150 µs 10 0.1 0.05 10-1 0.01 single pulse 1 10-2 0.1 1 10 100 VDS [V] Rev. 1.0 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2019-09-16 IAUZ40N08S5N100 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = (I D); T j = 25 °C parameter: V GS parameter: V GS 25 300 23 10 V 5.5 V 5V 250 6V 21 6.5 V 19 200 RDS(on) [mW] ID [A] 7V 150 6.5 V 100 6V 17 15 13 11 5.5 V 9 5V 7 10 V 50 5 0 0 1 2 3 4 5 6 0 7 50 100 150 200 250 ID [A] VDS [V] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 20 A; V GS = 10 V parameter: T j 300 18 16 250 -55 °C 14 ID [A] 25 °C 150 175 °C RDS(on) [mW] 200 12 10 100 8 50 6 4 0 2 3 4 5 6 -60 7 20 60 100 140 180 Tj [°C] VGS [V] Rev. 1.0 -20 page 5 2019-09-16 IAUZ40N08S5N100 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 4 3.5 Ciss 270 µA 103 C [pF] VGS(th) [V] 3 27 µA 2.5 Coss 102 2 1.5 Crss 101 1 -60 -20 20 60 100 140 0 180 20 40 60 80 VDS [V] Tj [°C] 11 Typical forward diode characteristicis 12 Typ. avalanche characteristics IF = f(VSD) I AS = f(t AV) parameter: T j parameter: Tj(start) 100 103 102 IF [A] 175 °C IAV [A] 25 °C 25 °C 100 °C 10 150 °C 101 1 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VSD [V] Rev. 1.0 1 10 100 1000 tAV [µs] page 6 2019-09-16 IAUZ40N08S5N100 13 Typical avalanche energy 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D_typ = 1 mA parameter: I D 87 160 86 140 85 10 A 120 84 83 VBR(DSS) [V] EAS [mJ] 100 80 20 A 60 82 81 80 79 40 32 A 78 20 77 76 0 25 75 125 -60 175 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 20 A pulsed parameter: V DD 10 9 V GS 16 V 64 V 8 Qg 40 V 7 VGS [V] 6 5 4 3 2 Q gate 1 Q gs Q gd 0 0 5 10 15 20 Qgate [nC] Rev. 1.0 page 7 2019-09-16 IAUZ40N08S5N100 PG-TSDSON-8: Outline Footprint Dimensions in mm Packaging Rev. 1.0 page 8 2019-09-16 IAUZ40N08S5N100 Published by Infineon Technologies AG 85579 Neubiberg, Germany © Infineon Technologies AG 2019 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 9 2019-09-16