FDG6317NZ
January 2004
FDG6317NZ
Dual 20v N-Channel PowerTrench® MOSFET
General Description
This dual N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized use in small switching regulators, providing an extremely low RDS(ON) and gate charge (QG) in a small package.
Features
• 0.7 A, 20 V. RDS(ON) = 400 mΩ @ VGS = 4.5 V RDS(ON) = 550 mΩ @ VGS = 2.5 V
• ESD protection diode (note 3) • Low gate charge • High performance trench technology for extremely low RDS(ON) • Compact industry standard SC70-6 surface mount package
Applications
• DC/DC converter • Power management • Loadswitch
S G D D G
Pin 1
S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed
TA=25oC unless otherwise noted
Parameter
Ratings
20 ± 12
(Note 1)
Units
V V A W °C
0.7 2.1 0.3 –55 to +150
Power Dissipation for Single Operation
(Note 1)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1)
415
°C/W
Package Marking and Ordering Information
Device Marking .67 Device FDG6317NZ Reel Size 7’’ Tape width 8mm Quantity 3000 units
©2004 Fairchild Semiconductor Corporation
FDG6317NZ Rev B (W)
FDG6317NZ
Electrical Characteristics
Symbol
BVDSS ∆BVDSS ∆TJ IDSS IGSS IGSS
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
20
Typ
Max Units
V
Off Characteristics
Drain–Source Breakdown VGS = 0 V, ID = 250 µA Voltage Breakdown Voltage Temperature ID = 250 µA, Referenced to 25°C Coefficient Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V Gate–Body Leakage Gate–Body Leakage
(Note 2)
13 1 ± 10 ±1
mV/°C µA µA µA
VGS = ± 12 V, VDS = 0 V VGS = ± 4.5 V, VDS = 0 V ID = 250 µA
On Characteristics
VGS(th) ∆VGS(th) ∆TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current Forward Transconductance
VDS = VGS,
0.6
1.2 –2 300 450 390
1.5
V mV/°C
ID = –250 µA, Referenced to 25°C VGS = 4.5 V, VGS = 2.5 V, VGS = 4.5 V, VGS = 4.5 V, VDS = 5 V, ID = 0.7 A ID = 0.6 A ID = 0.7 A, TJ=125°C VDS = 5 V ID = 0.7 A
400 550 560
mΩ
ID(on) gFS
1 1.8
A S
Dynamic Characteristics
Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
(Note 2)
VDS = 10 V, f = 1.0 MHz
V GS = 0 V,
66.5 19 10 5.8
pF pF pF Ω
VGS = 15 mV, f = 1.0 MHz
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge
VDD = 10 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 Ω
5.5 7 7.5 2.5
11 15 15 5 1.1
ns ns ns ns nC nC nC
VDS = 10 V, VGS = 4.5 V
ID = 0.7 A,
0.76 0.18 0.20
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IF = 0.7 A, IS = 0.25 A
(Note 2)
0.25 0.8 8.3 1.2 1.2
A V nS nC
diF/dt = 100 A/µs
Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. RθJA = 415°C/W when mounted on a minimum pad . 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDG6317NZ Rev B (W)
FDG6317NZ
Typical Characteristics
2 VGS = 10V ID, DRAIN CURRENT (A) 4.5V 1.5 2.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 3.0V 2.5V
1.7 VGS = 2.5V 1.5
1
1.3
3.0V 3.5V 4.0V
2.0V 0.5
1.1
4.5V 6.0V 10V
0 0 0.5 1 1.5 2 2.5 VDS, DRAIN-SOURCE VOLTAGE (V)
0.9 0 0.5 1 ID, DRAIN CURRENT (A) 1.5 2
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1 RDS(ON), ON-RESISTANCE (OHM)
1.5 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100
o
ID = 0.7A VGS =10V
ID = 0.35A 0.8
0.6 TA = 125oC 0.4 TA = 25oC 0.2 0 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V)
125
150
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation with Temperature.
2 VDS = 5V ID, DRAIN CURRENT (A) 1.5 25oC 1 IS, REVERSE DRAIN CURRENT (A) TA = 125 C
o
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
10
-55oC
VGS = 0V 1 TA = 125oC 0.1 25 C 0.01 -55oC 0.001
o
0.5
0 0 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDG6317NZ Rev B (W)
FDG6317NZ
Typical Characteristics
5 VGS, GATE-SOURCE VOLTAGE (V) ID = 0.7A 4 10V 3
CAPACITANCE (pF)
100
VDS = 5V
15V
f = 1MHz VGS = 0 V
75
Ciss
50
2
Coss
25
1
Crss
0 0 0.2 0.4 0.6 0.8 1 Qg, GATE CHARGE (nC)
0 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
10 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT ID, DRAIN CURRENT (A) 100µs 1 1s 0.1 VGS = 10V SINGLE PULSE RθJA = 415oC/W TA = 25 C 0.001 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V)
o
Figure 8. Capacitance Characteristics.
10 SINGLE PULSE RθJA = 415°C/W TA = 25°C
1ms 10ms 100m DC
8
6
4
0.01
2
0 0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5
RθJA(t) = r(t)*RθJA RθJA = 415°C/W
0.1 0.05 0.02 0.01 SINGLE PULSE
0.2
0.1
P(pk)
t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2
0.01 0.0001
0.001
0.01
0.1 t1, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1. Transient thermal response will change depending on the circuit board design.
FDG6317NZ Rev B (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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DISCLAIMER
ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™
POP™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™
Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™
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Preliminary
First Production
No Identification Needed
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This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I8