FDG6317NZ

FDG6317NZ MOSFET – Dual, N-Channel, POWERTRENCH) 20 V, 2.1 A, 550 mW General Description This dual N−Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized use in small switching regulators, providing an extremely Iow RDS(ON) and gate charge (QG) in a small package. www.onsemi.com VDSS RDS(ON) MAX ID MAX 20 V 550 mW 2.1 A Features • 0.7 A, 20 V RDS(ON) = 400 mW @ VGS = 4.5 V RDS(ON) = 550 mW @ VGS = 2.5 V Gate−Source Zener for ESD ruggedness Low Gate Charge High Performance Trench Technology for Extremely Low RDS(ON) Compact Industry Standard SC70−6 Surface Mount Package These Devices are Pb−Free and are RoHS Compliant ♦ • • • • • ♦ Applications D • DC/DC Converter • Power Management • Load Switch S Parameter Ratings Units Drain−Source Voltage 20 V VGSS Gate−Source Voltage ±12 V ID Drain Current: Continuous (Note1) Pulsed 0.7 2.1 PD Power Dissipation for Single Operation Operating and Storage Junction Temperature Range G D SC70−6 CASE 419B VDSS TJ, TSTG D Pin 1 MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Symbol G MARKING DIAGRAM &E&E&E& &Y &.67&G A 0.3 W −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. &Y &.67&G = Data Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. THERMAL CHARACTERISTICS Symbol RqJA Parameter Thermal Resistance, Junction to Ambient, (Note 1) FDG6317NZ Unit 415 _C/W 1. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design while RqJA is determined by the user’s board design. RqJA = 415_C/W when mounted on a minimum pad. © Semiconductor Components Industries, LLC, 2017 July, 2019 − Rev.2 1 Publication Order Number: FDG6317NZ/D FDG6317NZ PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Reel Size Tape Width Quantity .67 FDG6317NZ 7” 8 mm 3000 units ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min. Typ. Max. Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage VGS = 0 V, ID = 250 mA 20 − − V DBVDSS/DTJ Breakdown Voltage Temperature Coefficient ID = 250 mA, Referenced to 25_C − 13 − mV/_C IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V − − 1 mA IGSS Gate−Body Leakage VGS = ±12 V, VDS = 0 V − − ±10 mA IGSS Gate−Body Leakage VGS = ±4.5 V, VDS = 0 V ±1 mA 1.5 V BVDSS ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 mA DVGS(th)/DTJ Gate Threshold Voltage Temperature Coefficient ID = −250 mA, Referenced to 25_C Static Drain−Source On−Resistance VGS = 4.5 V, ID = 0.7 A VGS = 2.5 V, ID = 0.6 A VGS = 4.5 V, ID = 0.7 A, TJ = 125_C On−State Drain Current VGS = 10 V, VDS = 0 V 1 Forward Transconductance VDS = 20 V, ID = 5 A − 1.8 − S VDS = 10 V, VGS = 0 V, f = 1.0 MHz − 66.5 − pF RDS(on) ID(on) gFS 0.6 1.2 − −2 300 450 390 mV/_C 400 550 560 mW A DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 19 − pF Reverse Transfer Capacitance − 10 − pF VGS = 15 mV, f = 1.0 MHz − 5.8 − W VDD = 10 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 W − 5.5 11 ns − 7 15 ns Crss(eff.) RG Gate Resistance SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time − 7.5 15 ns tf Turn-Off Fall Time − 2.5 5 ns Qg Total Gate Charge 0.76 1.1 nC Qgs Gate−Source Charge Qgd Gate−Drain Charge VDS = 10 V, ID = 0.7 A, VGS = 4.5 V, 0.18 nC 0.20 nC DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Source to Drain Diode Forward Current − − 0.25 A VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 0.25 A (Note 2) − 0.8 1.2 V trr Diode Reverse Recovery Time IF = 0.7 A, dIF/dt = 100 A/ms − 8.3 − nS Qrr Diode Reverse Recovery Charge − 1.2 − nC IS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. www.onsemi.com 2 FDG6317NZ TYPICAL PERFORMANCE CHARACTERISTICS 1.7 2 ID, DRAIN CURRENT (A) 2.5V 2.0V 4.5V 1.5 RDS(ON) , NORMALIZED DRAIN−SOURCE ON−RESISTANCE 3.0V VGS = 10V 1 2.0V 0.5 VGS = 2.5V 1.5 3.0V 1.3 3.5V 4.0V 1.1 4.5V 6.0V 10V 0.9 0 0 0.5 1 1.5 2 0 2.5 0.5 Figure 1. On−Region Characteristics 2 1 ID = 0.7A VGS =10V 1.4 ID = 0.35A RDS(ON) , ON−RESISTANCE (OHM) RDS(ON) , NORMALIZED DRAIN−SOURCE ON−RESISTANCE 1.5 Figure 2. On−Resistance Variation with Drain Current and Gate Voltage 1.5 1.3 1.2 1.1 1 0.9 0.8 0.7 −50 −25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE ( o 125 0.8 0.6 o TA = 125 C 0.4 o TA = 25 C 0.2 150 0 2 C) 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On−Resistance Variation with Temperature Figure 4. On−Resistance Variation with Gate−to−Source Voltage 10 2 o o TA = 125 C −55 C IS, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 1 ID, DRAIN CURRENT (A) VDS, DRAIN−SOURCE VOLTAGE (V) 1.5 o 25 C 1 0.5 VGS = 0V 1 o TA = 125 C 0.1 o 25 C 0.01 −55oC 0.001 0.0001 0 0 1 2 3 0 4 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD, BODY DIODE FORWARD VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature www.onsemi.com 3 FDG6317NZ TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 5 100 15V VDS = 5V f = 1MHz VGS = 0 V 4 CAPACITANCE (pF) VGS, GATE−SOURCE VOLTAGE (V) ID = 0.7A 10V 3 2 1 75 Ciss 50 Coss 25 Crss 0 0 0 0.2 0.4 0.6 0.8 1 0 5 Qg, GATE CHARGE (nC) 10 15 Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics 10 10 SINGLE PULSE RqJA = 415°C/W TA = 25°C 1 1s 1ms 10ms 100m P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT ID, DRAIN CURRENT (A) 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 100ms DC 0.1 VGS = 10V SINGLE PULSE o RqJA = 415 C/W 0.01 o TA = 25 C 0.001 0.1 1 10 8 6 4 2 0 0.0001 100 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE VDS, DRAIN−SOURCE VOLTAGE (V) 1 D = 0.5 RqJA(t) = r(t)*RqJA RθJA = 415°C/W 0.2 0.1 0.1 P(pk) 0.05 0.02 t1 0.01 t2 TJ − TA = P * R θJA(t) Duty Cycle, D = t 1 / t2 SINGLE PULSE 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 4 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y 1 SCALE 2:1 DATE 11 DEC 2012 2X aaa H D D H A D 6 5 GAGE PLANE 4 1 2 L L2 E1 E DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X b ddd TOP VIEW C A-B D M A2 DETAIL A A 6X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. ccc C A1 SIDE VIEW C SEATING PLANE END VIEW c RECOMMENDED SOLDERING FOOTPRINT* 6X DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 −−− 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 GENERIC MARKING DIAGRAM* 6 XXXMG G 6X 0.30 INCHES NOM MAX −−− 0.043 −−− 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN −−− 0.000 0.027 0.006 0.003 0.070 0.078 0.045 0.66 1 2.50 0.65 PITCH XXX = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *Date Code orientation and/or position may vary depending upon manufacturing location. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y DATE 11 DEC 2012 STYLE 1: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 4: PIN 1. CATHODE 2. CATHODE 3. COLLECTOR 4. EMITTER 5. BASE 6. ANODE STYLE 5: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 6: PIN 1. ANODE 2 2. N/C 3. CATHODE 1 4. ANODE 1 5. N/C 6. CATHODE 2 STYLE 7: PIN 1. SOURCE 2 2. DRAIN 2 3. GATE 1 4. SOURCE 1 5. DRAIN 1 6. GATE 2 STYLE 8: CANCELLED STYLE 9: PIN 1. EMITTER 2 2. EMITTER 1 3. COLLECTOR 1 4. BASE 1 5. BASE 2 6. COLLECTOR 2 STYLE 10: PIN 1. SOURCE 2 2. SOURCE 1 3. GATE 1 4. DRAIN 1 5. DRAIN 2 6. GATE 2 STYLE 11: PIN 1. CATHODE 2 2. CATHODE 2 3. ANODE 1 4. CATHODE 1 5. CATHODE 1 6. ANODE 2 STYLE 12: PIN 1. ANODE 2 2. ANODE 2 3. CATHODE 1 4. ANODE 1 5. ANODE 1 6. CATHODE 2 STYLE 13: PIN 1. ANODE 2. N/C 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 14: PIN 1. VREF 2. GND 3. GND 4. IOUT 5. VEN 6. VCC STYLE 15: PIN 1. ANODE 1 2. ANODE 2 3. ANODE 3 4. CATHODE 3 5. CATHODE 2 6. CATHODE 1 STYLE 16: PIN 1. BASE 1 2. EMITTER 2 3. COLLECTOR 2 4. BASE 2 5. EMITTER 1 6. COLLECTOR 1 STYLE 17: PIN 1. BASE 1 2. EMITTER 1 3. COLLECTOR 2 4. BASE 2 5. EMITTER 2 6. COLLECTOR 1 STYLE 18: PIN 1. VIN1 2. VCC 3. VOUT2 4. VIN2 5. GND 6. VOUT1 STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF STYLE 20: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 21: PIN 1. ANODE 1 2. N/C 3. ANODE 2 4. CATHODE 2 5. N/C 6. CATHODE 1 STYLE 22: PIN 1. D1 (i) 2. GND 3. D2 (i) 4. D2 (c) 5. VBUS 6. D1 (c) STYLE 23: PIN 1. Vn 2. CH1 3. Vp 4. N/C 5. CH2 6. N/C STYLE 24: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE STYLE 25: PIN 1. BASE 1 2. CATHODE 3. COLLECTOR 2 4. BASE 2 5. EMITTER 6. COLLECTOR 1 STYLE 26: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 STYLE 27: PIN 1. BASE 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. EMITTER 2 6. COLLECTOR 2 STYLE 28: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 29: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE/ANODE 6. CATHODE STYLE 30: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. 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