ADP3118JRZ

ON Semiconductor Is Now To learn more about onsemi™, please visit our website at www.onsemi.com onsemi and       and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others. Dual Bootstrapped 12 V MOSFET Driver with Output Disable ADP3118 FEATURES GENERAL DESCRIPTION Optimized for low gate charge MOSFETs All-in-one synchronous buck driver Bootstrapped high-side drive One PWM signal generates both drives Anticross-conduction protection circuitry Output disable control turns off both MOSFETs to float output per Intel VRM 10 Meets CPU VR requirement when used with Analog Devices, Inc. Flex-Mode1 controller The ADP3118 is a dual, high voltage MOSFET driver optimized for driving two N-channel MOSFETs, which are the two switches in a nonisolated synchronous buck power converter. Each of the drivers is capable of driving a 3000 pF load with a 25 ns propagation delay and a 25 ns transition time. One of the drivers can be bootstrapped and is designed to handle the high voltage slew rate associated with floating high-side gate drivers. The ADP3118 includes overlapping drive protection to prevent shoot-through current in the external MOSFETs. APPLICATIONS The OD pin shuts off both the high-side and the low-side MOSFETs to prevent rapid output capacitor discharge during system shutdown. Multiphase desktop CPU supplies Single-supply synchronous buck converters The ADP3118 is specified over the commercial temperature range of 0°C to 85°C and is available in 8-lead SOIC and 8-lead LFCSP packages. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM VIN 12V VCC ADP3118 D1 4 1 BST CBST2 CBST1 IN 2 8 DRVH DELAY RBST 7 OD 3 DELAY TO INDUCTOR SW VCC 6 CMP CONTROL LOGIC Q1 5 6 DRVL Q2 PGND 05452-001 CMP 1V RG Figure 1. 1 Flex-Mode™ is protected by U.S. Patent 6683441. ©2008 SCILLC. All rights reserved. January 2008 – Rev. 2 Publication Order Number: ADP3118/D ADP3118 TABLE OF CONTENTS Features...............................................................................................1 Low-Side Driver ............................................................................ 9 Applications .......................................................................................1 High-Side Driver........................................................................... 9 General Description..........................................................................1 Overlap Protection Circuit .......................................................... 9 Simplified Functional Block Diagram............................................1 Application Information ................................................................10 Revision History................................................................................2 Supply Capacitor Selection........................................................10 Specifications .....................................................................................3 Bootstrap Circuit ........................................................................10 Absolute Maximum Ratings ............................................................4 MOSFET Selection .....................................................................10 ESD Caution ..................................................................................4 High-Side (Control) MOSFETs ................................................10 Pin Configuration and Function Descriptions .............................5 Low-Side (Synchronous) MOSFETs.........................................11 Timing Characteristics .....................................................................6 PC Board Layout Considerations .............................................11 Typical Performance Characteristics..............................................7 Outline Dimensions........................................................................13 Theory of Operation.........................................................................9 Ordering Guide ...........................................................................13 REVISION HISTORY 01/08 - Rev 2: Conversion to ON Semiconductor 9/07—Rev. 0 to Rev. A Added LFCSP...................................................................... Universal Updated Outline Dimensions........................................................13 Changes to Ordering Guide...........................................................13 4/05—Revision 0: Initial Version Rev. 2 | Page 2 of 14 | www.onsemi.com ADP3118 SPECIFICATIONS VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted.1 Table 1. Parameter PWM INPUT Input Voltage High Input Voltage Low Input Current Hysteresis OD INPUT Input Voltage High Input Voltage Low Input Current Hysteresis Propagation Delay Times2 HIGH-SIDE DRIVER Output Resistance, Sourcing Current Output Resistance, Sinking Current Output Resistance, Unbiased Transition Times Propagation Delay Times2 SW Pull-Down Resistance LOW-SIDE DRIVER Output Resistance, Sourcing Current Output Resistance, Sinking Current Output Resistance, Unbiased Transition Times Propagation Delay Times2 Symbol 1 2 Min Typ Max Unit 0.8 +1 V V μA mV 2.0 −1 90 250 2.0 tpdlOD See Figure 3 250 20 35 V V μA mV ns tpdhOD See Figure 3 40 55 ns BST − SW = 12 V BST − SW = 12 V BST − SW = 0 V BST − SW = 12 V, CLOAD = 3 nF, see Figure 4 BST − SW = 12 V, CLOAD = 3 nF, see Figure 4 BST − SW = 12 V, CLOAD = 3 nF, see Figure 4 BST − SW = 12 V, CLOAD = 3 nF, see Figure 4 SW to PGND 2.2 1.0 10 25 20 25 25 10 3.5 2.5 Ω Ω kΩ ns ns ns ns kΩ 3.2 2.5 VCC = PGND CLOAD = 3 nF, see Figure 4 CLOAD = 3 nF, see Figure 4 CLOAD = 3 nF, see Figure 4 CLOAD = 3 nF, see Figure 4 SW = 5 V SW = PGND 2.0 1.0 10 20 16 12 30 190 150 −1 90 trDRVH tfDRVH tpdhDRVH tpdlDRVH trDRVL tfDRVL tpdhDRVL tpdlDRVL Timeout Delay SUPPLY Supply Voltage Range Supply Current UVLO Voltage Hysteresis Conditions VCC ISYS 110 95 0.8 +1 4.15 BST = 12 V, IN = 0 V VCC rising 2 1.5 350 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods. For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to the signal going low. Rev. 2 | Page 3 of 14 | www.onsemi.com 40 30 40 35 35 30 35 45 13.2 5 3.0 Ω Ω kΩ ns ns ns ns ns ns V mA V mV ADP3118 ABSOLUTE MAXIMUM RATINGS Unless otherwise specified, all voltages are referenced to PGND. Table 2. Parameter VCC BST BST to SW SW DC