EFC2J013NUZTDG

EFC2J013NUZ Power MOSFET for 1‐Cell Lithium‐ion Battery Protection 12 V, 5.8 mW, 17 A, Dual N-Channel www.onsemi.com This Power MOSFET features a low on-state resistance. This device is suitable for applications such as power switches of portable machines. Best suited for 1-cell lithium-ion battery applications. Features • • • • • VSSS RSS(ON) MAX IS MAX 12 V 5.8 mW @ 4.5 V 17 A 6.2 mW @ 3.8 V 2.5 V Drive 2 kV ESD HBM Common-Drain Type ESD Diode-Protected Gate These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 7.5 mW @ 3.1 V 9.0 mW @ 2.5 V ELECTRICAL CONNECTION 4, 6 Applications • 1-Cell Lithium-ion Battery Charging and Discharging Switch 5 Specifications ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Parameter Symbol Value Unit Source to Source Voltage VSSS 12 V Gate to Source Voltage VGSS ±8 V Source Current (DC) IS 17 A Source Current (Pulse) PW ≤ 10 ms, duty cycle ≤ 1% ISP 68 A Total Dissipation (Note 1) PT 1.8 W Junction Temperature Tj 150 °C Storage Temperature Tstg −55 to +150 °C WLCSP6 (2.00 x 1.49 x 0.10) CASE 567UF 1 2 3 S1 G1 S1 S2 G2 S2 6 5 4 Bottom View MARKING DIAGRAM THERMAL RESISTANCE RATINGS Junction to Ambient (Note 1) 1, 3 N-Channel PIN ASSIGNMENT Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Parameter 1: Source1 2: Gate1 3: Source1 4: Source2 5: Gate2 6: Source2 2 Symbol Value Unit RθJA 69.4 °C/W 1. Surface mounted on ceramic substrate (5000 mm2 × 0.8 mm). NT G AYWZZ NT A Y W ZZ G = Specific Device Code = Assembly Location = Year = Work Week = Assembly Lot = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2018 November, 2018 − Rev. 1 1 Publication Order Number: EFC2J013NUZ/D EFC2J013NUZ ELECTRICAL CHARACTERISTICS (TA = 25°C) Parameter Conditions Min Source to Source Breakdown Voltage IS = 1 mA, VGS = 0 V, VSSS Test Circuit 12 ISSS Zero-Gate Voltage Source Current VSS = 10 V, VGS = 0 V 1 mA IGSS Gate to Source Leakage Current VGS = ±8 V, VSS = 0 V ±1 mA VGS(th) Gate Threshold Voltage VSS = 6 V, IS = 1 mA 0.4 1.3 V RSS(on) Static Source to Source On-State Resistance IS = 5 A, VGS = 4.5 V 3.0 4.35 5.8 mW IS = 5 A, VGS = 3.8 V 3.2 4.6 6.2 mW IS = 5 A, VGS = 3.1 V 3.4 5.0 7.5 mW IS = 5 A, VGS = 2.5 V 3.8 5.6 9.0 mW Symbol V(BR)SSS td(on) tr VSS = 5 V, VGS = 3.8 V, IS = 5 A Rg = 10 kW Switching Test Circuit Turn-ON Delay Time tf Qg VF(S−S) Max Unit V 11 ms 26 ms Turn-OFF Delay Time 130 ms Fall Time 73 ms 37 nC Rise Time td(off) Typ Total Gate Charge VSS = 5 V, VGS = 4.5 V, IS = 5 A Forward Source to Source Voltage IS = 3 A, VGS = 0 V 0.76 1.2 V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. td(on), tr, td(off), tf S2 S2 RL G2 G2 When FET1 is measured, Gate and Source of FET2 are short−circuited. Rg 1 mA, 5 ms V G1 G1 VSS S1 S1 Figure 1. Switching Test Circuit Figure 2. VSSS Test Circuit ORDERING INFORMATION Device Marking Package Shipping† (Qty / Packing) EFC2J013NUZTDG NT WLCSP6, 2.00 x 1.49 x 0.10 (Pb-Free / Halogen Free) 5,000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 2 EFC2J013NUZ TYPICAL CHARACTERISTICS VSS = 6 V Single pulse 4.5 V 4.0 3.8 V 3.0 2.0 9 6 25°C Source Current, IS – A 3.1 V VGS = 2.5 V −25°C 5.0 Source Current, IS – A 12 Ta = 25°C Single pulse Ta = 75°C 6.0 3 1.0 0 0 0 0.005 0.01 0.015 0.02 0.025 0.03 0 0.035 Figure 3. On-Region Characteristics Static Source to Source On State Resistance, RSS(on) – mΩ Static Source to Source On State Resistance, RSS(on) – mΩ 10 IS = 5 A Single pulse 7.0 6.5 6.0 5.5 Ta = 75°C 4.5 25°C 4.0 −25°C 3.5 3.0 1 4 3 2 5 6 1.4 Figure 4. Transfer Characteristics 8.0 5.0 1.2 1.0 Gate to Source Voltage, V GS – V Source to Source Voltage, V SS – V 7.5 0.8 0.6 7 Single pulse 9 IS = 5 A, VGS = 2.5 V 8 IS = 5 A, VGS = 3.1 V 7 6 5 IS = 5 A, VGS = 4.5 V 4 IS = 5 A, VGS = 3.8 V 3 2 −60 −40 −20 0 8 20 40 60 80 100 120 140 160 Ambient Temperature, Ta – °C Gate to Source Voltage, V GS – V Figure 5. On-Resistance vs. Gate-to-Source Voltage Figure 6. On-Resistance vs. Temperature 10.0 1000 Switching Time, S/W – ms 0.1 −25°C Ta = 75°C 1.0 25°C Source Current, IS – A VGS = 0 V 0.01 0.001 0 0.2 0.4 0.6 0.8 td(off) tf 10 tr t d(on) 1 0.1 1.2 1.0 100 Forward Source to Source Voltage, V F(S−S) – V VSS = 5 V VGS = 3.8 V IS = 5 A 10 Gate Resistance, Rg – kΩ Figure 7. Forward Source-to-Source Voltage vs. Current Figure 8. Switching Time vs. Gate Resistance www.onsemi.com 3 EFC2J013NUZ TYPICAL CHARACTERISTICS Gate to Source Voltage, VGS – V 4.5 100 VSS = 5 V IS = 5 A 4.0 ABSOLUTE MAXIMUM RATINGS 100 ms Source Current, IS – A 3.5 3.0 2.5 2.0 1.5 1.0 1 ms 10.0 1.0 Operation in this area is limited by RSS(on). 10 ms 100 ms DC Operation 0.1 Ta = 25°C Single pulse Surface mounted on ceramic substrate (5000 mm2 x 0.8 mm) 0.5 0 0 5 10 20 15 30 25 0.1 0.01 40 35 0.1 Total Gate Charge, Q g – nC 1.0 10.0 Source to Source Voltage, VSS – V Figure 9. Gate-to-Source Voltage vs. Total Charge Figure 10. Safe Operating Area 2.0 Surface mounted on ceramic substrate (5000 mm2 x 0.8 mm) Total Dissipation, P T – W 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 175 Ambient Temperature, Ta – °C Figure 11. Total Dissipation vs. Temperature Thermal Resistance, RqJA –°C/W 100 Duty Cycle = 50% 20% 10 10% 5% 2% 1.0 1% Single Pulse Surface mounted on ceramic substrate (5000 mm2 x 0.8 mm) 0.1 1E−05 0.0001 0.001 0.01 0.1 1.0 10 Pulse Time, PT – s Figure 12. Thermal Response Note on Usage: Since the EFC2J013NUZ is a MOSFET product, please avoid using this device in the vicinity of highly charged objects. Please contact sales for use except the designated application. www.onsemi.com 4 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WLCSP6 2.00x1.49x0.10 CASE 567UF ISSUE O SCALE 4:1 E PIN 1 REFERENCE A ÈÈÈ ÈÈÈ ÈÈÈ DATE 21 APR 2017 B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. DIM A b D E e D TOP VIEW GENERIC MARKING DIAGRAM* A 0.03 C XXXXX G AYWZZ 0.03 C C SIDE VIEW SEATING PLANE XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week ZZ = Assembly Lot G = Pb−Free Package e 3 4 e 1 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. 6 6X BOTTOM VIEW MILLIMETERS MIN NOM MAX 0.08 0.10 0.12 0.27 0.30 0.33 1.95 2.00 2.05 1.44 1.49 1.54 0.65 BSC b 0.05 M C A B RECOMMENDED SOLDERING FOOTPRINT* 1 PACKAGE OUTLINE 0.65 PITCH 6X 0.65 PITCH 0.30 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON30589G WLCSP6 2.00x1.49x0.10 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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