FDMS86581-F085

FDMS86581-F085 MOSFET– POWERTRENCH), N-Channel 60 V, 30 A, 15 mW Features • • • • • www.onsemi.com Typical RDS(on) = 12.5 mW at VGS = 10 V, ID = 30 A Typical QG(tot) = 13 nC at VGS = 10 V, ID = 25 A UIS Capability RoHS Compliant Qualified to AEC Q101 ELECTRICAL CONNECTION Applications • • • • • • • Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Electronic Steering Integrated Started/Alternator Distributed Power Architectures and VRM Primary Switch for 12 V Systems D 5 4 G D 6 3 S D 7 2 S D 8 1 S N-Channel MOSFET MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Parameter Ratings Unit VDSS Drain−to−Source Voltage 60 V VGS Gate−to−Source Voltage ±20 V Drain Current − Continuous (VGS = 10) TC = 25°C (Note 1) 30 A ID MARKING DIAGRAM Pulsed Drain Current, TC = 25°C See Figure 4 EAS Single Pulse Avalanche Energy (Note 2) 13.5 mJ PD Power Dissipation 50 W 0.33 W/°C −55 to +175 °C Derate Above 25°C TJ, TSTG Operating and Storage Temperature RqJC Thermal Resistance, Junction to Case 3 °C/W RqJA Maximum Thermal Resistance, Junction to Ambient (Note 3) 50 °C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25°C, L = 40mH, IAS = 26 A, VDD = 60 V during inductor charging and VDD = 0V during time in avalanche. 3. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2 oz copper. © Semiconductor Components Industries, LLC, 2013 May, 2019 − Rev. 3 Power 56 (PQFN8 5x6) CASE 483BJ 1 $Y&Z&3&K FDMS 86581 $Y &Z &3 &K FDMS86581 = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. Publication Order Number: FDMS86581−F085/D FDMS86581−F085 PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Shipping† FDMS86581 FDMS86581−F085 Power 56 3000 Units/ Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ. Max. Units OFF CHARACTERISTICS BVDSS Drain−to−Source Breakdown Voltage ID = 250 mA, VGS = 0 V 60 − − V IDSS Drain−to−Source Leakage Current VDS = 60 V TJ = 25°C − − 1 A VGS = 0 V TJ = 175°C (Note 4) − − 1 mA IGSS Gate−to−Source Leakage Current − − ±100 nA 2.0 2.7 4.0 V TJ = 25°C − 12.5 15.0 mW TJ = 175°C (Note 4) − 25.1 30.1 mW − 881 − pF VGS = ± 20 V ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA RDS(on) Drain to Source On Resistance ID = 30 A VGS = 10 V DYNAMIC CHARACTERISTICS VDS = 30 V, VGS = 0 V, f = 1 MHz Ciss Input Capacitance Coss Output Capacitance − 281 − pF Crss Reverse Transfer Capacitance − 15 − pF RG Gate Resistance f = 1 MHz − 3.1 − W Qg(ToT) Total Gate Charge VGS = 0 to 10 V − 13 19 nC Qg(th) Threshold Gate Charge VGS = 0 to 2 V − 2 − nC − 4 − nC − 3 − nC − − 20 ns − 9 − ns Qgs Gate−to−Source Gate Charge Qgd Gate−to−Drain “Miller” Charge VDD = 30 V ID = 25 A SWITCHING CHARACTERISTICS VDD = 30 V, ID = 30 A VGS = 10 V, RGEN = 6 W ton Turn−On Time td(on) Turn−On Delay tr Rise Time − 5 − ns td(off) Turn−Off Delay − 15 − ns tf Fall Time − 4 − ns toff Turn−Off Time − − 28 ns ISD = 30 A, VGS = 0 V − − 1.25 V ISD = 15 A, VGS = 0 V − − 1.2 V IF = 30 A, dlSD/dt = 100 A/ms, VDD = 48 V − 37 55 ns − 22 33 nC DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source−to−Drain Diode Voltage trr Reverse−Recovery Time Qrr Reverse Recovery Charge Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 2 FDMS86581−F085 TYPICAL CHARACTERISTICS 50 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0.0 40 CURRENT LIMITED BY PACKAGE 30 20 10 0 0 25 50 75 100 125 150 175 0 50 TC, CASE TEMPERATURE (5C) Figure 1. Normalized Power Dissipation vs. Case Temperature 2 NORMALIZED THERMAL IMPEDANCE, ZqJC VGS = 10 V CURRENT LIMITED BY SILICON 75 100 125 150 TC, CASE TEMPERATURE (5C) 175 200 Figure 2. Maximum Continuous Drain Current vs. Case Temperature DUTY CYCLE − DESCENDING ORDER 1 0.1 D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM × ZqJC × RqJC + TC SINGLE PULSE 0.01 10−5 10−4 10−3 10−2 10−1 100 101 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 1000 IDM, PEAK CURRENT (A) VGS = 10 V TC = 25°C FOR TEMPERATURES ABOVE 25°C DERATE PEAK CURRENT AS FOLLOWS: I = I25 175 − TC 150 100 10 10−5 10−4 10−3 10−2 10−1 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 3 100 101 FDMS86581−F085 TYPICAL CHARACTERISTICS (continued) 1000 IAS, AVALANCHE CURRENT (A) 100 ID, DRAIN CURRENT (A) 100 10 100 ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) 1 0.1 SINGLE PULSE TJ = MAX RATED TC = 25°C 0.01 0.1 1 10 1 ms 10 ms 100 ms 100 500 If R = 0 tAV = (L)(IAS)/(1.3 × RATED BVDSS − VDD) If R ≠ 0 tAV = (L/R)In[(IAS × R)/(1.3 × RATED BVDSS − VDD) + 1] STARTING TJ = 25°C 10 STARTING TJ = 150°C 1 0.001 0.01 VDS, DRAIN TO SOURCE VOLTAGE (V) 0.1 1 10 tAV, TIME IN AVALANCHE (ms) NOTE: Figure 5. Forward Bias Safe Operating Area Refer to ON Semiconductor Application Notes AN7514 and AN7515. Figure 6. Unclamped Inductive Switching Capability 100 PULSE DURATION = 250 ms DUTY CYCLE = 0.5% MAX VDD = 5 V 80 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 60 40 TJ = 175°C 20 TJ = 25°C TJ = −55°C 0 3 4 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 VGS = 0 V 10 TJ = 175°C 1 0.1 0.0 Figure 7. Transfer Characteristics 250 ms PULSE WIDTH TJ = 25°C 80 60 20 0 1.6 100 VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5 V Bottom 40 0 0.8 1.0 1.2 1.4 0.2 0.4 0.6 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 8. Forward Diode Characteristics ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 TJ = 25°C 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 80 60 VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5 V Bottom 40 20 0 5 250 ms PULSE WIDTH TJ = 175°C 0 Figure 9. Saturation Characteristics 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Saturation Characteristics www.onsemi.com 4 5 FDMS86581−F085 TYPICAL CHARACTERISTICS (continued) 2.5 PULSE DURATION = 250 ms DUTY CYCLE = 0.5% MAX 120 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE rDS(on), DRAIN TO SOURCE ON− RESISTANCE (mW) 140 ID = 30 A 100 80 60 TJ = 175°C 40 20 0 TJ = 25°C 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 PULSE DURATION = 250 ms DUTY CYCLE = 0.5% MAX 2.0 1.5 ID = 30 A VGS = 10 V 1.0 0.5 −80 Figure 11. RDSON vs. Gate Voltage NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE VGS = VDS ID = 250 mA 1.1 0.9 0.7 0.5 0.3 −80 −40 0 40 80 120 160 200 1.05 1.00 0.95 0.90 −80 −40 VGS, GATE TO SOURCE VOLTAGE (V) CAPACITANCE (pF) 10000 1000 Ciss Coss 10 1 0.1 Crss 1 10 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (5C) 200 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature Figure 13. Normalized Gate Threshold Voltage vs. Temperature f = 1 MHz VGS = 0 V 200 ID = 5 mA TJ, JUNCTION TEMPERATURE (5C) 100 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (5C) Figure 12. Normalized RDSON vs. Junction Temperature 1.10 1.3 −40 100 10 ID = 25 A VDD = 30 V 8 VDD = 36 V VDD = 24 V 6 4 2 0 0 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 15. Capacitance vs. Drain to Source Voltage 2 4 6 8 10 Qg, GATE CHARGE (nC) 12 Figure 16. Gate Charge vs. Gate to Source Voltage POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 5 14 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS PQFN8 5X6, 1.27P CASE 483BJ ISSUE C DOCUMENT NUMBER: DESCRIPTION: 98AON13688G PQFN8 5X6, 1.27P DATE 13 DEC 2017 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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