FDPF7N50U_G

FDPF7N50U / FDPF7N50U_G N-Channel UniFETTM Ultra FRFETTM MOSFET 500 V, 5 A, 1.5 Ω Features Description • RDS(on) = 1.5  (Max.) @ VGS = 10 V, ID = 2.5 A UniFETTM MOSFET is Fairchild Semiconductor’s high voltage MOSFET family based on planar stripe and DMOS technology. This MOSFET is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. UniFET Ultra FRFETTM MOSFET has much superior body diode reverse recovery performance. Its trr is less than 50nsec and the reverse dv/dt immunity is 20V/nsec while normal planar MOSFETs have over 200nsec and 4.5V/nsec respectively. Therefore UniFET Ultra FRFET MOSFET can remove additional component and improve system reliability in certain applications that require performance improvement of the MOSFET’s body diode. This device family is suitable for switching power converter applications such as power factor correction (PFC), flat panel display (FPD) TV power, ATX and electronic lamp ballasts. • Low Gate Charge (Typ. 12.8 nC) • Low Crss (Typ. 9 pF) • 100% Avalanche Tested • Improved dv/dt Capability Applications • LCD/LED TV • Lighting • Uninterruptible Power Supply • AC-DC Power Supply D G D S G TO-220F S MOSFET Maximum Ratings TC = 25oC unless otherwise noted. Symbol Parameter VDSS Drain-Source Voltage ID Drain Current - Continuous (TC = 25C) - Continuous (TC = 100C) IDM Drain Current - Pulsed VGSS Gate-Source voltage EAS Single Pulsed Avalanche Energy IAR FDPF7N50U / FDPF7N50U_G Unit 500 V 5* 3* A A 20* A 30 V (Note 2) 125 mJ Avalanche Current (Note 1) 5 A EAR Repetitive Avalanche Energy (Note 1) 8.9 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 20 V/ns PD Power Dissipation 31.3 0.25 W W/C TJ, TSTG Operating and Storage Temperature Range -55 to +150 C TL Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds 300 C FDPF7N50U / FDPF7N50U_G Unit (Note 1) (TC = 25C) - Derate above 25C * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol Parameter RJC Thermal Resistance, Junction-to-Case, Max. 4.0 RJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 1 C/W www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET November 2013 Part Number FDPF7N50U Top Mark FDPF7N50U Package TO-220F Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units FDPF7N50U_G FDPF7N50U TO-220F Tube N/A N/A 50 units Electrical Characteristics Symbol TC = 25°C unless otherwise noted. Parameter Conditions Min. Typ. Max Unit 500 -- -- V Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.5 -- V/C IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V VDS = 400 V, TC = 125°C --- --- 25 250 A A IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 3.0 -- 5.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 2.5 A -- 1.2 1.5  gFS Forward Transconductance VDS = 40 V, ID = 2.5 A -- 2.5 -- S VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 720 940 pF -- 95 190 pF -- 9 13.5 pF -- 6 20 ns -- 55 120 ns -- 25 60 ns Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 250 V, ID = 5 A RG = 25 Ω (Note 4) VDS = 400 V, ID = 5 A VGS = 10 V (Note 4) -- 35 80 ns -- 12.8 16.6 nC -- 3.7 -- nC -- 5.8 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 5 A ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 20 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 5 A -- -- 1.6 V trr Reverse Recovery Time -- 40 -- ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 5 A dIF/dt = 100 A/µs -- 0.04 -- C NOTES: 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. L = 10 mH, IAS = 5 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C. 3. ISD ≤ 5 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C. 4. Essentially independent of operating temperature typical characteristics. ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 2 www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET Package Marking and Ordering Information Figure 1. On-Region Characteristics 20 Figure 2. Transfer Characteristics VGS Top : 10.0 V 8.0V 7.5 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V 1 10 ID , Drain Current [A] ID, Drain Current [A] 15 10 * Notes : 1. 250s Pulse Test 5 o o 150 C 0 10 o 25 C -1 10 2. TC = 25 C * Note : 1. VDS = 40V 2. 250s Pulse Test 0 0 10 20 30 40 -2 50 10 2 VDS, Drain-Source Voltage [V] 6 10 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature IDR , Reverse Drain Current [A] 2.5 2.0 VGS = 10V 1.5 1.0 VGS = 20V 0.5 1 10 0 10 o 150 C o 25 C * Notes : 1. VGS = 0V 2. 250s Pulse Test o * Note : TJ = 25 C 0.0 -1 0 5 10 15 10 20 0.2 0.4 0.6 0.8 Figure 5. Capacitance Characteristics VGS, Gate-Source Voltage [V] Ciss Coss Crss * Notes : 1. VGS = 0 V 2. f = 1 MHz 10 0 1.8 1 10 VDS = 250V 10 VDS = 400V 8 6 4 2 * Note : ID = 57 A 0 0 5 10 15 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 1.6 VDS = 100V Crss = Cgd 10 1.4 12 Coss = Cds + Cgd 100 1.2 Figure 6. Gate Charge Characteristics Ciss = Cgs + Cgd (Cds = shorted) 1000 1.0 VSD , Source-Drain Voltage [V] ID, Drain Current [A] Capacitance [pF] 8 VGS , Gate-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage RDS(ON) [],Drain-Source On-Resistance 4 3 www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. Maximum Drain Current Vs. Case Temperature 6 1.1 ID, Drain Current [A] BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.0 * Notes : 1. VGS = 0 V 0.9 4 2 2. ID = 250 A 0.8 -100 -50 0 50 100 150 0 25 200 50 75 o TJ, Junction Temperature [ C] 100 125 150 o TC, Case Temperature [ C] Figure 9. Maximum Safe Operating Area 10 us 1 ID, Drain Current [A] 10 100 us 1 ms 10 ms 100 ms 0 10 Operation in This Area is Limited by R DS(on) DC -1 10 * Notes : o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 10 0 10 1 2 10 10 VDS, Drain-Source Voltage [V] ZJC(t), Thermal Response [oC/W] Figure 10. Transient Thermal Response Curve D = 0 .5 10 0 0 .2 0 .1 0 .0 5 10 PDM 0 .0 2 -1 t1 0 .0 1 * N o te s : t2 o 1 . Z  JC (t) = 4 .0 C /W M a x. 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z  J C (t) s in g le p u ls e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 4 www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET Typical Performance Characteristics FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET IG = const. Figure 11. Gate Charge Test Circuit & Waveform VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr tt onon td(off) t off tf Figure 12. Resistive Switching Test Circuit & Waveforms VGS Figure 13. Unclamped Inductive Switching Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 5 www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 14. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 6 www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET Mechanical Dimensions Figure 15. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 ©2009 Fairchild Semiconductor Corporation FDPF7N50U / FDPF7N50U_G Rev C1 8 www.fairchildsemi.com FDPF7N50U / FDPF7N50U_G — N-Channel UniFETTM Ultra FRFETTM MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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