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NCV87722DT33RKG

NCV87722DT33RKG

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO252-5

  • 描述:

    IC REG LINEAR 3.3V 350MA DPAK-5

  • 数据手册
  • 价格&库存
NCV87722DT33RKG 数据手册
NCV8772 LDO Regulator - Ultra Low Iq, Enable, Reset 350 mA The NCV8772 is 350 mA LDO regulator with integrated reset functions dedicated for microprocessor applications. Its robustness allows NCV8772 to be used in severe automotive environments. Ultra low quiescent current as low as 24 mA typical makes it suitable for applications permanently connected to battery requiring ultra low quiescent current with or without load. This feature is especially critical when modules remain in active mode when ignition is off. The Enable function can be used for further decrease of quiescent current in shutdown mode to 1 mA. The NCV8772 contains protection functions as current limit, thermal shutdown and reverse output current protection. http://onsemi.com MARKING DIAGRAMS DPAK−5 DT SUFFIX CASE 175AA 772yxxG ALYWW D2PAK−5 D5S SUFFIX CASE 936A NC V8772yxx AWLYWWG D2PAK−7 D7S SUFFIX CASE 936AB NC V8772yxx AWLYWWG Features • • • • • • • • • • Output Voltage Options: 3.3 V and 5 V Output Voltage Accuracy: ±1.5% (TJ = 25°C to 125°C) Output Current up to 350 mA Ultra Low Quiescent Current: typ 24 mA (max 30 mA) Very Wide Range of Cout and ESR Values for Stability Enable Function − 1 mA Max Quiescent Current when disabled Microprocessor Compatible Control Functions: − Reset with Adjustable Power−On Delay Wide Input Voltage Operation Range: up to 40 V Protection Features − Current Limitation − Thermal Shutdown − Reverse Output Current Protection These are Pb−Free Devices 1 1 y x, xx A WL, L Y WW G Typical Applications • • • • Body Control Module Instruments and Clusters Occupant Protection and Comfort Powertrain VBAT Cin 0.1 mF Vout Vin Vout NCV8772 Cout 1 mF VDD Microprocessor DT* OFF ON EN RO = Timing and Reset Threshold Option = Voltage Option = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet. RESET GND * D2PAK−7 ONLY Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2011 September, 2019 − Rev. 3 1 Publication Order Number: NCV8772/D NCV8772 Vin Vout * Thermal Shutdown RO Driver With Current Erorr Amplifier Reset Comparator Reset Driver Limit EN Enable Reference Timing DT** Circuit *** Oscillator GND * 5 V OPTION ONLY ** D2PAK−7 ONLY * ** Pull−Down Resistor (typ 150 kW) active only in Reset State Figure 2. Simplified Block Diagram PIN CONNECTIONS PIN Tab, 1. Vin 2. RO 3. GND 4. EN 5. Vout PIN Tab, 1. Vin 2. RO 3. GND 4. EN 5. Vout PIN Tab, 1 1 1 D2PAK−5 DPAK−5 1. Vin 2. RO 3. NC 4. GND 5. EN 6. DT 7. Vout D2PAK−7 Figure 3. Pin Connections PIN FUNCTION DESCRIPTION Pin No. DPAK−5 D2PAK−5 Pin No. D2PAK−7 1 1 Vin Positive Power Supply Input. Connect 0.1 mF capacitor to ground. 2 2 RO Reset Output. 30 kW internal Pull−up resistor connected to Vout. RO goes Low when Vout drops by more than 7% (typ) from its nominal value (for NCV8772y devices with y = 1,2,3,...) or more than 10% (typ) from its nominal value (for NCV8772y devices with y = A, B, C,...). − 3 NC Not Connected 3, TAB 4, TAB GND 4 5 EN Enable Input. Low level disables the IC. − 6 DT Reset Delay Time Select. Short to GND or connected to Vout to select time. 5 7 Vout Regulated Output Voltage. Connect 1 mF capacitor with ESR < 100 W to ground. Pin Name Description Power Supply Ground. http://onsemi.com 2 NCV8772 ABSOLUTE MAXIMUM RATINGS Rating Input Voltage (Note 1) Symbol Min Max Unit Vin −0.3 − 40 45 V DC Transient, t < 100 ms Input Current Iin −5 − mA Output Voltage (Note 2) Vout −0.3 5.5 V Output Current Iout −3 Current Limited mA VEN −0.3 − 40 45 V Enable Input Current IEN −1 1 mA DT (Reset Delay Time Select) Voltage VDT −0.3 5.5 V DT (Reset Delay Time Select) Current IDT −1 1 mA Reset Output Voltage VRO −0.3 5.5 V Reset Output Current IRO −3 3 mA Junction Temperature TJ −40 150 °C Storage Temperature TSTG −55 150 °C Enable Input Voltage DC Transient, t < 100 ms Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. 5.5 V or (Vin + 0.3 V) (whichever is lower). ESD CAPABILITY (Note 3) Rating Symbol Min Max Unit ESDHBM −2 2 kV ESD Capability, Machine Model ESDMM −200 200 V ESD Capability, Charged Device Model ESDCDM −1 1 kV Max Unit ESD Capability, Human Body Model 3. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) ESD Charge Device Model tested per AEC−Q100−011 (EIA/JESD22−C101) LEAD SOLDERING TEMPERATURE AND MSL (Note 4) Rating Moisture Sensitivity Level Symbol DPAK−5 D2PAK−5 D2PAK−7 Min MSL Lead Temperature Soldering Reflow (SMD Styles Only), Pb−Free Versions TSLD 1 1 3 − − 265 peak °C 4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. THERMAL CHARACTERISTICS (Note 5) Rating Symbol Value Thermal Characteristics, DPAK−5 Thermal Resistance, Junction−to−Air (Note 6) Thermal Reference, Junction−to−Case (Note 6) RqJA RYJC 56 8.4 Thermal Characteristics, D2PAK−5 Thermal Resistance, Junction−to−Air (Note 6) Thermal Reference, Junction−to−Case (Note 6) RqJA RYJC 53 8.4 Thermal Characteristics, D2PAK−7 Thermal Resistance, Junction−to−Air (Note 6) Thermal Reference, Junction−to−Case (Note 6) RqJA RYJC 51 8.4 5. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 6. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. http://onsemi.com 3 Unit °C/W °C/W °C/W NCV8772 RECOMMENDED OPERATING RANGE (Note 7) Rating Symbol Min Max Unit Input Voltage (Note 8) Vin 4.5 40 V Junction Temperature TJ −40 150 °C 7. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 8. Minimum Vin = 4.5 V or (Vout + VDO), whichever is higher. ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VEN = 3 V, Cin = 0.1 mF, Cout = 1 mF, for typical values TJ = 25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted. (Notes 9 and 10) Test Conditions Parameter Symbol Min Typ Max Unit 3.2505 4.925 (−1.5 %) 3.3 5.0 3.3495 5.075 (+1.5%) 3.234 3.234 4.9 4.9 (−2 %) 3.3 3.3 5.0 5.0 3.366 3.366 5.1 5.1 (+2%) 3.234 4.9 (−2 %) 3.3 5.0 3.366 5.1 (+2%) Regline −20 0 20 mV Regload −35 10 35 mV − − 250 440 500 875 Cout ESR 1 0.01 − − 100 100 mF W IDIS − − 1 mA − − 24 − 29 30 REGULATOR OUTPUT Output Voltage (Accuracy %) Output Voltage (Accuracy %) Output Voltage (Accuracy %) Line Regulation TJ = 25 °C to 125 °C 3.3 V Vin = 4.5 V to 16 V, Iout = 0.1 mA to 200 mA 5.0 V Vin = 5.575 V to 16 V, Iout = 0.1 mA to 200 mA 3.3 V Vin = 4.5 V to 40 V, Iout = 0.1 mA to 200 mA Vin = 4.5 V to 16 V, Iout = 0.1 mA to 350 mA 5.0 V Vin = 5.6 V to 40 V, Iout = 0.1 mA to 200 mA Vin = 5.975 V to 16 V, Iout = 0.1 mA to 350 mA TJ = −40°C to 125°C 3.3 V Vin = 4.5 V to 28 V, Iout = 0 mA to 350 mA 5.0 V Vin = 5.975 V to 28 V, Iout = 0 mA to 350 mA 3.3 V Vin = 4.5 V to 28 V, Iout = 5 mA 5.0 V Vin = 6 V to 28 V, Iout = 5 mA Load Regulation Dropout Voltage (Note 11) Iout = 0.1 mA to 350 mA Vout Vout VDO 5.0 V Iout = 200 mA Iout = 350 mA Output Capacitor for Stability (Note 12) Vout Iout = 0 mA to 350 mA V V V mV DISABLE AND QUIESCENT CURRENTS Disable Current Quiescent Current (Iq = Iin − Iout) VEN = 0 V, TJ < 85°C Iout = 0.1 mA, TJ = 25°C Iout = 0.1 mA to 350 mA, TJ ≤ 125°C Iq mA CURRENT LIMIT PROTECTION Current Limit Vout = 0.96 x Vout_nom ILIM 400 − 1100 mA Short Circuit Current Limit Vout = 0 V ISC 400 − 1100 mA Vout_rev − 2 5.5 V PSRR − 60 − dB REVERSE OUTPUT CURRENT PROTECTION Reverse Output Current Protection VEN = 0 V, Iout = −1 mA PSRR Power Supply Ripple Rejection (Note 12) f = 100 Hz, 0.5 Vpp 9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area. 10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. 12. Values based on design and/or characterization. 13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options http://onsemi.com 4 NCV8772 ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VEN = 3 V, Cin = 0.1 mF, Cout = 1 mF, for typical values TJ = 25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted. (Notes 9 and 10) Parameter Test Conditions Symbol Min Typ Max − 2.5 − − 0.8 − − − 3 0.5 5 1 − 2.0 − − 0.8 − − − 1.0 − 3.8 4.2 Unit ENABLE THRESHOLDS Vth(EN) Enable Input Threshold Voltage Logic Low Logic High Enable Input Current Logic High Logic Low VEN = 5 V VEN = 0 V, TJ < 85°C IEN_ON IEN_OFF V mA DT (RESET DELAY TIME SELECT) − D2PAK−7 ONLY Vth(DT) DT Threshold Voltage Logic Low Logic High DT Input Current VDT = 5 V IDT V mA RESET OUTPUT RO Input Voltage Reset Threshold Output Voltage Reset Threshold (Note 13) (NCV8772y) where y = 1,2,3,... 3.3 V Vin decreasing, Vout > VRT Vin_RT Vout decreasing 3.3 V 5.0 V 3.3 V 5.0 V VRT Vin > 4.5 V Vin > 5.5 V Vin > 4.5 V Vin > 5.5 V V %Vout 90 90 87 87 93 93 90 90 96 96 93 93 VRH − 2.0 − %Vout IROmax 1.3 1.75 − − − − mA VROL − 0.15 0.25 V 5.0 V VROH 4.5 − − V Reset High Level Leakage Current 3.3 V IROLK − − 1.0 Integrated Reset Pull−up Resistor RRO 15 30 50 (NCV8772y) where y = A,B,C,... Reset Hysteresis Maximum Reset Sink Current 3.3 V Vout = 3 V, VRO = 0.25 V 5.0 V Vout = 4.5 V, VRO = 0.25 V Reset Output Low Voltage Reset Output High Voltage Vout > 1 V, IRO < 200 mA 5.0 V mA kW Reset Delay Time (DPAK−5, D2PAK−5) Min Available Time (Note 13) Max Available Time tRD 6.4 102.4 (20%) 8.0 128 9.6 153.6 (20%) ms Reset Delay Time (D2PAK−7) (Note 13) tRD 3.2 102.4 (20%) 4.0 128 4.8 153.6 (20%) ms tRR 16 25 38 ms Thermal Shutdown Temperature (Note 12) TSD 150 175 195 °C Thermal Shutdown Hysteresis (Note 12) TSH − 25 − °C Min Available Time, DT connected to GND Max Available Time, DT connected to Vout Reset Reaction Time (see Figure 33) THERMAL SHUTDOWN 9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area. 10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. 12. Values based on design and/or characterization. 13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options http://onsemi.com 5 NCV8772 TYPICAL CHARACTERISTICS 300 Vin = 13.2 V Iout = 100 mA 29 28 Iq, QUIESCENT CURRENT (mA) Iq, QUIESCENT CURRENT (mA) 30 27 26 25 24 23 22 21 20 −40 −20 0 20 40 60 80 Iout = 0 mA TJ = 25°C 250 200 150 100 50 0 100 120 140 160 0 5 10 TJ, JUNCTION TEMPERATURE (°C) Figure 4. Quiescent Current vs. Temperature 20 25 30 35 40 Figure 5. Quiescent Current vs. Input Voltage 30 Iq, QUIESCENT CURRENT (mA) 15 Vin, INPUT VOLTAGE (V) Vin = 13.2 V 29 28 27 TJ = 150°C 26 25 TJ = −40°C 24 TJ = 25°C 23 22 21 20 0 50 100 150 200 250 300 350 IOUT, OUTPUT CURRENT (mA) Figure 6. Quiescent Current vs. Output Current 3.36 Vin = 13.2 V Iout = 100 mA Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 5.10 5.05 5.00 4.95 4.90 −40 −20 0 20 40 60 80 100 120 140 160 Vin = 13.2 V Iout = 100 mA 3.34 3.32 3.30 3.28 3.26 3.24 −40 −20 TJ, JUNCTION TEMPERATURE (°C) 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Output Voltage vs. Temperature (5 V Option) Figure 8. Output Voltage vs. Temperature (3.3 V Option) http://onsemi.com 6 NCV8772 TYPICAL CHARACTERISTICS 6 5 Iout = 1 mA 5 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) Iout = 1 mA 4 3 TJ = 25°C 2 TJ = 150°C 1 0 3 2 TJ = 25°C 1 TJ = −40°C 0 1 2 3 4 5 6 7 0 8 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (V) Figure 9. Output Voltage vs. Input Voltage (5 V Option) Figure 10. Output Voltage vs. Input Voltage (3.3 V Option) 8 800 VDO, DROPOUT VOLTAGE (mV) 700 TJ = 150°C 600 500 TJ = 25°C 400 300 200 TJ = −40°C 100 0 0 TJ = −40°C TJ = 150°C Vin, INPUT VOLTAGE (V) 800 VDO, DROPOUT VOLTAGE (mV) 4 50 100 150 200 250 300 700 Iout = 350 mA 600 500 400 Iout = 200 mA 300 200 100 0 −40 −20 350 Iout, OUTPUT CURRENT (mA) 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 12. Dropout vs. Temperature (5 V Option) Figure 11. Dropout vs. Output Current (5 V Option) http://onsemi.com 7 NCV8772 TYPICAL CHARACTERISTICS 800 TJ = 25°C 700 ILIM, ISC, CURRENT LIMIT (mA) ILIM, ISC, CURRENT LIMIT (mA) 800 ISC @ Vout = 0 V 600 ILIM @ Vout = 4.8 V 500 400 300 200 100 0 0 5 10 15 20 25 30 Vin, INPUT VOLTAGE (V) 35 TJ = 25°C 700 ISC @ Vout = 0 V 600 ILIM @ Vout = 3.17 V 500 400 300 200 100 0 40 0 Figure 13. Output Current Limit vs. Input Voltage (5 V Option) 700 650 ISC @ Vout = 0 V 600 550 ILIM @ Vout = 4.8 V 500 450 400 −40 −20 0 20 40 60 80 15 20 25 30 Vin, INPUT VOLTAGE (V) 35 40 800 ILIM, ISC, CURRENT LIMIT (mA) 750 10 Figure 14. Output Current Limit vs. Input Voltage (3.3 V Option) Vin = 13.2 V Vin = 13.2 V 750 700 650 ISC @ Vout = 0 V 600 550 ILIM @ Vout = 3.17 V 500 450 400 −40 −20 100 120 140 160 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 15. Output Current Limit vs. Temperature (5 V Option) Figure 16. Output Current Limit vs. Temperature (3.3 V Option) 100 ESR, STABILITY REGION (W) ILIM, ISC, CURRENT LIMIT (mA) 800 5 Vin = 13.2 V TJ = −40°C to 150°C Cout = 1 mF − 100 mF 10 1 STABLE REGION 0.1 0.01 0 50 100 150 200 250 300 350 Iout, OUTPUT CURRENT (mA) Figure 17. Cout ESR Stability Region vs. Output Current http://onsemi.com 8 NCV8772 TYPICAL CHARACTERISTICS TJ = 25°C Iout = 1 mA Cout = 10 mF trise/fall = 1 ms (Vin) 14.2 V Vin (1 V/div) 13 V 14.2 V Vin (1 V/div) TJ = 25°C Iout = 1 mA Cout = 10 mF trise/fall = 1 ms (Vin) 12.2 V 13 V 12.2 V 3.42 V 5.11 V Vout (50 mV/div) Vout (50 mV/div) 5V 3.33 V 4.98 V 3.3 V TIME (1 ms/div) TIME (1 ms/div) Figure 18. Line Transients (5 V Option) Figure 19. Line Transients (3.3 V Option) TJ = 25°C Vin = 13.2 V Cout = 10 mF trise/fall = 1 ms (Iout) 350 mA Iout (200 mA/div) TJ = 25°C Vin = 13.2 V Cout = 10 mF trise/fall = 1 ms (Iout) 350 mA Iout (200 mA/div) 0.1 mA 0.1 mA 5.3 V 3.58 V 3.3 V 5V Vout (200 mV/div) Vout (200 mV/div) 4.54 V 2.92 V TIME (20 ms/div) TIME (20 ms/div) Figure 20. Load Transients (5 V Option) Figure 21. Load Transients (3.3 V Option) TJ = 25°C VEN = Vin Rout = 5 kW TJ = 25°C VEN = Vin Rout = 3.3 kW Vin (5 V/div) Vin (5 V/div) Vout (5 V/div) Vout (5 V/div) VRO (5 V/div) VRO (5 V/div) TIME (100 ms/div) TIME (100 ms/div) Figure 22. Power Up/Down Response (5 V Option) Figure 23. Power Up/Down Response (3.3 V Option) http://onsemi.com 9 NCV8772 TYPICAL CHARACTERISTICS 100 80 80 70 PSRR (dB) 60 50 40 60 50 40 30 30 20 20 10 10 0 10 100 1000 10000 TJ = 25°C Vin = 13.2 V $ 0.5 Vpp Cout = 1 mF Iout = 1.0 mA 90 0 10 100000 100 f, FREQUENCY (Hz) Figure 25. PSRR vs. Frequency (3.3 V Option) 4000 3500 3000 2500 2000 1500 1000 500 0 10 100 1000 10000 100000 Vin = 13.2 V VEN = 0 V 4 3 2 1 0 −40 −20 Figure 26. Noise vs. Frequency 50 IEN, ENABLE CURRENT (mA) IDIS, DISABLE CURRENT (mA) 10 TJ = 150°C 6 4 TJ = 125°C TJ = 85°C 10 15 20 40 60 80 100 120 140 160 Vin = 13.2 V VEN = 0 V 5 20 Figure 27. Disable Current vs. Temperature 12 2 0 TJ, JUNCTION TEMPERATURE (°C) f, FREQUENCY (Hz) 8 100000 5 TJ = 25°C Vin = 13.2 V Cout = 1 mF Iout = 350 mA 0 10000 f, FREQUENCY (Hz) 4500 0 1000 Figure 24. PSRR vs. Frequency (5 V Option) IDIS, DISABLE CURRENT (mA) PSRR (dB) 70 NOISE DENSITY (nV/√Hz) 100 TJ = 25°C Vin = 13.2 V $ 0.5 Vpp Cout = 1 mF Iout = 1.0 mA 90 25 30 35 40 40 TJ = 150°C 30 TJ = 25°C 20 TJ = −40°C 10 0 0 5 10 15 20 25 30 35 VEN, ENABLE VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 28. Disable Current vs. Input Voltage Figure 29. Enable Current vs. Enable Voltage http://onsemi.com 10 40 NCV8772 TYPICAL CHARACTERISTICS 3.18 VRT, RESET THRESHOLD (V) Vin = 13.2 V 4.75 4.70 4.65 4.60 −40 −20 0 20 40 60 80 100 120 140 160 Vin = 13.2 V 3.16 3.14 3.12 3.10 3.08 3.06 3.04 3.02 −40 −20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 30. Reset Threshold vs. Temperature (5 V Option) Figure 31. Reset Threshold vs. Temperature (3.3 V Option) tRD, RESET DELAY TIME (% of tRD_nom) VRT, RESET THRESHOLD (V) 4.80 120 Vin = 13.2 V 110 100 90 80 −40 −20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 32. Reset Delay Time vs. Temperature Vin t Vout < tRR VRT + VRH VRT VRO t tRD tRR VROH VROL t Figure 33. Reset Function and Timing Diagram http://onsemi.com 11 NCV8772 DEFINITIONS General Current Limit and Short Circuit Current Limit All measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. Current Limit is value of output current by which output voltage drops below 96% of its nominal value. Short Circuit Current Limit is output current value measured with output of the regulator shorted to ground. Output voltage The output voltage parameter is defined for specific temperature, input voltage and output current values or specified over Line, Load and Temperature ranges. PSRR Power Supply Rejection Ratio is defined as ratio of output voltage and input voltage ripple. It is measured in decibels (dB). Line Regulation The change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. Line Transient Response Typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. Load Regulation The change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. Load Transient Response Typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low−load and high−load conditions. Dropout Voltage The input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. It is measured when the output drops 100 mV below its nominal value. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Thermal Protection Quiescent and Disable Currents Maximum Package Power Dissipation Quiescent Current (Iq) is the difference between the input current (measured through the LDO input pin) and the output load current. If Enable pin is set to LOW the regulator reduces its internal bias and shuts off the output, this term is called the disable current (IDIS). The power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower. Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 175°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. http://onsemi.com 12 NCV8772 APPLICATIONS INFORMATION The NCV8772 regulator is self−protected with internal thermal shutdown and internal current limit. Typical characteristics are shown in Figure 4 to Figure 33. RESET DELAY AND RESET THRESHOLD OPTIONS (DPAK−5 AND D2PAK−5) Input Decoupling (Cin) A ceramic or tantalum 0.1 mF capacitor is recommended and should be connected close to the NCV8772 package. Higher capacitance and lower ESR will improve the overall line and load transient response. If extremely fast input voltage transients are expected then appropriate input filter must be used in order to decrease rising and/or falling edges below 50 V/ms for proper operation. The filter can be composed of several capacitors in parallel. Output Decoupling (Cout) The NCV8772 is a stable component and does not require a minimum Equivalent Series Resistance (ESR) for the output capacitor. Stability region of ESR vs Output Current is shown in Figure 17. The minimum output decoupling value is 1 mF and can be augmented to fulfill stringent load transient requirements. The regulator works with ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. Reset Delay Time Reset Threshold NCV87721DT NCV87721D5S 8 ms 93% NCV87722DT NCV87722D5S 16 ms 93% NCV87723DT NCV87723D5S 32 ms 93% NCV87724DT NCV87724D5S 64 ms 93% NCV87725DT NCV87725D5S 128 ms 93% NCV8772ADT NCV8772AD5S 8 ms 90% NCV8772BDT NCV8772BD5S 16 ms 90% NCV8772CDT NCV8772CD5S 32 ms 90% NCV8772DDT NCV8772DD5S 64 ms 90% NCV8772EDT NCV8772ED5S 128 ms 90% Enable Operation NOTE: The timing values can be selected from the following list: 8, 16, 32, 64, 128 ms. Contact factory for options not included in ORDERING INFORMATION table on page 14. The Enable pin will turn the regulator on or off. The threshold limits are covered in the electrical characteristics table in this datasheet. Reset Delay Time Select (D2PAK−7 only) Selection of the NCV8772yD7S devices and the state of the DT pin determines the available Reset Delay times. The part is designed for use with DT tied to ground or Vout, but may be controlled by any logic signal which provides a threshold between 0.8 V and 2 V. The default condition for an open DT pin is the slower Reset time (DT = GND condition). Times are in pairs and are highlighted in the chart below. Consult factory for availability. The Delay Time select (DT) pin is logic level controlled and provides Reset Delay time per the chart. Note the DT pin is sampled only when RO is low, and changes to the DT pin when RO is high will not effect the reset delay time. Reset Operation A reset signal is provided on the Reset Output (RO) pin to provide feedback to the microprocessor of an out of regulation condition. The timing diagram of reset function is shown in Figure 33. This is in the form of a logic signal on RO. Output voltage conditions below the RESET threshold cause RO to go low. The RO integrity is maintained down to Vout = 1.0 V. For 5 V voltage option, the Reset Output (RO) circuitry includes internal pull−up (30 kW) connected to the output (Vout) No external pull−up is necessary. http://onsemi.com 13 NCV8772 dissipate up to 2.35 W (for D2PAK−5) when the ambient temperature (TA) is 25°C. See Figure 34 for RqJA versus PCB area. The power dissipated by the NCV8772 can be calculated from the following equations: RESET DELAY AND RESET THRESHOLD OPTIONS (D2PAK−7) DT = GND Reset Time DT = Vout Reset Time Reset Threshold NCV87721D7S 8 ms 128 ms 93% NCV87722D7S 8 ms 32 ms 93% NCV87723D7S 16 ms 64 ms 93% NCV87724D7S 32 ms 128 ms 93% NCV87725D7S 4 ms 8 ms 93% NOTE: NCV8772AD7S 8 ms 128 ms 90% 100 NCV8772BD7S 8 ms 32 ms 90% NCV8772CD7S 16 ms 64 ms 90% NCV8772DD7S 32 ms 128 ms 90% NCV8772ED7S 4 ms 8 ms 90% V in(max) + The timing values can be selected from the following list: 4, 8, 16, 32, 64, 128 ms. Contact factory for options not included in ORDERING INFORMATION table on page 14. Thermal Considerations As power in the NCV8772 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the NCV8772 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the NCV8772 can handle is given by: P D(max) + ƪTJ(max) * TAƫ (eq. 2) or RqJA, THERMAL RESISTANCE (°C/W) NOTE: P D + V inǒI q@I outǓ ) I outǒV in * V outǓ P D(max) ) ǒV out I outǓ (eq. 3) I out ) I q Items containing Iq can be neglected if Iout >> Iq. 90 80 70 PCB 1 oz Cu 60 50 40 0 PCB 2 oz Cu 100 200 300 400 500 600 COPPER HEAT SPREADER (mm2) 700 Figure 34. Thermal Resistance vs. PCB Copper Area (D2PAK−5) Hints Vin and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the NCV8772 and make traces as short as possible. (eq. 1) R qJA Since TJ is not recommended to exceed 150°C, then the NCV8772 soldered on 645 mm2, 1 oz copper area, FR4 can ORDERING INFORMATION Output Voltage Reset Delay Time (DT = GND/Vout for D2PAK−7) Reset Threshold Marking Package Shipping† NCV87722DT50RKG 5.0 V 16 ms 93% 772250G DPAK−5 (Pb−Free) 2500 / Tape & Reel NCV87721D5S50R4G 5.0 V 8 ms 93% NC V8772150 D2PAK−5 (Pb−Free) 800 / Tape & Reel NCV87725D7S50R4G 5.0 V 4/8 ms 93% NC V8772550 D2PAK−7 (Pb−Free) 750 / Tape & Reel NCV87722DT33RKG 3.3 V 16 ms 93% 772233G DPAK−5 (Pb−Free) 2500 / Tape & Reel NCV87722D5S33R4G 3.3 V 16 ms 93% NC V8772233 D2PAK−5 (Pb−Free) 800 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 14 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK−5, CENTER LEAD CROP CASE 175AA ISSUE B DATE 15 MAY 2014 SCALE 1:1 −T− C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE E R R1 Z A S 12 3 4 5 U K F J L H D G 5 PL 0.13 (0.005) M T 2.2 0.086 0.34 5.36 0.013 0.217 5.8 0.228 10.6 0.417 0.8 0.031 SCALE 4:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON12855D INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.020 0.028 0.018 0.023 0.024 0.032 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.045 BSC 0.170 0.190 0.185 0.210 0.025 0.040 0.020 −−− 0.035 0.050 0.155 0.170 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.51 0.71 0.46 0.58 0.61 0.81 4.56 BSC 0.87 1.01 0.46 0.58 2.60 2.89 1.14 BSC 4.32 4.83 4.70 5.33 0.63 1.01 0.51 −−− 0.89 1.27 3.93 4.32 GENERIC MARKING DIAGRAMS* RECOMMENDED SOLDERING FOOTPRINT* 6.4 0.252 DIM A B C D E F G H J K L R R1 S U V Z XXXXXXG ALYWW AYWW XXX XXXXXG IC Discrete XXXXXX A L Y WW G = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. DPAK−5 CENTER LEAD CROP PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK 5−LEAD CASE 936A−02 ISSUE E DATE 28 JUL 2021 SCALE 1:1 GENERIC MARKING DIAGRAM* xx xxxxxxxxx AWLYWWG xxxxxx A WL Y WW G = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASH01006A D2PAK 5−LEAD Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK−7 (SHORT LEAD) CASE 936AB−01 ISSUE B DATE 08 SEP 2009 A 1 SCALE 1:1 E L1 B A 0.10 A E/2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH AND GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.005 MAXIMUM PER SIDE. THESE DIMENSIONS TO BE MEASURED AT DATUM H. 4. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS E, L1, D1, AND E1. DIMENSIONS D1 AND E1 ESTABLISH A MINIMUM MOUNTING SURFACE FOR THE THERMAL PAD. SEATING PLANE M B A M E1 c2 D1 D 7X H DETAIL C e b 0.13 M B A VIEW A−A c A M B H SEATING PLANE A1 RECOMMENDED SOLDERING FOOTPRINT* L 0.424 INCHES MIN MAX 0.170 0.180 0.000 0.010 0.026 0.036 0.017 0.026 0.045 0.055 0.325 0.368 0.270 −−− 0.380 0.420 0.245 −−− 0.050 BSC 0.539 0.579 0.058 0.078 −−− 0.066 0.010 BSC 0° 8° MILLIMETERS MIN MAX 4.32 4.57 0.00 0.25 0.66 0.91 0.43 0.66 1.14 1.40 8.25 9.53 6.86 −−− 9.65 10.67 6.22 −−− 1.27 BSC 13.69 14.71 1.47 1.98 −−− 1.68 0.25 BSC 0° 8° GENERIC MARKING DIAGRAM* M L3 DIM A A1 b c c2 D D1 E E1 e H L L1 L3 M GAUGE PLANE XX XXXXXXXXX AWLYWWG DETAIL C 0.310 0.584 1 XXXXX A WL Y WW G 0.136 7X 0.050 PITCH 0.040 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON14119D D2PAK−7 (SHORT LEAD) = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. 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