NTJD4158CT2G

NTJD4158C, NVJD4158C MOSFET – Small Signal, Complementary, SC-88 30 V/-20 V, +0.25/-0.88 A Features • • • • • Leading 20 V Trench for Low RDS(on) Performance ESD Protected Gate SC−88 Package for Small Footprint (2 x 2 mm) NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(on) Typ N−Ch 30 V 1.0 W @ 4.5 V P−Ch −20 V 215 mW @ −4.5 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter N−Ch Symbol Value Unit VDSS 30 V P−Ch Gate−to−Source Voltage N−Ch −20 VGS P−Ch N−Channel Continuous Drain Current (Note 1) Steady State P−Channel Continuous Drain Current (Note 1) Steady State Power Dissipation (Note 1) Steady State Pulsed Drain Current N−Ch P−Ch TA = 25°C Source Current (Body Diode) ID −0.88 TA = 85°C −0.63 N−Ch Parameter G1 2 5 G2 D2 3 4 S2 (Top View) MARKING DIAGRAM & PIN ASSIGNMENT 1 0.27 W IDM 0.5 A TJ, Tstg −55 to 150 °C IS 0.25 A −3.0 SC−88 (SOT−363) CASE 419B STYLE 26 D1 G2 S2 XXX MG G 1 S1 G1 D2 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) −0.48 TL 260 Symbol Max Unit RqJA 460 °C/W °C THERMAL RESISTANCE RATINGS Junction−to−Ambient – Steady State (Note 1) D1 6 PD P−Ch Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) 6 A 0.25 TA = 25°C Operating Junction and Storage Temperature 1 ±12 0.18 tp = 10 ms S1 V ±20 TA = 85°C TA = 25°C −0.88 A 345 mW @ −2.5 V SC−88 (SOT−363) (6−Leads) DC−DC Conversion Load/Power Management Load Switch Cell Phones, MP3s, Digital Cameras, PDAs Drain−to−Source Voltage 0.25 A 1.5 W @ 2.5 V Applications • • • • ID Max ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. © Semiconductor Components Industries, LLC, 2015 May, 2019 − Rev. 6 1 Publication Order Number: NTJD4158C/D NTJD4158C, NVJD4158C 1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). www.onsemi.com 2 NTJD4158C, NVJD4158C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol N/P Drain−to−Source Breakdown Voltage V(BR)DSS Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ N P N P N P N P N P Parameter Test Condition Min Typ Max Unit OFF CHARACTERISTICS (Note 3) Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS IGSS VGS = 0 V ID = 250 mA ID = −250 mA V 30 −20 mV/ °C 33 −9.0 VGS = 0 V, VDS = 30 V TJ = 25°C VGS = 0 V, VDS = −16 V VGS = 0 V, VDS = 30 V TJ = 125°C VGS = 0 V, VDS = −16 V VDS = 0 V, VGS = 10 V VDS = 0 V, VGS = −4.5 V 1.0 1.0 mA 1.0 1.0 mA 1.5 −1.5 V 0.5 0.5 ON CHARACTERISTICS (Note 2) Gate Threshold Voltage VGS(TH) Negative Gate Threshold Temperature Coefficient VGS(TH)/ TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance gFS N P N P N P N P N P VGS = VDS ID = 100 mA ID = −250 mA VGS = 4.5 V, ID = 10 mA VGS = −4.5 V, ID = −0.88 A VGS = 2.5 V, ID = 10 mA VGS = −2.5 V, ID = −0.71 A VDS = 3.0 V, ID = 10 mA VDS = −10 V, ID = −0.88 A 0.8 −0.45 1.2 −0.61 3.2 −2.7 1.0 0.215 1.5 0.345 0.08 3.0 mV/ °C 1.5 0.260 2.5 0.500 W S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD N P N P N P N P N P N P N P VDS = 5.0 V VDS = −20 V VDS = 5.0 V f = 1 MHz, VGS = 0 V VDS = −20 V VDS = 5.0 V VDS = −20 V VGS = 5.0 V, VDS = 24 V, ID = 0.1 A VGS = −4.5 V, VDS = −10 V, ID = −0.88 A VGS = 5.0 V, VDS = 24 V, ID = 0.1 A VGS = −4.5 V, VDS = −10 V, ID = −0.88 A VGS = 5.0 V, VDS = 24 V, ID = 0.1 A VGS = −4.5 V, VDS = −10 V, ID = −0.88 A VGS = 5.0 V, VDS = 24 V, ID = 0.1 A VGS = −4.5 V, VDS = −10 V, ID = −0.88 A 20 155 19 25 7.25 18 0.9 2.2 0.2 0.2 0.3 0.5 0.2 0.65 33 225 32 40 12 30 1.5 3.5 pF nC SWITCHING CHARACTERISTICS (Note 3) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf N VGS = 4.5 V, VDD = 5.0 V, ID = 250 mA, RG = 50 W P VGS = −4.5 V, VDD = −10 V, ID = −0.5 A, RG = 20 W ns 15 66 56 78 5.8 6.5 13.5 3.5 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD tRR N P N P N P VGS = 0 V, TJ = 25°C VGS = 0 V, TJ = 125°C VGS = 0 V, dIS/dt = 8.0 A/ms VGS = 0 V, dIS/dt = 100 A/ms 2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 3. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 3 IS = 10 mA IS = −0.48 A IS = 10 mA IS = −0.48 A IS = 10 mA IS = −0.48 mA 0.65 −0.8 0.45 −0.66 12.4 10.6 0.7 −1.2 V ns NTJD4158C, NVJD4158C TYPICAL N−CHANNEL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) VGS = 2.6 V 0.16 0.12 0.1 2V 0.08 0.06 0.04 1.8 V 0.02 0 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) VDS = 5 V 2.2 V 2.4 V 0.14 0.2 TJ = 25°C ID, DRAIN CURRENT (AMPS) VGS = 10 V to 2.8 V 0.25 0.5 0.75 1 1.25 0.1 0.05 TJ = −55°C 0 1.5 1.25 1.5 1.75 2.25 2 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics VGS = 4.5 V TJ = 125°C 1.1 1.0 0.9 TJ = 25°C 0.8 0.7 0.6 TJ = −55°C 0.5 0.4 0.005 0.055 0.105 0.155 ID, DRAIN CURRENT (AMPS) 0.205 1 TJ = 25°C 2.0 VGS = 2.5 V 1.5 1.0 VGS = 4 V 0.5 0 0.005 0.055 0.105 0.155 ID, DRAIN CURRENT (AMPS) 0.205 Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1000 ID = 0.01 A VGS = 4.5 V VGS = 0 V 1.5 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.75 2.5 2.5 Figure 3. On−Resistance vs. Drain Current and Temperature 2 25°C TJ = 125°C VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1.3 1.2 0.15 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (AMPS) 0.2 0.18 1.25 1 0.75 0.5 TJ = 150°C 100 TJ = 125°C 0.25 0 −50 −25 0 25 50 75 100 125 150 10 0 TJ, JUNCTION TEMPERATURE (°C) 5 10 15 20 25 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 4 30 NTJD4158C, NVJD4158C C, CAPACITANCE (pF) 50 VDS = 0 V 40 Ciss 30 Crss VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL N−CHANNEL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) TJ = 25°C VGS = 0 V 20 Ciss Coss 10 Crss 0 10 5 VGS 0 VDS 5 10 15 20 25 5 QG 4 3 QGS 2 1 0 ID = 0.1 A TJ = 25°C 0 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0.1 100 IS, SOURCE CURRENT (AMPS) t, TIME (ns) VDD = 5.0 V ID = 0.25 A VGS = 4.5 V tf tr td(off) td(on) 10 1 10 0.08 1 VGS = 0 V TJ = 25°C 0.06 0.04 0.02 0 0.5 100 0.4 0.8 0.2 0.6 QG, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source Voltage vs. Total Gate Charge Figure 7. Capacitance Variation 1000 QGD 0.55 0.6 0.65 0.7 0.75 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) RG, GATE RESISTANCE (OHMS) Figure 10. Diode Forward Voltage vs. Current Figure 9. Resistive Switching Time Variation vs. Gate Resistance www.onsemi.com 5 NTJD4158C, NVJD4158C TYPICAL P−CHANNEL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) VGS = −4.5, −3.5 & −2.5 V −2 V 0.75 1 TJ = 25°C −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) 1 −1.75 V 0.5 −1.5 V 0.25 −1.25 V −1 V 0 0.4 0 0.8 1.6 1.2 VDS ≥ −20 V 0.9 0.8 0.7 0.6 0.5 0.4 125°C 0.3 0.2 25°C 0.1 TJ = −55°C 0 2 0 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics 0.3 VGS = −4.5 V TJ = 125°C 0.25 0.2 TJ = 25°C 0.15 0.1 TJ = −55°C 0 0.25 0.5 1 0.75 −ID, DRAIN CURRENT (AMPS) 0.5 TJ = 25°C 0.4 VGS = −2.5 V 0.3 0.1 0 0.4 1.6 0.6 0.7 0.8 0.9 1 −ID, DRAIN CURRENT (AMPS) 10000 ID = −0.88 A VGS = −4.5 V 1.4 VGS = 0 V TJ = 150°C 1000 1.2 1.0 0.8 0.6 0.4 0.2 0 −50 0.5 Figure 4. On−Resistance vs. Drain Current and Gate Voltage −IDSS, LEAKAGE CURRENT (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.8 VGS = −4.5 V 0.2 Figure 3. On−Resistance vs. Drain Current and Temperature 2.0 0.5 1 1.5 2 2.5 3 3.5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) −25 0 25 50 75 100 125 150 TJ = 125°C 100 10 TJ, JUNCTION TEMPERATURE (°C) 5 15 10 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage 0 www.onsemi.com 6 20 NTJD4158C, NVJD4158C 350 300 C, CAPACITANCE (pF) VDS = 0 V Ciss 250 VGS = 0 V −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL P−CHANNEL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) TJ = 25°C Crss 200 150 100 50 Coss 0 10 5 VGS 0 VDS 5 15 10 20 5 QT 4 3 Q1 1 0 ID = −0.88 A TJ = 25°C 0 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0.4 0.8 1.2 1.6 Qg, TOTAL GATE CHARGE (nC) 2 Figure 8. Gate−to−Source Voltage vs. Total Gate Charge Figure 7. Capacitance Variation 100 0.5 −IS, SOURCE CURRENT (AMPS) t, TIME (ns) Q2 2 td(off) tr 10 td(on) VDD = −10 V ID = −0.8 A VGS = −4.5 V tf 1 1 10 0.4 0.3 0.2 0.1 0 100 VGS = 0 V TJ = 25°C 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) RG, GATE RESISTANCE (OHMS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current ORDERING INFORMATION Device Marking NTJD4158CT1G TCD NTJD4158CT2G TCD NVJD4158CT1G* VCD Package Shipping† SC−88 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. www.onsemi.com 7 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y 1 SCALE 2:1 DATE 11 DEC 2012 2X aaa H D D H A D 6 5 GAGE PLANE 4 1 2 L L2 E1 E DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X b ddd TOP VIEW C A-B D M A2 DETAIL A A 6X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. ccc C A1 SIDE VIEW C SEATING PLANE END VIEW c RECOMMENDED SOLDERING FOOTPRINT* 6X DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 −−− 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 GENERIC MARKING DIAGRAM* 6 XXXMG G 6X 0.30 INCHES NOM MAX −−− 0.043 −−− 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN −−− 0.000 0.027 0.006 0.003 0.070 0.078 0.045 0.66 1 2.50 0.65 PITCH XXX = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *Date Code orientation and/or position may vary depending upon manufacturing location. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y DATE 11 DEC 2012 STYLE 1: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 4: PIN 1. CATHODE 2. CATHODE 3. COLLECTOR 4. EMITTER 5. BASE 6. ANODE STYLE 5: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 6: PIN 1. ANODE 2 2. N/C 3. CATHODE 1 4. ANODE 1 5. N/C 6. CATHODE 2 STYLE 7: PIN 1. SOURCE 2 2. DRAIN 2 3. GATE 1 4. SOURCE 1 5. DRAIN 1 6. GATE 2 STYLE 8: CANCELLED STYLE 9: PIN 1. EMITTER 2 2. EMITTER 1 3. COLLECTOR 1 4. BASE 1 5. BASE 2 6. COLLECTOR 2 STYLE 10: PIN 1. SOURCE 2 2. SOURCE 1 3. GATE 1 4. DRAIN 1 5. DRAIN 2 6. GATE 2 STYLE 11: PIN 1. CATHODE 2 2. CATHODE 2 3. ANODE 1 4. CATHODE 1 5. CATHODE 1 6. ANODE 2 STYLE 12: PIN 1. ANODE 2 2. ANODE 2 3. CATHODE 1 4. ANODE 1 5. ANODE 1 6. CATHODE 2 STYLE 13: PIN 1. ANODE 2. N/C 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 14: PIN 1. VREF 2. GND 3. GND 4. IOUT 5. VEN 6. VCC STYLE 15: PIN 1. ANODE 1 2. ANODE 2 3. ANODE 3 4. CATHODE 3 5. CATHODE 2 6. CATHODE 1 STYLE 16: PIN 1. BASE 1 2. EMITTER 2 3. COLLECTOR 2 4. BASE 2 5. EMITTER 1 6. COLLECTOR 1 STYLE 17: PIN 1. BASE 1 2. EMITTER 1 3. COLLECTOR 2 4. BASE 2 5. EMITTER 2 6. COLLECTOR 1 STYLE 18: PIN 1. VIN1 2. VCC 3. VOUT2 4. VIN2 5. GND 6. VOUT1 STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF STYLE 20: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 21: PIN 1. ANODE 1 2. N/C 3. ANODE 2 4. CATHODE 2 5. N/C 6. CATHODE 1 STYLE 22: PIN 1. D1 (i) 2. GND 3. D2 (i) 4. D2 (c) 5. VBUS 6. D1 (c) STYLE 23: PIN 1. Vn 2. CH1 3. Vp 4. N/C 5. CH2 6. N/C STYLE 24: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE STYLE 25: PIN 1. BASE 1 2. CATHODE 3. COLLECTOR 2 4. BASE 2 5. EMITTER 6. COLLECTOR 1 STYLE 26: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 STYLE 27: PIN 1. BASE 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. EMITTER 2 6. COLLECTOR 2 STYLE 28: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 29: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE/ANODE 6. CATHODE STYLE 30: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1 Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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