NTS4001N, NVS4001N
MOSFET – Single,
N-Channel, Small Signal,
SC-70
30 V, 270 mA
http://onsemi.com
Features
•
•
•
•
•
V(BR)DSS
Low Gate Charge for Fast Switching
Small Footprint − 30% Smaller than TSOP−6
ESD Protected Gate
AEC−Q101 Qualified and PPAP Capable − NVS4001N
These Devices are Pb−Free and are RoHS Compliant
RDS(on) TYP
ID Max
1.0 W @ 4.0 V
30 V
270 mA
1.5 W @ 2.5 V
SC−70/SOT−323 (3 LEADS)
Applications
•
•
•
•
Low Side Load Switch
Li−Ion Battery Supplied Devices − Cell Phones, PDAs, DSC
Buck Converters
Level Shifts
Gate
3
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Source
Symbol
Value
Units
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
270
mA
Continuous Drain
Current (Note 1)
Steady
State
TA = 25 °C
Power Dissipation
(Note 1)
Steady
State
TA = 25 °C
PD
330
t =10 ms
IDM
800
mA
TJ, TSTG
−55 to
150
°C
Pulsed Drain Current
TA = 85 °C
Operating Junction and Storage Temperature
1
Drain
2
(Top View)
MARKING DIAGRAM &
PIN ASSIGNMENT
3
200
D
mW
Source Current (Body Diode)
IS
270
mA
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface mounted on FR4 board using 1 in sq. pad size
(Cu area = 1.127 in sq. [1 oz] including traces).
1
3
2
TD M G
G
SC−70 / SOT−323
CASE 419
STYLE 8
TD
M
G
2
1
G
S
= Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
Package
Shipping†
NTS4001NT1G
SC−70
(Pb−Free)
3000 / Tape & Reel
NVS4001NT1G
SC−70
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
June, 2019 − Rev. 5
1
Publication Order Number:
NTS4001N/D
NTS4001N, NVS4001N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise stated)
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 100 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
V
60
mV/ °C
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V, VDS = 30 V
1.0
mA
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±10 V
±1.0
mA
VGS(TH)
VGS = VDS, ID = 100 mA
1.5
V
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
Gate Threshold
Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
Forward Transconductance
gFS
0.8
1.2
−3.4
mV/ °C
VGS = 4.0 V, ID = 10 mA
1.0
1.5
VGS = 2.5 V, ID = 10 mA
1.5
2.0
VDS = 3.0 V, ID = 10 mA
80
W
mS
CHARGES AND CAPACITANCES
CISS
Input Capacitance
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VGS = 0 V, f = 1.0 MHz,
VDS = 5.0 V
20
33
19
32
7.25
12
0.9
1.3
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
0.2
td(ON)
17
tr
23
VGS = 5.0 V, VDS = 24 V,
ID = 0.1 A
pF
nC
0.2
0.3
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(OFF)
VGS = 4.5 V, VDD = 5.0 V,
ID = 10 mA, RG = 50 W
tf
ns
94
82
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
VGS = 0 V,
IS = 10 mA
TJ = 25°C
0.65
TJ = 125°C
0.43
VGS = 0 V, dIS/dt = 8.0 A/ms,
IS = 10 mA
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
5.0
0.7
V
ns
NTS4001N, NVS4001N
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VGS = 10 V to 3 V
0.16
2.5 V
0.14
2.25 V
0.12
0.1
0.08
2V
0.06
0.04
1.75 V
1.5 V
0.02
1.25
0.4
0.8
1.2
1.6
VDS = 5 V
ID, DRAIN CURRENT (AMPS)
VGS = 2.75 V
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.1
TJ = 25°C
0.08
0.06
TJ = 125°C
0.04
25°C
0.02
TJ = −55°C
0
2
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1.2
1.4
1.6
2
1.8
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
VGS = 10 V
TJ = 125°C
1.0
0.75
TJ = 25°C
0.5
TJ = −55°C
0.25
0.005
0.055
0.105
0.155
ID, DRAIN CURRENT (AMPS)
0.205
1
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
0.2
0.18
1.25
VGS = 4.5 V
0.75
1.6
VGS = 10 V
0.5
0.25
0.005
0.055
0.105
0.155
ID, DRAIN CURRENT (AMPS)
10000
ID = 0.01 A
VGS = 10 V
VGS = 0 V
1.4
1000
1.2
1
0.8
0.6
TJ = 150°C
100
0.4
TJ = 125°C
0.2
0
−50
0.205
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
1.8
TJ = 25°C
1.0
Figure 3. On−Resistance vs. Drain Current and
Temperature
2
2.2
−25
0
25
50
75
100
125
150
10
0
TJ, JUNCTION TEMPERATURE (°C)
5
10
15
20
25
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
http://onsemi.com
3
30
NTS4001N, NVS4001N
C, CAPACITANCE (pF)
50
VDS = 0 V
40
Ciss
30
Crss
TJ = 25°C
VGS = 0 V
20
Ciss
Coss
10
0
10
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
Crss
5
VGS
0
VDS
5
10
15
20
25
5
QG
4
3
QGS
2
1
0
ID = 0.1 A
TJ = 25°C
0
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
IS, SOURCE CURRENT (AMPS)
0.08
0.4
0.8
0.2
0.6
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source Voltage vs. Total
Gate Charge
Figure 7. Capacitance Variation
0.1
QGD
VGS = 0 V
TJ = 25°C
0.06
0.04
0.02
0
0.5
0.55
0.65
0.6
0.7
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Diode Forward Voltage vs. Current
http://onsemi.com
4
0.75
1
NTS4001N, NVS4001N
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419−04
ISSUE N
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
e1
DIM
A
A1
A2
b
c
D
E
e
e1
L
HE
3
E
HE
1
2
b
e
A
0.05 (0.002)
c
A2
MIN
0.80
0.00
0.30
0.10
1.80
1.15
1.20
0.20
2.00
MILLIMETERS
NOM
MAX
0.90
1.00
0.05
0.10
0.70 REF
0.35
0.40
0.18
0.25
2.10
2.20
1.24
1.35
1.30
1.40
0.65 BSC
0.38
0.56
2.10
2.40
MIN
0.032
0.000
0.012
0.004
0.071
0.045
0.047
0.008
0.079
INCHES
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
0.026 BSC
0.015
0.083
MAX
0.040
0.004
0.016
0.010
0.087
0.053
0.055
0.022
0.095
STYLE 8:
PIN 1. GATE
2. SOURCE
3. DRAIN
L
A1
SOLDERING FOOTPRINT*
0.65
0.025
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
5
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTS4001N/D