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STD130N4F6AG

STD130N4F6AG

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT428

  • 描述:

    MOSFET N-CH 40V 80A DPAK

  • 数据手册
  • 价格&库存
STD130N4F6AG 数据手册
STD130N4F6AG Automotive-grade N-channel 40 V, 3.0 mΩ typ., 80 A STripFET™ F6 Power MOSFET in a DPAK package Datasheet - production data Features 7$%  Order code VDS RDS(on) max. ID STD130N4F6AG 40 V 3.6 mΩ 80 A • Designed for automotive applications and AEC-Q101 qualified  • Very low on-resistance  • Very low gate charge • High avalanche ruggedness '3$. • Low gate drive power loss Figure 1. Internal schematic diagram Applications • Switching applications ' 7$% Description This device is an N-channel Power MOSFET developed using the STripFET™ F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. *  6  $0Y Table 1. Device summary Order code Marking Package Packaging STD130N4F6AG 130N4F6 DPAK Tape and reel February 2015 This is information on a product in full production. DocID027413 Rev 2 1/16 www.st.com Contents STD130N4F6AG Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 .............................................. 8 DocID027413 Rev 2 STD130N4F6AG 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 40 V VGS Gate-source voltage ± 20 V ID (1) Drain current (continuous) at TC = 25 °C 80 A ID (1) Drain current (continuous) at TC = 100 °C 80 A IDM (2) Drain current (pulsed) 320 A PTOT Total dissipation at TC = 25 °C 143 W -55 to 175 °C Value Unit 1.05 °C/W 50 °C/W Value Unit Tstg Tj Storage temperature Operating junction temperature 1. Current limited by package. 2. Pulse width limited by safe operating area. Table 3. Thermal resistance Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-pcb Thermal resistance junction-pcb max (1) 1. When mounted on 1 inch2 2 oz. Cu board. Table 4. Thermal resistance Symbol Parameter IAR(1) Avalanche current, repetitive or not-repetitive 80 A EAS (2) Single pulse avalanche energy 386 mJ 1. Pulse width limited by Tj max 2. Starting Tj = 25 °C, ID = 80 A, VDD = 25 V DocID027413 Rev 2 3/16 16 Electrical characteristics 2 STD130N4F6AG Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 5. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown Voltage (VGS= 0) ID = 250 µA Min. Typ. Max. 40 Unit V VDS = 20 V 1 µA VDS = 20 V, Tc = 125 °C 10 µA ±100 nA 4 V 3.0 3.6 mΩ Min Typ. Max. Unit - 4260 - pF - 635 - pF - 308 - pF IDSS Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on resistance VGS = 10 V, ID = 40 A 2 Table 6. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Test conditions VDS = 25 V, f=1 MHz, VGS = 0 V Crss Reverse transfer capacitance Qg Total gate charge VDD = 20 V, ID = 80 A - 70 - nC Qgs Gate-source charge VGS = 10 V - 20 - nC Qgd Gate-drain charge (see Figure 14) - 18 - nC RG Intrinsic gate resistance f = 1 MHz, ID = 0 - 1.5 - Ω Table 7. Switching on/off (inductive load) Symbol td(on) tr td(off) tf 4/16 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 20 V, ID = 40 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15) Fall time DocID027413 Rev 2 Min. Typ. Max. Unit - 19.5 - ns - 62.5 - ns - 58 - ns - 19.5 - ns STD130N4F6AG Electrical characteristics Table 8. Source drain diode Symbol ISD Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 80 A ISDM(1) Source-drain current (pulsed) - 320 A VSD(2) Forward on voltage ISD = 40 A, VGS = 0 - 1.3 V trr Reverse recovery time ISD = 80 A, - 41 ns Qrr Reverse recovery charge di/dt = 100 A/µs, VDD = 32 V - 58 nC IRRM Reverse recovery current (see Figure 17) - 2.8 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID027413 Rev 2 5/16 16 Electrical characteristics 2.1 STD130N4F6AG Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance *,3')65 ,' $ *,3')65 . į  LV D UH Q R D LV '6 WK 5 LQ D[  Q P WLR \ UD GE SH LWH 2 LP /   —V    PV       6LQJOHSXOVH 9'6 9 Figure 4. Output characteristics *,3')65 ,' $ 9*6 9   PV 7Mƒ& 7F ƒ& 6LQJOHSXOVH      WS V Figure 5. Transfer characteristics *,3')65 ,' $  9  9'6 9    9     9      9'6 9 Figure 6. Normalized gate threshold voltage vs. temperature *,3')65 9*6 WK QRUP        9*6 9 Figure 7. Normalized V(BR)DSS vs. temperature *,3')65 9 %5 '66 QRUP ,' —$           6/16      7M ƒ&   DocID027413 Rev 2 ,' —$      7M ƒ& STD130N4F6AG Electrical characteristics Figure 8. Static drain-source on-resistance *,3')65 5'6 RQ Pȍ 9*6 9 Figure 9. Normalized on-resistance vs. temperature                ,' $ Figure 10. Gate charge vs. gate-source voltage *,3')65 9*6 9 *,3')65 5'6 RQ QRUP   9*6 9      7M ƒ& Figure 11. Capacitance variations *,3')65 & S) 9'' 9 ,' $  &LVV  I 0+]    &RVV  &UVV        4J Q&       9'6 9 Figure 12. Source-drain diode forward characteristics *,3')65 96' 9 7M ƒ&   7M ƒ&   7M ƒ&         ,6' $ DocID027413 Rev 2 7/16 16 Test circuits 3 STD130N4F6AG Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped Inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/16 0 DocID027413 Rev 2 10% AM01473v1 STD130N4F6AG 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID027413 Rev 2 9/16 16 Package mechanical data STD130N4F6AG Figure 19. DPAK (TO-252) type A2 drawing B5 10/16 DocID027413 Rev 2 STD130N4F6AG Package mechanical data Table 9. DPAK (TO-252) type A2 mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 E 5.10 6.40 6.60 E1 5.20 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.80 L2 0.80 L4 0.60 1.00 R V2 0.20 0° 8° DocID027413 Rev 2 11/16 16 Package mechanical data STD130N4F6AG Figure 20. DPAK (TO-252) footprint (a) )3B5 a. All dimensions are in millimeters 12/16 DocID027413 Rev 2 STD130N4F6AG 5 Packaging mechanical data Packaging mechanical data Figure 21. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F K0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v2 DocID027413 Rev 2 13/16 16 Packaging mechanical data STD130N4F6AG Figure 22. Reel T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius G measured at hub Tape slot in core for tape start 25 mm min. width AM08851v2 Table 10. DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 14/16 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 DocID027413 Rev 2 18.4 22.4 STD130N4F6AG 6 Revision history Revision history Table 11. Document revision history Date Revision Changes 26-Jan-2015 1 First release 12-Feb-2015 2 Document status promoted from preliminary to production data. Updated title and description in cover page. DocID027413 Rev 2 15/16 16 STD130N4F6AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 16/16 DocID027413 Rev 2
STD130N4F6AG 价格&库存

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