STD25NF20

STD25NF20 Automotive-grade N-channel 200 V, 0.10 Ω typ., 18 A STripFET™ Power MOSFET in a DPAK package Datasheet - production data Features TAB Order code VDS RDS(on) max ID PTOT STD25NF20 200 V 0.125 Ω 18 A 110 W • Designed for automotive applications and AEC-Q101 qualified 3 1 • Extremely low gate charge DPAK • Exceptional dv/dt capability • Low gate input resistance • 100% avalanche tested Applications Figure 1. Internal schematic diagram '7$% • Switching applications Description This N-channel enhancement mode Power MOSFET benefits from the latest refinement of STMicroelectronics' unique “single feature size“ strip-based process, which decreases the critical alignment steps to offer exceptional manufacturing reproducibility. The result is a transistor with extremely high packing density for low on-resistance, rugged avalanche characteristics and low gate charge. * 6 $0Y Table 1. Device summary Order code Marking Package Packing STD25NF20 25NF20 DPAK Tape and reel May 2015 This is information on a product in full production. DocID024372 Rev 3 1/16 www.st.com Contents STD25NF20 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 2/16 .............................................. 8 4.1 DPAK (TO-252) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DocID024372 Rev 3 STD25NF20 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 200 VGS Gate-source voltage ±20 Drain current (continuous) at TC = 25 °C 18 Drain current (continuous) at TC = 100 °C 11 IDM(1) Drain current (pulsed) 72 A PTOT Total dissipation at TC = 25 °C 110 W Peak diode recovery voltage slope 15 V/ns -55 to 175 °C Value Unit ID dv/dt(2) Tstg Tj V A Storage temperature Operating junction temperature 1. Pulse width limited by safe operating area. 2. ISD ≤ 18 A, di/dt ≤ 200 A/µs; VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS. Table 3. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 1.38 Rthj-pcb Thermal resistance junction-pcb 50(1) °C/W 1. When mounted on 1 inch2 FR-4, 2 Oz copper board Table 4. Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax ) 18 A EAS Single pulse avalanche energy (starting Tj=25°C, ID= IAR; VDD=50 V) 110 mJ DocID024372 Rev 3 3/16 16 Electrical characteristics 2 STD25NF20 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 5. Static Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions ID = 1 mA, VGS = 0 IDSS VDS = 200 V Zero gate voltage drain current (VGS = 0) VDS = 200 V, TC=125 °C IGSS Gate-body leakage current (VDS = 0) Min. Typ. 200 Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on-resistance Unit V 1 µA 50 µA ±100 nA 3 4 V 0.10 0.125 Ω Min. Typ. Max. Unit - 940 pF - 197 pF - 30 pF - 28 - 5.6 nC - 14.5 nC Min. Typ. Max. Unit - 15 - ns - 30 - ns - 40 - ns - 10 - ns VGS = ± 20 V VGS(th) Max. 2 VGS = 10 V, ID = 10 A Table 6. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 VDD = 160 V, ID = 20 A, VGS = 10 V (see Figure 13) 39 nC Table 7. Switching times Symbol td(on) tr(v) td(off) tf(i) 4/16 Parameter Test conditions Turn-on delay time Voltage rise time Turn-off-delay time VDD = 100 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V (see Figure 14 and Figure 17) Fall time DocID024372 Rev 3 STD25NF20 Electrical characteristics Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 18 A ISDM (1) Source-drain current (pulsed) - 72 A VSD (2) Forward on voltage - 1.6 V ISD trr ISD = 20 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 20 A, di/dt = 100 A/µs VDD = 50 V (see Figure 17) ISD = 20 A, di/dt = 100 A/µs VDD = 50 V, Tj = 150 °C (see Figure 17) - 155 ns - 775 nC - 10 A - 183 ns - 1061 nC - 11.6 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID024372 Rev 3 5/16 16 Electrical characteristics 2.1 STD25NF20 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM15627v1 ID (A) 72(' . 100 on ) 100µs S( pe ra ite tio d ni by n m this ax a R rea is 10µs   =WK =WK N 5 N5 WKMF WKM& įį WWS SϨ Ϩ m 1ms Tj=175°C Tc=25°C Li O D 10 1 10ms WSS Single pulse  0.1 0.1 10 1 100 VDS(V) Figure 4. Output characteristics ,' $ *,3*00*'2&+ 9*6 9      9*6 9         WSV Figure 5. Transfer characteristics ,' $ *,3*00*'7&+ 9'6 9     9*6 9     9*6 9    ϨϨ    9*6 9   9'69 Figure 6. Gate charge vs gate-source voltage       9*69 Figure 7. Static drain-source on-resistance 5'6RQ Ÿ +9 9*6 9      6/16  DocID024372 Rev 3     ,'$ STD25NF20 Electrical characteristics Figure 8. Capacitance variations Figure 9. Source-drain diode forward characteristics VSD (V) AM03982v1 TJ=-50°C 0.9 TJ=25°C 0.8 0.7 TJ=175°C 0.6 0.5 3 Figure 10. Normalized gate threshold voltage vs temperature AM03980v1 VGS(th) (norm) 1.10 6 9 12 15 18 ISD(A) Figure 11. Normalized on-resistance vs temperature RDS(on) (norm) 2.4 AM03981v1 2.2 1.00 2.0 0.90 1.8 0.80 1.6 0.70 1.4 1.2 0.60 1.0 0.50 0.8 0.6 0.40 -50 0 50 100 150 TJ(°C) DocID024372 Rev 3 -50 0 50 100 150 TJ(°C) 7/16 16 Test circuits 3 STD25NF20 Test circuits Figure 12. Switching times test circuit for resistive load Figure 13. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 15. Unclamped inductive load test circuit L A D G FAST DIODE D.U.T. S 3.3 μF B B B VD L=100μH 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform ton 9%5'66 tdon 9' toff tr tdoff tf 90% 90% ,'0 10% ,' 9'' 10% 0 9'' VDS 90% VGS $0Y 8/16 0 DocID024372 Rev 3 10% AM01473v1 STD25NF20 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID024372 Rev 3 9/16 16 Package information 4.1 STD25NF20 DPAK (TO-252) package information Figure 18. DPAK (TO-252) type A2 package outline BW\SH$BUHY 10/16 DocID024372 Rev 3 STD25NF20 Package information Table 9. DPAK (TO-252) type A2 mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 4.95 E 6.40 E1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.60 2.80 3.00 L2 0.65 0.80 0.95 L4 0.60 5.10 6.60 1.00 R V2 5.25 0.20 0° 8° DocID024372 Rev 3 11/16 16 Package information STD25NF20 Figure 19. DPAK (TO-252) recommended footprint (a) )3BB5 a. All dimensions are in millimeters 12/16 DocID024372 Rev 3 STD25NF20 4.2 Package information Packing information Figure 20. Tape outline for DPAK (TO-252) SLWFKHVFXPXODWLYH WROHUDQFHRQWDSHPP 7 3 7RSFRYHU WDSH 3 ' ( ) % . )RUPDFKLQHUHIRQO\ LQFOXGLQJGUDIWDQG UDGLLFRQFHQWULFDURXQG% : % $ 3 ' 8VHUGLUHFWLRQRIIHHG 5 %HQGLQJUDGLXV 8VHUGLUHFWLRQRIIHHG $0Y DocID024372 Rev 3 13/16 16 Package information STD25NF20 Figure 21. Reel outline for DPAK (TO-252) 7 5(( /',0(16,216 PPPLQ $FFHVVKROH $WVO RWORFDWLRQ % ' & 1 $ )XOOUDGLXV *PHDVXUHGDWKXE 7DSHVORW LQFRUHIRU WDSHVWDUWPPPLQ ZLGWK $0Y Table 10. DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 14/16 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 DocID024372 Rev 3 18.4 22.4 STD25NF20 5 Revision history Revision history Table 11. Document revision history Date Revision 12-Mar-2013 1 First release. 03-Sep-2013 2 – Modified: title and Features in cover page – Modified: Figure 12, 13, 14 and 15 – Minor text changes 3 Text and formatting changes throughout document. In Section 1: Electrical ratings: - updated Table 2 and Table 3 In Section 1: Electrical ratings: - updated Table 8 In Section 2.1: Electrical characteristics (curves): - updated Figure 4 and Figure 5 Updated Section 4: Package information 27-May-2015 Changes DocID024372 Rev 3 15/16 16 STD25NF20 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved 16/16 DocID024372 Rev 3