STH240N10F7-2

STH240N10F7-2, STH240N10F7-6 Datasheet N-channel 100 V, 2 mΩ typ., 180 A STripFET™ F7 Power MOSFETs in an H²PAK-2 and H²PAK-6 packages Features Order code TAB TAB STH240N10F7-2 7 2 3 1 H 2 PAK-2 1 H2 PAK-6 D(TAB) G(1) D(TAB) RDS(on) max. ID 100 V 2.5 mΩ 180 A • Among the lowest RDS(on) on the market • • Excellent FoM (figure of merit) Low Crss/Ciss ratio for EMI immunity • High avalanche ruggedness Description These N-channel Power MOSFETs utilize STripFET™ F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. G(1) S(2, 3) STH240N10F7-6 VDS S(2, 3, 4, 5, 6, 7) for H2PAK-2 for 2 H PAK-6 N-CHG1DTABS23_2_6 Product status STH240N10F7-2 STH240N10F7-6 Product summary Order code STH240N10F7-2 Marking 240N10F7 Package H²PAK-2 Packing Tape and reel Order code STH240N10F7-6 Marking 240N10F7 Package H²PAK-6 Packing Tape and reel DS10259 - Rev 3 - February 2018 For further information contact your local STMicroelectronics sales office. www.st.com/ STH240N10F7-2, STH240N10F7-6 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ±20 V ID (1) Drain current (continuous) at TC = 25 °C 180 A Drain current (continuous) at Tc = 100 °C 120 A IDM (2) Drain current (pulsed) 720 A PTOT Total dissipation at TC = 25 °C 300 W Single pulse avalanche energy 500 mJ -55 to 175 °C ID (1) EAS (3) Tj Tstg Operating junction temperature range Storage temperature range 1. Current limited by package. 2. Pulse width limited by safe operating area. 3. Starting Tj=25 °C, ID=45 A, VDD=50 V Table 2. Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 0.5 °C/W Rthj-pcb (1) Thermal resistance junction-pcb 35 °C/W 1. When mounted on 1 inch² FR-4, 2 Oz copper board. DS10259 - Rev 3 page 2/18 STH240N10F7-2, STH240N10F7-6 Electrical characteristics 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 3. On/Off states Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source breakdown voltage Zero gate voltage drain current Gate-body leakage current Test conditions Min. ID = 250 µA, VGS = 0 V 100 Static drain-source Unit V 1 µA VGS = 0 V, VDS = 100 V, TC=125 °C (1) 100 µA VGS = ±20 V, VDS = 0 V 100 nA 4.5 V 2.5 mΩ 2.5 VGS = 10 V, ID= 60 A on-resistance Max. VGS = 0 V, VDS = 100 V VDS = VGS , ID = 250 μA Gate threshold voltage Typ. 2 1. Defined by design, not subject to production test. Table 4. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit - 11550 - pF - 2950 - pF - 217 - pF Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge VDD = 50 V, ID = 180 A, - 160 - nC Qgs Gate-source charge VGS = 0 to 10 V - 48 - nC Qgd Gate-drain charge (see Figure 15. Test circuit for gate charge behavior) - 38 - nC VDS = 25 V, f = 1 MHz, VGS = 0 V Table 5. Switching times Symbol td(on) tr td(off) tf Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time VDD = 50 V, ID = 90 A, - 49 - ns Rise time RG = 4.7 Ω, VGS = 10 V (see Figure 14. Test circuit for resistive load switching times and Figure 19. Switching time waveform) - 139 - ns - 110 - ns - 112 - ns Min. Typ. Max. Unit Turn-off delay time Fall time Table 6. Source-drain diode Symbol ISD ISDM DS10259 - Rev 3 (1) Parameter Test conditions Source-drain current - 180 A Source-drain current (pulsed) - 720 A page 3/18 STH240N10F7-2, STH240N10F7-6 Electrical characteristics Symbol VSD(2) Parameter Test conditions Min. Typ. Max. Unit 1.2 V Source-drain curren ISD = 180 A, VGS = 0 V - Reverse recovery time ISD = 180 A, di/dt = 100 A/µs - 108 ns Qrr Reverse recovery charge - 315 nC IRRM Reverse recovery current VDD = 64 V, TJ = 150 °C (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 5.8 A trr 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration=300 μs, duty cycle 1.5%. DS10259 - Rev 3 page 4/18 STH240N10F7-2, STH240N10F7-6 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 3. Safe operating area ID (A) Figure 4. Thermal impedance GIPG020220181234SOA 10 2 tp =100 µs Operation in this area is limited by R DS(on) 10 1 tp =400 µs tp =1 ms 10 0 10 tp =10 ms T j ≤175 °C T c = 25°C single pulse 10 -1 tp =200 ms -2 10-1 100 VDS (V) 101 Figure 5. Output characteristics Figure 6. Transfer characteristics GIPG080720141111SA ID (A) VGS=8, 9, 10V 350 6V 7V 300 250 200 150 5V 100 50 0 0 1 2 3 VDS(V) Figure 7. Gate charge vs gate-source voltage Figure 8. Static drain-source on-resistance GIPG080720141135SA RDS(on) (mΩ) VGS=10V 2.10 2.00 1.90 1.80 20 DS10259 - Rev 3 40 60 80 100 120 140 160 ID(A) page 5/18 STH240N10F7-2, STH240N10F7-6 Electrical characteristics (curves) Figure 9. Capacitance variations GIPG040620141429SA C (pF) Figure 10. Normalized gate threshold voltage vs. temperature GIPG070720141441SA VGS(th) (norm) ID=250µA Ciss 10000 1 Coss 1000 0.8 100 0.6 Crss 10 0 20 40 60 80 VDS(V) Figure 11. Normalized V(BR)DSS vs. temperature 0.4 -75 -25 25 75 125 TJ(°C) Figure 12. Normalized on-resistance vs. temperature GIPG070720141455SA RDS(on) (norm) VGS=10V ID=60A 1.8 1.4 1 0.6 -75 -25 25 75 125 TJ(°C) Figure 13. Source-drain diode forward characteristics DS10259 - Rev 3 page 6/18 STH240N10F7-2, STH240N10F7-6 Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times Figure 17. Unclamped inductive load test circuit L D G A D.U.T. S 25 Ω A A 100 µH fast diode B B B VD 3.3 µF D G + RG 1000 + µF 2200 + µF 3.3 µF VDD ID VDD D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform V(BR)DSS ton VD td(on) IDM toff td(off) tr 90% tf 90% 10% ID VDD 10% 0 VDD VGS 0 VDS 90% 10% AM01472v1 AM01473v1 DS10259 - Rev 3 page 7/18 STH240N10F7-2, STH240N10F7-6 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS10259 - Rev 3 page 8/18 STH240N10F7-2, STH240N10F7-6 H²PAK-2 package information 4.1 H²PAK-2 package information Figure 20. H²PAK-2 package outline 8159712_6 DS10259 - Rev 3 page 9/18 STH240N10F7-2, STH240N10F7-6 H²PAK-2 package information Table 7. H²PAK-2 package mechanical data Dim. mm Min. Typ. Max. A 4.30 4.70 A1 0.03 0.20 C 1.17 1.37 e 4.98 5.18 E 0.50 0.90 F 0.78 0.85 H 10.00 10.40 H1 7.40 L 15.30 L1 1.27 1.40 L2 4.93 5.23 L3 6.85 7.25 L4 1.5 1.7 M 2.6 2.9 R 0.20 0.60 V 0° 8° - 7.80 15.80 Figure 21. H²PAK-2 recommended footprint 8159712_6 Note: DS10259 - Rev 3 Dimensions are in mm. page 10/18 STH240N10F7-2, STH240N10F7-6 H²PAK-6 package information 4.2 H²PAK-6 package information Figure 22. H²PAK-6 package outline 8159693_Rev_8 DS10259 - Rev 3 page 11/18 STH240N10F7-2, STH240N10F7-6 H²PAK-6 package information Table 8. H²PAK-6 package mechanical data Dim. mm Min. DS10259 - Rev 3 Typ. Max. A 4.30 4.70 A1 0.03 0.20 C 1.17 1.37 e 2.34 e1 4.88 5.28 e2 7.42 7.82 E 0.45 0.60 F 0.50 0.70 H 10.00 10.40 H1 7.40 7.80 L 14.75 15.25 L1 1.27 1.40 L2 4.35 4.95 L3 6.85 7.25 L4 1.50 1.75 M 1.90 2.50 R 0.20 0.60 V 0° 8° 2.54 2.74 page 12/18 STH240N10F7-2, STH240N10F7-6 H²PAK-6 package information Figure 23. H²PAK-6 recommended footprint footprint_Rev_8 Note: DS10259 - Rev 3 Dimensions are in mm. page 13/18 STH240N10F7-2, STH240N10F7-6 Packing information 4.3 Packing information Figure 24. Tape outline 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F K0 W B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v2 DS10259 - Rev 3 page 14/18 STH240N10F7-2, STH240N10F7-6 Packing information Figure 25. Reel outline T REEL DIMENSIONS 40 mm min. Access hole At slot location B D C N A G measured Tape slot In core for Full radius At hub Tape start Table 9. Tape and reel mechanical data Tape Dim. DS10259 - Rev 3 Reel mm mm Dim. Min. Max. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 330 13.2 26.4 30.4 page 15/18 STH240N10F7-2, STH240N10F7-6 Revision history Table 10. Document revision history Date Version 07-May-2014 1 Changes Initial release. – Modified: title and description 23-Jul-2014 2 – Added: Section 2.1: Electrical characteristics (curves) – Minor text changes Removed maturity status indication from cover page. Production data. 06-Feb-2018 3 Modified Figure 3. Safe operating area. Minor text changes. DS10259 - Rev 3 page 16/18 STH240N10F7-2, STH240N10F7-6 Contents Contents 1 Electrical ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 H²PAK-2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 H²PAK-6 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 DS10259 - Rev 3 page 17/18 STH240N10F7-2, STH240N10F7-6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS10259 - Rev 3 page 18/18