VND830LSP-E
Double channel high-side driver
Features
Type
RDS(on)
IOUT
VCC
VND830LSP-E
60 mΩ
18 A(1)
36 V(1)
10
1. Per channel
1
PowerSO-10
■
ECOPACK®: lead free and RoHS compliant
■
Automotive Grade: compliance with AEC
guidelines
■
Very low standby current
■
CMOS compatible input
■
On-state open-load detection
■
Off-state open-load detection
■
Thermal shutdown protection and diagnosis
■
Undervoltage shutdown
■
Overvoltage clamp
■
Output stuck to VCC detection
■
Load current limitation
■
Reverse battery protection
■
Electrostatic discharge protection
Description
The VND830LSP-E is a monolithic device made
using STMicroelectronics™ VIPower™ M0-3
technology. It is intended for driving any kind of
load with one side connected to ground. Active
VCC pin voltage clamp protects the device against
low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload.
The device detects open-load condition both in
on-state and off-state. The open-load threshold is
aimed at detecting the 5 W/12 V standard bulb as
an open-load fault in the on-state.
Device automatically turns off in case of ground
pin disconnection.
Table 1.
Device summary
Order codes
Package
Power-SO-10™
September 2013
Tube
Tape and reel
VND830LSP-E
VND830LSPTR-E
Doc ID 10882 Rev 4
1/27
www.st.com
1
Contents
VND830LSP-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
4
6
2/27
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.5
PowerSO-10 maximum demagnetization energy
(VCC = 13.5 V) 19
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3
PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 10882 Rev 4
VND830LSP-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VCC - output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 10882 Rev 4
3/27
List of figures
VND830LSP-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
4/27
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Status low output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Satus clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Maximum turn- off current versus load inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PowerSO-10 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20
PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 21
Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 21
PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 25
Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 10882 Rev 4
VND830LSP-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
Vcc
Vcc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
GND
CLAMP 1
OUTPUT1
INPUT1
DRIVER 1
CLAMP 2
STATUS1
CURRENT LIMITER 1
DRIVER 2
LOGIC
OUTPUT2
OVERTEMP. 1
OPEN LOAD ON 1
CURRENT LIMITER 2
INPUT2
OPEN LOAD OFF 1
OPEN LOAD ON 2
STATUS2
OPEN LOAD OFF 2
OVERTEMP. 2
Figure 2.
Configuration diagram (top view)
GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
6
7
8
9
5
4
3
10
1
OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2
2
11
VCC
PowerSO-10
Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
To ground
X
Doc ID 10882 Rev 4
Through 10KΩ
resistor
5/27
Electrical specifications
2
VND830LSP-E
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
IIN1
VF1(1)
VCC
IOUT1
INPUT1
VIN1
OUTPUT1
VOUT1
ISTAT1
STATUS 1
VSTAT1
IOUT2
IIN2
VIN2
OUTPUT2
INPUT2
ISTAT2
VOUT2
STATUS 2
VSTAT2
GND
IGND
1. VFn = VCCn - VOUTn during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.
Table 3.
Absolute maximum ratings
Symbol
Value
Unit
41
V
VCC
DC supply voltage
-VCC
Reverse DC supply voltage
-0.3
V
- IGND
DC reverse ground pin current
-200
mA
Internally limited
A
-6
A
IOUT
DC output current
-IOUT
Reverse DC output current
IIN
DC input current
+/- 10
mA
ISTAT
CD status current
+/- 10
mA
VESD
Electrostatic discharge (Human Body Model:
R = 1.5 KΩ; C = 100 pF)
– INPUT
– STATUS
– OUTPUT
– VCC
4000
4000
5000
5000
V
V
V
V
74
W
Ptot
6/27
Parameter
Power dissipation at Tc = 25 °C
Doc ID 10882 Rev 4
VND830LSP-E
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Symbol
EMAX
Value
Unit
52
mJ
Internally limited
°C
Maximum switching energy
(L = 0.14 mH; RL = 0 Ω; Vbat= 13.5 V;
Tjstart = 150 °C; IL = 14 A)
Tj
Junction operating temperature
Tc
Case operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
TSTG
2.2
Parameter
Thermal data
Table 4.
Symbol
Rthj-case
Rthj-amb
Thermal data
Parameter
Value
Thermal resistance junction-case
Thermal resistance junction-ambient
Unit
2
52
(1)
°C/W
(2)
37
°C/W
1.
When mounted on a standard single sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
2.
When mounted on a standard single sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
Doc ID 10882 Rev 4
7/27
Electrical specifications
2.3
VND830LSP-E
Electrical characteristics
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise specified. (Per each channel).
Table 5.
Power output
Symbol
Parameter
VCC(1)
VUSD(1)
VOV(1)
RON
IS(1)
Test conditions
Min.
Typ.
Max.
Unit
Operating supply voltage
5.5
13
36
V
Undervoltage shutdown
3
4
5.5
V
Overvoltage shutdown
36
On-state resistance
Supply current
V
IOUT = 2 A; Tj = 25 °C
60
mΩ
IOUT = 2 A; VCC > 8 V
120
mΩ
Off-state; VCC = 13 V;
VIN = VOUT = 0 V
12
40
µA
Off-state; VCC=13V;
VIN = VOUT = 0 V; Tj = 25 °C
12
25
µA
On-state; VCC = 13 V
5
7
mA
0
50
µA
-75
0
µA
IL(off1)
Off-state output current
VIN = VOUT = 0 V; VCC = 36 V;
Tj = 125 °C
IL(off2)
Off-state output current
VIN = 0 V; VOUT = 3.5 V
IL(off3)
Off-state output current
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
5
µA
IL(off4)
Off-state output current
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
3
µA
1. Per device.
Table 6.
Symbol
Protection(1)
Min.
Typ.
Max.
Unit
Shutdown temperature
150
175
200
°C
TR
Reset temperature
135
Thyst
Thermal hysteresis
7
15
18
23
TTSD
Ilim
Vdemag
Parameter
Test conditions
VCC = 13 V
Current limitation
°C
5.5 V < VCC VOL
VINn
OVER TEMP STATUS TIMING
Tj > TTSD
VINn
VSTATn
VSTATn
tSDL
tDOL(off)
Table 12.
tDOL(on)
Truth table
Conditions
Input
Output
Sense
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Figure 5.
10/27
tSDL
Switching time waveforms
Doc ID 10882 Rev 4
VND830LSP-E
Electrical specifications
Table 13.
Electrical transient requirements on VCC pin (part 1)
Test levels
ISO T/R 7637/1
test pulse
I
II
III
IV
Delays and
impedance
1
-25 V
-50 V
-75 V
-100 V
2 ms, 10 Ω
2
+25 V
+50 V
+75 V
+100 V
0.2 ms, 10 Ω
3a
-25 V
-50 V
-100 V
-150 V
0.1 µs, 50 Ω
3b
+25 V
+50 V
+75 V
+100 V
0.1 µs, 50 Ω
4
-4 V
-5 V
-6 V
-7 V
100 ms, 0.01 Ω
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
400 ms, 2 Ω
Table 14.
Electrical transient requirements on VCC pin (part 2)
Test levels results
ISO T/R 7637/1
Test pulse
I
II
III
IV
1
C
C
C
C
2
C
C
C
C
3a
C
C
C
C
3b
C
C
C
C
4
C
C
C
C
5
C
E
E
E
Table 15.
Electrical transient requirements on VCC pin (part 3)
Class
Contents
C
All functions of the device are performed as designed after exposure to
disturbance.
E
One or more functions of the device is not performed as designed after exposure
to disturbance and cannot be returned to proper operation without replacing the
device.
Doc ID 10882 Rev 4
11/27
Electrical specifications
Figure 6.
VND830LSP-E
Waveforms
NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUTn
OUTPUT VOLTAGEn
STATUS
undefined
OVERVOLTAGE
VCC VOV
VCC
INPUTn
OUTPUT VOLTAGEn
STATUSn
OPEN LOAD with external pull-up
INPUTn
VOUT > VOL
OUTPUT VOLTAGEn
VOL
STATUSn
OPEN LOAD without external pull-up
INPUTn
OUTPUT VOLTAGEn
STATUSn
Tj
TTSD
TR
OVERTEMPERATURE
INPUTn
OUTPUT CURRENTn
STATUSn
12/27
Doc ID 10882 Rev 4
VND830LSP-E
2.4
Electrical specifications
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
IL(off1)
High level input current
Iih (µA)
1.35
6
1.2
5.25
Off State
Vcc=13V
Vin=Vout=0V
1.05
Vin=3.25V
4.5
0.9
3.75
0.75
3
0.6
2.25
0.45
1.5
0.3
0.75
0.15
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
Figure 9.
50
75
100
125
150
175
125
150
175
125
150
175
Tc (ºC)
Input clamp voltage
Figure 10. Status leakage current
Ilstat (µA)
Vicl (V)
0.07
8
7.75
0.06
Iin=1mA
Vstat=5V
7.5
0.05
7.25
0.04
7
0.03
6.75
0.02
6.5
0.01
6.25
0
6
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Figure 11.
50
75
100
Tc (ºC)
Tc (ºC)
Status low output current
Figure 12. Satus clamp voltage
Vscl (V)
Vstat (V)
8
0.8
7.75
0.7
Istat=1mA
Istat=1.6mA
0.6
7.5
0.5
7.25
0.4
7
0.3
6.75
0.2
6.5
0.1
6.25
6
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
Tc (ºC)
Tc (ºC)
Doc ID 10882 Rev 4
13/27
Electrical specifications
VND830LSP-E
Figure 13. On-state resistance vs Tcase
Figure 14. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
100
160
90
140
Iout=2A
Vcc=13V
80
Iout=2A
120
70
100
60
Tc=150ºC
80
50
40
60
Tc=25ºC
30
40
Tc= -40ºC
20
20
10
0
0
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
Vcc (V)
Tc (ºC)
Figure 15. Open-load on-state detection
threshold
Iol (A)
Figure 16. Open-load off-state detection
threshold
Vol (V)
2
5
4.5
1.75
Vin=0V
Vin=5V
4
1.5
3.5
1.25
3
1
2.5
2
0.75
1.5
0.5
1
0.25
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
100
125
150
175
Tc (ºC)
Figure 17. Input high level
Figure 18. Input low level
Vil (V)
Vih (V)
4
2.25
3.8
2.125
3.6
2
3.4
1.875
3.2
3
1.75
2.8
1.625
2.6
1.5
2.4
1.375
2.2
1.25
2
-50
-25
0
25
50
75
100
125
150
175
14/27
-50
-25
0
25
50
75
Tc (ºC)
Tc (ºC)
Doc ID 10882 Rev 4
VND830LSP-E
Electrical specifications
Figure 19. Input hysteresis voltage
Figure 20. Overvoltage shutdown
Vihyst (V)
Vov
1.4
50
1.3
47.5
1.2
45
1.1
42.5
1
40
0.9
37.5
0.8
35
0.7
32.5
0.6
0.5
30
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
100
125
150
175
150
175
Figure 22. Turn-off voltage slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
800
800
700
Vcc=13V
Rl=6.5Ohm
600
75
Tc (ºC)
Figure 21. Turn-on voltage slope
700
50
Vcc=13V
Rl=6.5Ohm
600
500
500
400
400
300
300
200
200
100
100
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (ºC)
-25
0
25
50
75
100
125
Tc (ºC)
Figure 23. ILIM vs Tcase
Ilim (A)
35
32.5
Vcc=13V
30
27.5
25
22.5
20
17.5
15
12.5
10
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Doc ID 10882 Rev 4
15/27
Application information
3
VND830LSP-E
Application information
Figure 24. Application schematic
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
μC
Rprot
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
OUTPUT2
GND
RGND
VGND
DGND
3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤ 600 mV / IS(on)max
2.
RGND ≥ (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device’s datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
PD = (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
16/27
Doc ID 10882 Rev 4
VND830LSP-E
Application information
values. This shift varies depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize solution 2 (see Section 3.1.2).
3.1.2
Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (∼600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in Table 13.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = -100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 65 kΩ.
Recommended values:
Rprot =10 kΩ.
3.4
Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5 V line used to supply the
microprocessor.
Doc ID 10882 Rev 4
17/27
Application information
VND830LSP-E
The external resistor has to be selected according to the following requirements:
1.
No false open-load indication when load is connected:
in this case we have to avoid VOUT to be higher than VOlmin; this results in the following
condition VOUT = (VPU/(RL + RPU))RL < VOlmin.
2.
No misdetection when load is disconnected:
in this case the VOUT has to be higher than VOLmax; this results in the following
condition RPU < (VPU – VOLmax)/IL(off2).
Because Is(OFF) may significantly increase if VOUT is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in
standby. The values of VOLmin, VOLmax and IL(off2) are available in Section 2.3: Electrical
characteristics.
Figure 25. Open-load detection in off-state
V batt.
VPU
VCC
RPU
INPUT
DRIVER
+
LOGIC
IL(off2)
OUT
+
R
STATUS
VOL
GROUND
18/27
Doc ID 10882 Rev 4
RL
VND830LSP-E
3.5
Application information
PowerSO-10 maximum demagnetization energy
(VCC = 13.5 V)
Figure 26. Maximum turn- off current versus load inductance(1)
I LM AX (A)
100
10
A
C
1
0,01
0,1
1
10
B
100
L( mH)
A: Single pulse at Tjstart = 150 °C
B: Repetitive pulse at Tjstart = 100 °C
C: Repetitive pulse at Tjstart = 125 °C
Condition:
VCC = 13.5 V
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
1. Values are generated with RL = 0 Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
Doc ID 10882 Rev 4
19/27
Package and PCB thermal data
VND830LSP-E
4
Package and PCB thermal data
4.1
PowerSO-10 thermal data
Figure 27. PowerSO-10 PC board(1)
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm,
Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 28. Rthj-amb vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
PCB Cu heatsink area (cm^2)
20/27
Doc ID 10882 Rev 4
8
10
VND830LSP-E
Package and PCB thermal data
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
100
0.5 cm2
6 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10
Tj_1
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd1
Tj_2
C1
C2
R1
R2
Pd2
T_amb
Doc ID 10882 Rev 4
21/27
Package and PCB thermal data
Table 16.
22/27
VND830LSP-E
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/ W)
0.15
R2 (°C/ W)
0.8
R3 (°C/ W)
0.7
R4 (°C/ W)
0.8
R5 (°C/ W)
12
R6 (°C/ W)
37
C1 (W.s/ °C)
0.0006
C2 (W.s /°C)
2.1E-03
C3 (W.s/ °C)
0.013
C4 (W.s/ °C)
0.3
C5 (W.s/ °C)
0.75
C6 (W.s/ °C)
3
Doc ID 10882 Rev 4
6
22
5
VND830LSP-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSO-10 mechanical data
Figure 31. PowerSO-10 package dimensions
B
0.10 A B
10
H
E
E
E2
1
SEATING
PLANE
e
B
DETAIL "A"
A
C
0.25
h
E4
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL "A"
α
Doc ID 10882 Rev 4
23/27
Package and packing information
Table 17.
VND830LSP-E
PowerSO-10 mechanical data
Millimeters
Dim.
Min.
Max.
A
3.35
3.65
A(1)
3.4
3.6
A1
0
0.10
B
0.40
0.60
B(1)
0.37
0.53
C
0.35
0.55
C(1)
0.23
0.32
D
9.40
9.60
D1
7.40
7.60
E
9.30
9.50
E2
7.20
7.60
E2(1)
7.30
7.50
E4
5.90
6.10
E4(1)
5.90
6.30
e
1.27
F
1.25
1.35
F(1)
1.20
1.40
H
13.80
14.40
H(1)
13.85
14.35
h
0.50
L
1.20
1.80
L(1)
0.80
1.10
α
0°
8°
α(1)
2°
8°
1. Muar only POA P013P.
24/27
Typ.
Doc ID 10882 Rev 4
VND830LSP-E
5.3
Package and packing information
PowerSO-10 packing information
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix)
14.6 - 14.9
B
10.8 - 11
C
6.30
A
0.67 - 0.73
1
9.5
2
3
4
5
10
9
8
7
6
0.54 - 0.6
All dimensions are in mm.
1.27
Base Q.ty Bulk Q.ty Tube length (± 0.5)
A
B
C (± 0.1)
Casablanca
50
1000
532
10.4
16.4
0.8
Muar
50
1000
532
4.9
17.2
0.8
Figure 33. Tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
24
4
24
1.5
1.5
11.5
6.5
2
All dimensions are in mm.
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
Doc ID 10882 Rev 4
25/27
Revision history
6
VND830LSP-E
Revision history
Table 18.
26/27
Document revision history
Date
Revision
Changes
1-Oct-2004
1
Initial release.
19-Jul-2010
2
Changed Features list.
Reformatted entire document. No content change.
25-Feb-2011
3
Updated IOUT value in Features list.
Updated Table 16: Thermal parameter.
19-Sep-2013
4
Updated Disclaimer.
Doc ID 10882 Rev 4
VND830LSP-E
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27/27
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