SIC468ED-T1-GE3

SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix 4.5 V to 60 V Input, 2 A, 4 A, 6 A, 10 A microBUCK® DC/DC Converter FEATURES LINKS TO ADDITIONAL RESOURCES Design Tool Evaluation Boards Design Tools DESCRIPTION The SiC46x is a family of wide input voltage high efficiency synchronous buck regulators with integrated high side and low side power MOSFETs. Its power stage is capable of supplying high continuous current at up to 2 MHz switching frequency. This regulator produces an adjustable output voltage down to 0.8 V from 4.5 V to 60 V input rail to accommodate a variety of applications, including computing, consumer electronics, telecom, and industrial. SiC46x’s architecture delivers ultrafast transient response with minimum output capacitance and tight ripple regulation at very light load. The device is internally compensated and is stable with any capacitor. No external ESR network is required for loop stability purpose. The device also incorporates a power saving scheme that significantly increases light load efficiency. The regulator integrates a full protection feature set, including over current protection (OCP), output overvoltage protection (OVP), short circuit protection (SCP), output undervoltage protection (UVP) and thermal shutdown (OTP). It also has UVLO for input rail and a user programmable soft start. The SiC46x family is available in 2 A, 4 A, 6 A, 10 A pin compatible 5 mm by 5 mm lead (Pb)-free power enhanced MLP55-27L package. • Versatile - Single supply operation from 4.5 V to 60 V input voltage - Adjustable output voltage down to 0.8 V - Scalable solution 2 A (SiC469), 4 A (SiC468), 6 A (SiC467), 10 A (SiC466) - Output voltage tracking and sequencing with pre-bias start up - ± 1 % output voltage accuracy at -40 °C to +125 °C • Internal compensation • Highly efficient - 98 % peak efficiency - 4 μA supply current at shutdown - 156 μA operating current not switching • Highly configurable - Adjustable switching frequency from 100 kHz to 2 MHz - Adjustable soft start and selectable preset 100 %, 75 %, and 50 % current limit - 2 modes of operation, forced continuous conduction, power save • Robust and reliable - Output over voltage protection - Output under voltage / short circuit protection with auto retry - Power good flag and over temperature protection - Supported by Vishay PowerCAD online design simulation • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • • • • • • • Industrial and automation Home automation Industrial and server computing Networking, telecom, and base station power supplies Wall transformer regulation Robotics High end hobby electronics: remote control cars, planes, and drones • Battery management systems • Power tools • Vending, ATM, and slot machines Axis Title TYPICAL APPLICATION CIRCUIT 100 97 10000 VIN = 24 V, VOUT = 12 V VIN = 48 V, VOUT = 12 V SiC466 SiC467 SiC468 SiC469 VDD VDRV SS CIN VOUT SW VOUT NC VFB PGND fSW AGND Css ILIMIT MODE CBOOT Phase NC Rup Rdown RMODE Rfsw Fig. 1 - Typical Application Circuit COUT 91 1000 88 85 1st line 2nd line VIN BOOT VCIN PGOOD EN Input 4.5 VDC to 60 VDC 2nd line eff - Efficiency (%) 94 VIN = 24 V, VOUT = 5 V 82 79 100 VIN = 48 V, VOUT = 5 V 76 73 70 0.01 10 0.1 1 IOUT - Output Current (A) Fig. 2 - SiC467 Efficiency vs. Output Current S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 1 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix PHASE 5 30 VIN 29 PGND ķ 16 VDRV VDRV 1 6 15 GL GL 1 5 14 SW SW 1 4 13 SW SW 1 3 12 SW SW 1 2 27 MODE 26 VDD 24 fSW 22 VFB 23 AGND 21 NC 25 ILIM 2 PGOOD 3 EN 4 BOOT ķ PGND 11 PGND 10 PGND 9 VIN 8 VIN 7 PHASE 6 PGND 1 7 30 PGND 29 VIN 5 PHASE 6 PHASE VIN 7 BOOT 4 NC 1 8 17 PGND PGND 11 EN 3 28 AGND VIN 8 18 NC 1 VCIN SS 19 PGND 9 28 AGND PGOOD 2 19 SS PGND 10 IJ VCIN 1 20 VOUT 20 VOUT 22 VFB 21 NC 24 fSW 23 AGND 25 ILIM 26 VDD 27 MODE PIN CONFIGURATION Fig. 3 - Pin Configuration PIN DESCRIPTION PIN NUMBER SYMBOL DESCRIPTION 1 VCIN Supply voltage for internal regulators VDD and VDRV. This pin should be tied to VIN, but can also be connected to a lower supply voltage (> 5 V) to reduce losses in the internal linear regulators 2 PGOOD 3 EN Open-drain power good indicator - high impedance indicates power is good. An external pull-up resistor is required Enable pin. Tie high / low to enable / disable the IC accordingly. This is a high voltage compatible pin, can be tied to 60 V 4 BOOT High side driver bootstrap voltage 5, 6 PHASE Return path of high side gate driver 7, 8, 29 VIN 9, 10, 11, 17, 30 PGND 12, 13, 14 SW Power stage switch node 15 GL Low side MOSFET gate signal 16 VDRV 18, 21 NC No connection internally 19 SS Set the soft start ramp by connecting a capacitor to AGND. An internal current source will charge the capacitor 20 VOUT 22 VFB 23, 28 AGND 24 fSW 25 ILIMIT 26 VDD 27 Mode S21-1151-Rev. H, 06-Dec-2021 Power stage input voltage. Drain of high side MOSFET Power ground Supply voltage for internal gate driver. When using the internal LDO as a bias power supply, VDRV is the LDO output. Connect a 4.7 μF decoupling capacitor to PGND Output voltage sense point for internal ripple injection components Feedback input for switching regulator used to program the output voltage - connect to an external resistor divider from VOUT to AGND Analog ground Set the on-time by connecting a resistor to AGND Set the current limit by connecting ILIMIT pin to AGND, float or VDD Bias supply for the IC. VDD is an LDO output, connect a 1 μF decoupling capacitor to AGND Set various operation modes by connecting a resistor to AGND. See specification table for details Document Number: 76044 2 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ORDERING INFORMATION PART NUMBER PACKAGE MARKING CODE PowerPAK® MLP55-27L SiC466ED-T1-GE3 SiC466 SiC466EVB-D Reference board PowerPAK® MLP55-27L SiC467ED-T1-GE3 SiC467 SiC467EVB-D Reference board PowerPAK® MLP55-27L SiC468ED-T1-GE3 SiC468 SiC468EVB-E Reference board PowerPAK® MLP55-27L SiC469ED-T1-GE3 SiC469 SiC469EVB-E Reference board PART MARKING INFORMATION = pin 1 indicator P/N P/N = = Siliconix logo LL = ESD symbol FYWW part number code F = assembly factory code Y = year code WW = week code LL = lot code ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) ELECTRICAL PARAMETER CONDITIONS LIMITS VCIN, VIN Reference to PGND -0.3 to 66 EN Reference to PGND -0.3 to 60 SW / PHASE Reference to PGND -0.3 to 66 100 ns -10 to 72 SW / PHASE (AC) VDRV Reference to PGND -0.3 to 6 VDD Reference to AGND -0.3 to VDRV + 0.3 BOOT UNIT V -0.3 to VPHASE + VDRV AGND to PGND -0.3 to 0.3 VOUT Reference to PGND 30 All other pins Reference to AGND -0.3 to VDD + 0.3 Junction temperature TJ -40 to +150 Storage temperature TSTG -65 to +150 Temperature °C Power Dissipation Thermal resistance from junction to ambient 12 Thermal resistance from junction to case 2 °C/W ESD Protection Electrostatic discharge protection Human body model, JESD22-A114 2000 Charged device model, JESD22-A101 500 V Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability. S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 3 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix RECOMMENDED OPERATING CONDITIONS (all voltages referenced to GND = 0 V) PARAMETER MIN. TYP. MAX. Input voltage (VIN) 4.5 - 60 Control input voltage (VCIN) (1) 4.5 - 60 0 - 60 Bias supply (VDD) 4.75 5 5.25 Drive supply voltage (VDRV) 4.75 5.3 5.55 Output voltage (VOUT) 0.8 - 15 Enable (EN) UNIT V Temperature Recommended ambient temperature -40 to +105 Operating junction temperature -40 to +125 °C Note (1) For input voltages below 5 V, provide a separate supply to V CIN of at least 5 V to prevent the internal VDD rail UVLO from triggering ELECTRICAL SPECIFICATIONS (VIN = VCIN = 48 V, TJ = -40 °C to +125 °C, unless otherwise stated) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VIN = VCIN = 6 V to 60 V, VEN = 5 V, not switching 4.55 5 5.3 VIN = VCIN = 5 V, VEN = 5 V, not switching 4.5 5 - - 150 - mV 3.75 4 4.25 V mV Power Supplies VDD supply VDD dropout VDD UVLO threshold, rising VDD UVLO hysteresis Input current Shutdown current VDD VDD_DROPOUT VIN = VCIN = 5 V, IVDD = 1 mA VDD_UVLO VDD_UVLO_HYST V - 150 - IVCIN Non-switching, VFB > 0.8 V - 156 200 IVCIN_SHDN VEN = 0 V - 4 8 TJ = 25 °C 796 800 804 TJ = -40 °C to +125 °C (1) 792 800 808 μA Controller and Timing Feedback voltage VFB input bias current Minimum on-time tON accuracy On-time range VFB m/V IFB - 2 - nA tON_MIN. - 45 100 ns tON_ACCURACY -10 - 10 % tON_RANGE 100 - 8000 ns Minimum off-time tOFF_MIN. - 250 - ns Soft start current ISS 2 5 7 μA -3 - 3 mV Zero crossing detection point S21-1151-Rev. H, 06-Dec-2021 ZCD LX-PGND Document Number: 76044 4 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL SPECIFICATIONS (VIN = VCIN = 48 V, TJ = -40 °C to +125 °C, unless otherwise stated) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Fault Protections SiC466 valley current limit SiC467 valley current limit IOCP SiC468 valley current limit SiC469 valley current limit Output OVP threshold OVP Output UVP threshold UVP Over temperature protection ILM tied to VDD - 13 - ILM is not connect - 9.75 - ILM tied to AGND - 6.5 - ILM tied to VDD - 10 - ILM is not connect - 7.5 - ILM tied to AGND - 5 - ILM tied to VDD - 6 - ILM is not connect - 4.2 - ILM tied to AGND - 3 - ILM tied to VDD - 4 - ILM is not connect - 3 - ILM tied to AGND - 2 - - 20 - - -80 - VFB with respect to 0.8 V reference OTPR Rising temperature - 150 - OTPHYST Hysteresis - 35 - VFB_RISING_VTH_OV VFB rising above 0.8 V reference - 20 - VFB_FALLING_VTH_UV VFB falling below 0.8 V reference - -10 - 30 40 55 A % °C Power Good Power good output threshold % Power good hysteresis PGOOD_HYST Power good on resistance RON_PGOOD - 6 15 Ω Power good delay time tDLY_PGOOD 15 25 35 μs EN logic high level VEN_H 1.2 1.4 1.5 EN logic low level VEN_L 1 1.2 1.35 VEN_HYS 150 200 400 mV REN - 6 - MΩ IMODE - 5 - μA mV EN / MODE / Threshold EN logic hysteresis EN pull down resistance Mode pull up current Mode 1 Power save mode enabled, VDD, VDRV Pre-reg on - 2 - Mode 2 Power save mode disabled, VDD, VDRV Pre-reg on - 301 - Mode 3 Power save mode disabled, VDRV Pre-reg off, VDD Pre-reg on, provide external VDRV - 499 - Mode 4 Power save mode enabled, VDRV Pre-reg off, VDD Pre-reg on, provide external VDRV - 1000 - RMODE V kΩ Note (1) Guaranteed by design S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 5 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM VCIN VIN BOOT Sync. rectifier VDRV Regulator VDD VDD UVLO EN HS UVLO Enable fSW ton On time generator min. toff VDD HS driver 5 μA PHASE MODE MODE VOUT PHASE VDD 0.8 V 5 μA SW Control logic Ramp VDRV PWM Comp LS driver Reference PHASE Zero crossing GL OTA SS PGOOD VFB Over voltage under voltage ILIMIT VFB PHASE Over current Over temperature Power good AGND PGND Fig. 4 - Functional Block Diagram OPERATIONAL DESCRIPTION Device Overview • Dedicated enable pin for easy power sequencing SiC46x is a high efficiency synchronous buck regulator family capable of delivering up to 10 A continuous current. The device has programmable switching frequency of 100 kHz to 2 MHz. The control scheme is based on voltage mode constant on time. It delivers fast transient response and minimizes external components. Thanks to the internal current ramp information, no high ESR output bulk or virtual ESR network is required for the loop stability. This device also incorporates a power saving feature by enabling diode emulation mode and frequency fold back as the load decreases. • Power good open drain output • This device is available in MLP55-27L package to deliver high power density and minimize PCB area Power Stage SiC46x integrates a high performance power stage with a n-channel high side MOSFET and a n-channel low side MOSFET optimized to achieve up to 98 % efficiency. The power input voltage (VIN) can go up to 60 V and down as low as 4.5 V for power conversion. SiC46x has a full set of protection and monitoring features: • Over current protection in pulse-by-pulse mode • Output overvoltage protection • Output undervoltage protection with device going into hiccup mode • Over temperature protection with hysteresis S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 6 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Control Scheme SiC46x employs a voltage - mode COT control mechanism in conjunction with adaptive zero current detection which allows for power saving in discontinuous conduction mode (DCM). The switching frequency, fSW, is set by an external resistor Rfsw connected from fsw pin to ground. The SiC46x operates between 200 kHz to 2 MHz depending on VIN and VOUT conditions. V OUT R fsw = --------------------------------------------12 f sw × 190 × 10 Note, that there is no VIN dependency on fSW as long as VIN and VCIN are connected to the same supply. SiC46x employs an advanced voltage - mode COT control mechanism. During steady-state operation, feedback voltage (VFB) is compared with internal reference (0.8 V typ.) and the amplified error signal (VCOMP) is generated at the internal comp node. An internally generated ramp signal and VCOMP feed into a comparator. Once VRAMP crosses VCOMP, an on-time pulse is generated for a fixed time. During the on-time pulse, the high side MOSFET will be turned on. Once the on-time pulse expires, the low side MOSFET will be turned on after a dead time period. The low side MOSFET will stay on for a minimum duration equal to the minimum off-time (tOFF_MIN.) and remains on until VRAMP crosses VCOMP. The cycle is then repeated. Fig. 5 illustrates the operation as described above. Vishay Siliconix Power-Save Mode and Mode Pin Operation To improve efficiency at light-loads, SiC46x provides a set of innovative implementations to eliminate LS re-circulating current and switching losses. The internal zero crossing detector (ZCD) monitors SW node voltage to determine when inductor current starts to flow negatively. In power saving mode, as soon as inductor valley current crosses zero, the device first deploys diode emulation mode by turning off the LS FET. If load further decreases, switching frequency is reduced proportional to the load condition to save switching losses while keeping output ripple within tolerance. To improve the converter efficiency, the user can choose to disable the internal VDRV regulator by picking either mode 3 or mode 4 and connecting a 5 V supply to the VDRV pin. This reduces power dissipation in the SiC46x by eliminating the VDRV linear regulator losses. The mode pin supports several modes of operation as shown in table 1. An internal current source is used to set the voltage on this pin using an external resistor: TABLE 1 - OPERATION MODES MODE RANGE (kΩ) 1 2 3 4 0 to 100 298 to 304 494 to 504 900 to 1100 POWER SAVE MODE Enabled Disabled Disabled Enabled INTERNAL VDRV REGULATOR ON ON OFF (1) OFF (1) Note (1) Connect a 5 V (± 5 %) supply to the V DRV pin VRAMP The mode pin is not latched to any state and can be changed on the fly. VCOMP PWM Fixed on-time Fig. 5 - Operational Principle S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 7 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix OUTPUT MONITORING AND PROTECTION FEATURES Output Over-Current Protection (OCP) Sequencing of Input / Output Supplies SiC46x has cycle by cycle current limiting. The inductor valley current is monitored during LS FET turn-on period through RDS(on) sensing. After a pre-defined blanking time, the valley current is compared with an internal threshold. If monitored current is higher than threshold, high side MOSFET is kept off until the inductor current falls below OCP threshold. SiC46x has no sequencing requirements on any of its input / output (VIN, VDRV, VDD, VCIN, EN) supplies or enables. The SiC46x has an enable pin to turn the part on and off. Driving this pin high enables the device, while grounding it turns it off. OCP is enabled immediately after VDD passes UVLO rising threshold. The SiC46x enable has a weak pull down to prevent unwanted turn on due to a floating GPIO. There are 3 settings for the valley current OCP namely 50 %, 75 % and 100 %. The selection can be chosen by connecting the ILIMIT pin either to VDD, float or GND. Connecting to VDD will select 100 % of the preset valley current OCP corresponding to the SiC46x being used. If the pin is floating, the valley current OCP is 75 %. Connecting to GND, the valley current OCP is 50 %. There are no sequencing requirements with respect to other input / output supplies. OCPthreshold Iload Iinductor GH Fig. 6 - Over-Current Protection Illustration Enable Soft-Start During soft start time period, inrush current is limited and the output voltage is ramped gradually. The following control scheme is implemented: Once the VDD voltage reaches the UVLO trip point, an internal “Soft start Reference” (SR) begins to ramp up. The SR ramp rate is determined by the external soft start capacitor. There is an internal 5 μA current source tied to the soft start pin which charges the external soft start cap. The internal SR signal is being used as a reference voltage to the loop error amplifier (see functional block diagram). The control scheme guarantees that the output voltage during the soft start interval will ramp up coincidently with the SR signal. voltage. The speed of the internal soft start ramp can SiC46x soft-start time is adjustable by selecting a capacitor value from the following equation. Output Undervoltage Protection (UVP) UVP is implemented by monitoring output through VFB pin. If the voltage level at VFB goes below 0.16 V (VOUT is 20 % of VOUT set point) for more than 25 μs a UVP event is recognized and both HS and LS MOSFETs are turned off. After a time-out period equal to 20 soft start cycles, the IC attempts to re-start by going through a soft start cycle. If the fault condition still exists, the above cycle will be repeated. UVP is only active after the completion of soft-start sequence. Output Over Voltage Protection (OVP) For OVP implementation, output is monitored through FB pin. After soft start, if the voltage level at FB is above 0.96 V (typ.) (VOUT is 120 % of VOUT set point), OVP is triggered with both the HS and LS MOSFETs turned off. Normal operation is resumed once FB voltage drops back to 0.96 V. OVP is active immediately after VDD passes UVLO level. C ext x 0.8 V SS time = -------------------------------5 μA During soft-start period, OCP is activated. Short circuit protection is not active until soft-start is complete. Pre-Bias Start-Up In case of pre-bias startup, if the sensed voltage on FB is higher than the internal soft-start ramp value, control logic prevents HS and LS FET from switching to avoid negative output voltage spike and excessive current sinking through LS FET. Over Temperature Protection (OTP) SiC46x has internal thermal monitor block that turns off both HS and LS FETs when junction temperature is above 150 °C (typ). A hysteresis of 35 °C is implemented, so when junction temperature drops below 115 °C, the device restarts by initiating soft-start sequence again. In order to improve the efficiency at light load condition, OTP is disabled when the inductor current is discontinued. S21-1151-Rev. H, 06-Dec-2021 Fig. 7 - Pre-Bias Start-Up Document Number: 76044 8 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix Power Good SiC46x’s power good is an open-drain output. Pull PGOOD pin high up to 5 V through a 10K resistor to use this signal. Power good window is shown in the Fig. 8. If voltage level on FB pin is out of this window, PG signal is de-asserted by pulling down to GND. To prevent false triggering during transient events, PGOOD has a 25 μs blanking time. VFB_Rising_Vth_OV (typ. = 0.96 V) VFB_Falling_Vth_OV (typ. = 0.91 V) Vref (0.8 V) VFB_Falling_Vth_UV VFB_Rising_Vth_UV (typ. = 0.72 V) (typ. = 0.77 V) VFB Pull-high PG Pull-low Fig. 8 - PGOOD Window and Timing Diagram SiC46x microBUCK FAMILY SCHEMATIC EN R_EN_H R_EN_L Heading 0.1μF 28 AGND-PAD 30 PGND-PAD 9 PGND1 4.7μF 19 AGND Rmode Cdd 2K 1μF 25 R_fsw 23 VFB 22 20 VOUT SW 2 SW 3 14 SW 1 VDRV Cdrv Css 33nF 52.3K NC 12 GL 15 16 17 PGND 47μF Analog ground (AGND), and power ground (PGND) are tied internally in the SiC46x VDD 26 FSW 24 SiC466 SiC467 SiC468 SiC469 10 PGND2 11 PGND3 Cin Mode 27 ILIMIT 13 Cin_D 102K SS NC PGOOD 2 R_PGD 7 VIN1 8 VIN2 0.1μF PG NC 18 4 BOOT 3.3 5 PHASE 1 PHASE 2 EN 1 VCIN 29 VIN-PAD +Vin 6V to 60V 6 3 Notes in small black text near component values refer to Vishay SiC46x spreadsheet calcualtor references C_boot DNP R_boot 560K R_FB_L 10K 21 AGND 52.3K R_FB_H +VOUT= 5 V L 0.1μF 64 μF Cout_D Cout_C 64 μF Cout_B PGND Fig. 9 - SiC467 Configured for 6 V to 60 V Input, 5 V Output at 6 A, 500 kHz Operation with Power Save Mode Enabled all Ceramic Output Capacitance Design S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 9 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix EXTERNAL COMPONENT SELECTION FOR THE SiC46x This section explains external component selection for the SiC46x family of regulators. Component reference designators in any equation refer to the schematic shown in Fig. 9. The online simulation tool PowerCAD helps to make external component calculation simple. The user simply needs to enter required operating conditions. Output Voltage Adjustment If a different output voltage is needed, simply change the value of VOUT and solve for R_FB_H based on the following formula: R _FB_L ( V OUT - V FB ) R _FB_H = ---------------------------------------------------V FB Where VFB is 0.8 V for the SiC46x. R_FB_L should be a maximum of 10 kΩ to prevent VOUT from drifting at no load. Switching Frequency Selection The following equation illustrates the relationship between on-time, VIN, VOUT, and Rfsw value: V OUT R _fsw = -------------------------------------------– 12 f sw × 190 × 10 Inductor Selection The choice of inductor is specific to each application and quickly determined with the following equations: V OUT t ON = -----------------------------------V IN_max. x f sw and ( V IN - V OUT ) x t ON L = -------------------------------------------------I OUT_MAX. x K Where K is a percentage of maximum output current ripple required. The designer can quickly make a choice of inductor if the ripple percentage is decided, usually no more than 30 % however higher or lower percentages of IOUT can be acceptable depending on application. This device allows choices larger than 30 %. Other than the inductance the DCR and saturation current parameters are key values. The DCR causes an I2R loss which will decrease the system efficiency and generate heat. The saturation current has to be higher than the maximum output current plus ½ of the ripple current. In an over current condition the inductor current may be very high. All this needs to be considered when selecting the inductor. Output Capacitor Selection The SiC46x is stable with any type of output capacitors by choosing the appropriate VRAMP components. This allows the user to choose the output capacitance based on the best trade off of board space, cost and application requirements. The output capacitors are chosen based upon required ESR and capacitance. The maximum ESR requirement is controlled by the output ripple voltage requirement and the DC tolerance. The output voltage has a DC value that is equal to the valley of the output ripple plus half of the peak-to-peak ripple. A change in the output ripple voltage will lead to a change in DC voltage at the output. The relationship between output voltage ripple, output capacitance and ESR of the output capacitor is shown by the following equation: 1  V RIPPLE = I RIPPLE ( MAX. ) x  ------------------------------- 8 x C x f - + ESR o (1) sw Where VRIPPLE is the maximum allowed output ripple voltage; IRIPPLE(MAX.) is the maximum inductor ripple current; fsw is the switching frequency of the converter; Co is the total output capacitance; ESR is the equivalent series resistance of the total output capacitors. In addition to the output ripple voltage requirement, the output capacitors need to meet transient requirements. A worst case load release condition (from maximum load to no load at the exact moment when inductor current is at the peak) determines the required capacitance. If the load release is instantaneous (load changes from maximum to zero within 1 μs), the output capacitor must absorb all the energy stored in the inductor. The peak voltage on the capacitor, VPK, under this worst case condition can be calculated by following equation: C OUT_MIN. 2 1 L x  I OUT + --- x I RIPPLE(MAX.)   2 = -------------------------------------------------------------------------------2 2 ( V PK ) - ( V OUT ) (2) During the load release time, the voltage across the inductor is approximately -VOUT. This causes a down-slope or falling di/dt in the inductor. If the load di/dt is not much faster than the di/dt of the inductor, then the inductor current will tend to track the falling load current. This will reduce the excess inductive energy that must be absorbed by the output capacitor; therefore a smaller capacitance can be used. The following can be used to calculate the required capacitance for a given diLOAD/dt. Peak inductor current, ILPK, is shown by the next equation: 1 I LPK = I MAX. + --- x I RIPPLE(MAX.) 2 di LOAD The slew rate of load current = ------------------dt S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 10 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com C OUT_MIN. = I LPK I LPK I MAX. L x -------------- - ------------------- x dt V OUT dI LOAD x --------------------------------------------------------------2 ( V PK - V OUT ) Vishay Siliconix (3) Based on application requirement, either equation (2) or equation (3) can be used to calculate the ideal output capacitance to meet transition requirement. Compare this calculated capacitance with the result from equation (1) and choose the larger value to meet both ripple and transition requirement. Enable Pin Voltage The EN pin has an internal pull down resistor and only requires an enable voltage. This needs to be greater than 1.4 V. An input voltage or a resistor connected across VIN and EN can be used. The internal pull down resistance is 5 MΩ. Input Capacitance In order to determine the minimum capacitance the input voltage ripple needs to be specified; VCINPKPK ≤ 500 mV is a suitable starting point. This magnitude is determined by the final application specification. The input current needs to be determined for the lowest operating input voltage, I CIN ( RMS ) = I OUT x 2 V OUT 1 2 D x ( 1 – D ) + ------ ×  ------------------------------------- × ( 1 – D ) × D 12  L × ƒ sw × I OUT The minimum input capacitance can then be found, D x (1 - D) C IN_min. = I OUT x ----------------------------------------V CINPKPK x f sw If high ESR capacitors are used, it is good practice to also add low ESR ceramic capacitance. A 4.7 μF ceramic input capacitance is a suitable starting point. Care must be taken to account for voltage derating of the capacitance when choosing an all ceramic input capacitance. S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 11 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC466 (10 A), unless otherwise noted) Axis Title Axis Title 100 100 10000 VIN = 12 V, L = 3.3 µH 98 97 94 1000 1st line 2nd line 92 VIN = 24 V, L = 4.7 µH 90 VIN = 36 V, L = 4.7 µH 88 100 86 84 91 1000 88 85 VIN = 24 V, L = 4.7 µH 82 79 VIN = 48 V, L = 4.7 µH 73 10 80 0 1 2 3 4 5 6 7 8 9 10 70 0.01 10 0.1 IOUT - Output Current (A) Fig. 10 - SiC466 Efficiency vs. Output Current, VOUT = 5 V Fig. 13 - SiC466 Efficiency vs. Output Current - Light Load, VOUT = 5 V Axis Title Axis Title 100 97 96 94 94 1000 VIN = 24 V, L = 6.8 µH 92 VIN = 36 V, L = 8.2 µH 90 88 VIN = 48 V, L = 10 µH 100 86 2nd line eff - Efficiency (%) 98 84 10000 VIN = 24 V, L = 6.8 µH 91 1000 88 VIN = 36 V, L = 8.2 µH 85 1st line 2nd line 10000 1st line 2nd line 2nd line eff - Efficiency (%) 1 IOUT - Output Current (A) 100 VIN = 48 V, L = 10 µH 82 100 79 76 82 73 10 80 0 1 2 3 4 5 6 7 8 9 10 70 0.01 10 0.1 1 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 11 - SiC466 Efficiency vs. Output Current, VOUT = 12 V Fig. 14 - SiC466 Efficiency vs. Output Current - Light Load, VOUT = 12 V Axis Title Axis Title 100 10000 100 10000 90 1000 1st line 2nd line 70 60 50 100 40 30 80 1000 70 1st line 2nd line 80 2nd line TC - Case Temperature (°C) 90 2nd line TC - Case Temperature (°C) 100 VIN = 36 V, L = 4.7 µH 76 VIN = 48 V, L = 4.7 µH 82 1st line 2nd line 94 2nd line eff - Efficiency (%) 96 2nd line eff - Efficiency (%) 10000 VIN = 12 V, L = 3.3 µH 60 50 100 40 30 10 20 0 1 2 3 4 5 6 7 8 9 10 10 20 0 1 2 3 4 5 6 7 8 9 10 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 12 - SiC466 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 5 V Fig. 15 - SiC466 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 12 V S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 12 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC467 (6 A), unless otherwise noted) Axis Title Axis Title 100 100 10000 VIN = 12 V, L = 5.6 µH 98 97 94 1000 1st line 2nd line 92 VIN = 24 V, L = 6.8 µH 90 VIN = 36 V, L = 8.2 µH 88 100 86 84 91 1000 88 85 VIN = 24 V, L = 6.8 µH 82 100 79 VIN = 36 V, L = 8.2 µH 76 VIN = 48 V, L = 8.2 µH 82 VIN = 48 V, L = 8.2 µH 73 10 80 0 1 2 3 4 5 10 70 0.01 6 0.1 IOUT - Output Current (A) Fig. 16 - SiC467 Efficiency vs. Output Current, VOUT = 5 V Fig. 19 - SiC467 Efficiency vs. Output Current - Light Load, VOUT = 5 V Axis Title Axis Title 100 10000 98 10000 VIN = 24 V, L = 10 µH 97 94 1000 92 1st line 2nd line VIN = 36 V, L = 15 µH 90 VIN = 48 V, L = 15 µH 88 100 86 84 91 1000 88 VIN = 36 V, L = 15 µH 1st line 2nd line VIN = 24 V, L = 10 µH 94 2nd line eff - Efficiency (%) 96 2nd line eff - Efficiency (%) 1 IOUT - Output Current (A) 100 85 VIN = 48 V, L = 15 µH 82 100 79 76 82 73 10 80 0 1 2 3 4 5 10 70 0.01 6 0.1 1 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 17 - SiC467 Efficiency vs. Output Current, VOUT = 12 V Fig. 20 - SiC467 Efficiency vs. Output Current - Light Load, VOUT = 12 V Axis Title Axis Title 10000 100 10000 100 90 1000 1st line 2nd line 70 60 50 100 40 30 80 1000 70 1st line 2nd line 80 2nd line TC - Case Temperature (°C) 90 2nd line TC - Case Temperature (°C) 1st line 2nd line 94 2nd line eff - Efficiency (%) 96 2nd line eff - Efficiency (%) 10000 VIN = 12 V, L = 5.6 µH 60 50 100 40 30 10 20 0 1 2 3 4 5 6 10 20 0 1 2 3 4 5 6 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 18 - SiC467 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 5 V Fig. 21 - SiC467 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 12 V S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 13 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC468 (4 A), unless otherwise noted) Axis Title Axis Title 100 100 10000 VIN = 12 V, L = 10 µH 98 97 VIN = 24 V, L = 15 µH 94 1000 1st line 2nd line 92 VIN = 24 V, L = 15 µH 90 VIN = 36 V, L = 15 µH 88 100 86 84 91 1000 88 85 VIN = 36 V, L = 15 µH 82 79 73 10 80 0 1 2 3 10 70 0.01 4 0.1 1 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 22 - SiC468 Efficiency vs. Output Current, VOUT = 5 V Fig. 25 - SiC468 Efficiency vs. Output Current - Light Load, VOUT = 5 V Axis Title Axis Title 100 10000 97 96 94 94 VIN = 24 V, L = 15 µH 1000 1st line 2nd line 92 VIN = 36 V, L = 22 µH 90 VIN = 48 V, L = 22 µH 88 100 86 2nd line eff - Efficiency (%) 98 84 10000 VIN = 24 V, L = 15 µH 91 1000 VIN = 36 V, L = 22 µH 88 85 1st line 2nd line 100 2nd line eff - Efficiency (%) 100 VIN = 48 V, L = 15 µH 76 VIN = 48 V, L = 15 µH 82 VIN = 48 V, L = 22 µH 82 100 79 76 82 73 10 80 0 1 2 3 10 70 0.01 4 0.1 1 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 23 - SiC468 Efficiency vs. Output Current, VOUT = 12 V Fig. 26 - SiC468 Efficiency vs. Output Current - Light Load, VOUT = 12 V Axis Title Axis Title 10000 100 10000 100 90 1000 1st line 2nd line 70 60 50 100 40 80 1000 70 1st line 2nd line 80 2nd line TC - Case Temperature (°C) 90 2nd line TC - Case Temperature (°C) 1st line 2nd line 94 2nd line eff - Efficiency (%) 96 2nd line eff - Efficiency (%) 10000 VIN = 12 V, L = 10 µH 60 50 100 40 30 30 10 20 0 1 2 3 4 10 20 0 1 2 3 4 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 24 - SiC468 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 5 V Fig. 27 - SiC468 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 12 V S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 14 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC469 (2 A), unless otherwise noted) Axis Title Axis Title 100 100 10000 VIN = 12 V, L = 10 µH 98 97 94 1000 90 1st line 2nd line 92 VIN = 24 V, L = 15 µH 88 VIN = 36 V, L = 15 µH 86 100 VIN = 48 V, L = 15 µH 84 91 1000 88 85 VIN = 24 V, L = 15 µH 82 VIN = 36 V, L = 15 µH 79 73 10 80 0 1 70 0.01 2 1 IOUT - Output Current (A) Fig. 28 - SiC469 Efficiency vs. Output Current, VOUT = 5 V Fig. 31 - SiC469 Efficiency vs. Output Current - Light Load, VOUT = 5 V Axis Title Axis Title 100 97 96 94 94 1000 VIN = 24 V, L = 15 µH 92 VIN = 36 V, L = 22 µH 90 88 VIN = 48 V, L = 22 µH 100 86 2nd line eff - Efficiency (%) 98 84 10000 VIN = 24 V, L = 15 µH 91 1000 88 VIN = 36 V, L = 22 µH 1st line 2nd line 10000 1st line 2nd line 2nd line eff - Efficiency (%) 10 0.1 IOUT - Output Current (A) 100 85 VIN = 48 V, L = 22 µH 82 100 79 76 82 73 10 80 0 1 70 0.01 2 10 0.1 1 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 29 - SiC469 Efficiency vs. Output Current, VOUT = 12 V Fig. 32 - SiC469 Efficiency vs. Output Current - Light Load, VOUT = 12 V Axis Title Axis Title 10000 100 10000 100 90 1000 1st line 2nd line 70 60 50 100 40 30 80 1000 70 1st line 2nd line 80 2nd line TC - Case Temperature (°C) 90 2nd line TC - Case Temperature (°C) 100 VIN = 48 V, L = 15 µH 76 82 1st line 2nd line 94 2nd line eff - Efficiency (%) 96 2nd line eff - Efficiency (%) 10000 VIN = 12 V, L = 10 µH 60 50 100 40 30 10 20 0 1 2 10 20 0 1 2 IOUT - Output Current (A) IOUT - Output Current (A) Fig. 30 - SiC469 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 5 V Fig. 33 - SiC469 Load Current vs. Case Temperature, VIN = 48 V, VOUT = 12 V S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 15 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC467 (6 A), unless otherwise noted) Axis Title Axis Title 1.04 10000 1.04 10000 1.03 1.03 1.00 0.99 100 0.98 1.01 1000 1.00 1st line 2nd line 1.01 2nd line Normalized Efficiency 1000 1st line 2nd line 2nd line Normalized Efficiency 1.02 1.02 0.99 0.98 0.97 100 0.96 0.95 0.97 0.94 10 0.96 0 0.93 0 100 200 300 400 500 600 700 800 900 200 400 1000 10 1200 fsw - Switching Frequency (kHz) Fig. 34 - SiC466 Efficiency vs. Switching Frequency Fig. 37 - SiC467 Efficiency vs. Switching Frequency Axis Title 1.04 1.04 1.03 1.03 4000 10000 1.02 0.99 200 0.98 0.97 0.96 1.01 1000 1.00 1st line 2nd line 1.00 1st line 2nd line 1.01 2nd line Normalized Efficiency 1.02 2nd line Normalized Efficiency 800 fsw - Switching Frequency (kHz) Axis Title 0.99 0.98 100 0.97 0.96 0.95 0.95 0.94 0 200 400 600 800 1000 10 1200 0.94 0 200 400 600 800 1000 10 1200 fsw - Switching Frequency (kHz) fsw - Switching Frequency (kHz) Fig. 35 - SiC468 Efficiency vs. Switching Frequency Fig. 38 - SiC469 Efficiency vs. Switching Frequency Axis Title Axis Title 2.00 10000 10000 808 1.80 1000 1.20 1.00 0.80 100 0.60 0.40 0.20 10 0 -60 -40 -20 0 20 40 60 80 100 120 140 804 1000 802 1st line 2nd line 1.40 2nd line VFB - Voltage Reference (mV) 806 1.60 1st line 2nd line 2nd line RDS(on) - Normalized On-State Resistance 600 800 798 100 796 794 10 792 -60 -40 -20 0 20 40 60 80 100 120 140 T - Temperature (°C) T - Temperature (°C) Fig. 36 - RDS(ON) vs. Temperature Fig. 39 - Voltage Reference vs. Temperature S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 16 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC467 (6 A), unless otherwise noted) Axis Title Axis Title 10000 0.8 0.6 1000 1st line 2nd line 0.2 0 -0.2 100 -0.4 0.4 1000 0.2 1st line 2nd line 0.4 2nd line Load Regulation (%) 0.6 2nd line Line Regulation (%) 10000 0.8 0 -0.2 100 -0.4 -0.6 -0.6 10 -0.8 0 6 12 18 24 30 36 42 48 54 10 -0.8 0 60 1 2 Fig. 40 - Line Regulation Fig. 43 - Load Regulation 5 4 3 100 2 1 10 0 18 24 30 36 42 48 54 10000 8 7 6 1000 5 1st line 2nd line 1000 2nd line IVCIN_SHDN + IVIN_SHDN - Shutdown Current (µA) 6 1st line 2nd line 2nd line IVCIN_SHDN + IVIN_SHDN - Shutdown Current (µA) 7 12 6 Axis Title 10000 4 3 100 2 1 10 0 60 -60 -40 -20 0 20 40 60 80 100 120 140 VCIN / VIN - Input Voltage (V) T - Temperature (°C) Fig. 41 - Shutdown Current vs. Input Voltage Fig. 44 - Shutdown Current vs. Junction Temperature Axis Title Axis Title 190 10000 10000 220 180 1000 150 140 130 100 120 110 100 10 90 0 6 12 18 24 30 36 42 48 54 60 180 1000 160 1st line 2nd line 160 2nd line IVCIN + IVIN - Input Current (µA) 200 170 1st line 2nd line 2nd line IVCIN + IVIN - Input Current (µA) 5 IOUT - Output Current (A) Axis Title 6 4 VIN - Input Voltage (V) 8 0 3 140 120 100 100 80 10 60 -60 -40 -20 0 20 40 60 80 100 120 140 VCIN / VIN - Input Voltage (V) T - Temperature (°C) Fig. 42 - Input Current vs. Input Voltage Fig. 45 - Input Current vs. Junction Temperature S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 17 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC467 (6 A), unless otherwise noted) Axis Title Axis Title 10000 2.4 1.2 10000 VEN = 5.0 V 1000 VIH_EN 1.5 1.2 VIL_EN 0.9 100 1.0 0.8 0.7 0.6 0.6 0.3 0.5 10 0 -60 -40 -20 0 20 40 60 80 100 120 140 1000 0.9 1st line 2nd line 1.8 2nd line EN Current, IEN (µA) 1.1 1st line 2nd line 2nd line VEN - EN Logic Threshold (V) 2.1 100 10 0.4 -60 -40 -20 0 20 40 60 80 100 120 140 T - Temperature (°C) T - Temperature (°C) Fig. 46 - EN Logic Threshold vs. Junction Temperature Fig. 49 - EN Current vs. Junction Temperature Fig. 47 - Load Transient (3 A to 6 A), Time = 100 μs/div Fig. 50 - Line Transient (8 V to 48 V), Time = 10 ms/div Fig. 48 - Start-Up with EN, Time = 1 ms/div Fig. 51 - Start-up with VIN, Time = 5 ms/div S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 18 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix ELECTRICAL CHARACTERISTICS (VIN = 48 V, VOUT = 5 V, fsw = 300 kHz, SiC467 (6 A), unless otherwise noted) Fig. 52 - Output Ripple 2 A, Time = 5 μs/div Fig. 54 - Output Ripple 300 mA, Time = 5 μs/div Fig. 53 - Output Ripple PSM, Time = 10 ms/div S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 19 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix PCB LAYOUT RECOMMENDATIONS Step 1: VIN/GND Planes and Decoupling Step 3: VSWH Plane Snubber VIN plane PGND plane VSWH PGND plane Fig. 57 VSWH 1. Connect output inductor to SiC46x with large plane to lower the resistance Fig. 55 1. Layout VIN and PGND planes as shown above 2. Ceramic capacitors should be placed between VIN and PGND, and very close to the device for best decoupling effect 2. If any snubber network is required, place the components on the bottom side as shown above Step 4: VDD/VDRV Input Filter 3. Different values / packages of ceramic capacitors should be used to cover entire decoupling spectrum e.g. 1210 and 0603 4. Smaller capacitance values, placed closer to device’s VIN pin(s), is better for high frequency noise absorbing AGND Step 2: VCIN Pin VCIN decouple cap P G N D AGND plane Fig. 58 Fig. 56 1. VCIN (pin 1) is the input pin for both internal LDO and tON block. tON time varies based on input voltage. It is necessary to put a decoupling capacitor close to this pin 1. CVDD cap should be placed between pin 26 and pin 23 (the AGND of driver IC) to achieve best noise filtering 2. CVDRV cap should be placed close to VDRV (pin 16) and PGND (pin 17) to reduce effects of trace impedance and provide maximum instantaneous driver current for low side MOSFET during switching cycle 2. The connection can be made through a via and the cap can be placed at bottom layer S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 20 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Step 5: BOOT Resistor and Capacitor Placement Vishay Siliconix Step 6: Signal Routing AGND plane PGND V o u t s i g n a l Fig. 60 Fig. 59 1. These components need to be placed very close to SiC46x, right between PHASE (pin 5, 6) and BOOT (pin 4) 2. In order to reduce parasitic inductance, it is recommended to use 0402 chip size for the resistor and the capacitor 1. Separate the small analog signal from high current path. As shown above, the high current paths with high dv/dt, di/dt are placed on the left side of the IC, while the small control signals are placed on the right side of the IC. All the components for small analog signal should be placed closer to IC with minimum trace length 2. Pin 23 is the IC analog ground, which should have a single connection to power ground. The AGND ground plane connected with pin 23 helps keep AGND quiet and improve noise immunity 3. Feedback signal can be routed through inner layer. Make sure this signal is far away from VSWH node and shielded by inner ground layer S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 21 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Step 7: Adding Thermal Relief Vias and Duplicate Power Path Plane Vishay Siliconix Step 8: Ground Layer AGND plane VIN plane PGND plane PGND plane VSWH Fig. 61 Fig. 62 1. Thermal relief vias can be added on the VIN and PGND pads to utilize inner layers for high current and thermal dissipation 1. It is recommended to make the entire inner layer (next to top layer) ground plane 2. To achieve better thermal performance, additional vias can be put on VIN and PGND plane. Also, it is necessary to duplicate the VIN and ground planes at bottom layer to maximize the power dissipation capability from PCB. 2. This ground plane provides shielding between noise source on top layer and signal trace within inner layer. 3. The ground plane can be broken into two sections as PGND and AGND 3. VSWH pad is a noise source and not recommended to put vias on this pad. 4. 8 mil drill for pads and 10 mils drill for plane are optional via sizes. The vias on pads may drain solder during assembly and cause assembly issues. Please consult with the assembly house for guidelines S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 22 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiC466, SiC467, SiC468, SiC469 www.vishay.com Vishay Siliconix PRODUCT SUMMARY Part number Description SiC466 SiC467 SiC468 SiC469 10 A, 4.5 V to 60 V input, 6 A, 4.5 V to 60 V input, 2 A, 4.5 V to 60 V input, 4 A, 4.5 V to 60 V input, 100 kHz to 2 MHz, 100 kHz to 2 MHz, 100 kHz to 2 MHz, 100 kHz to 2 MHz, synchronous microBUCK synchronous microBUCK synchronous microBUCK synchronous microBUCK regulator regulator regulator regulator Input voltage min. (V) 4.5 4.5 4.5 Input voltage max. (V) 60 60 60 60 Output voltage min. (V) 0.8 0.8 0.8 0.8 Output voltage max. (V) 15 15 15 15 Continuous current (A) 10 6 4 2 Switch frequency min. (kHz) 100 100 100 100 Switch frequency max. (kHz) 2000 2000 2000 2000 Pre-bias operation (yes / no) Yes Yes Yes Yes Internal bias reg. (yes / no) 4.5 Yes Yes Yes Yes Internal Internal Internal Internal Enable (yes / no) Yes Yes Yes Yes PGOOD (yes / no) Yes Yes Yes Yes Overcurrent protection Yes Yes Yes Yes Protection OVP, OCP, UVP/SCP, OTP, UVLO OVP, OCP, UVP/SCP, OTP, UVLO OVP, OCP, UVP/SCP, OTP, UVLO OVP, OCP, UVP/SCP, OTP, UVLO Light load mode Selectable powersave Selectable powersave Selectable powersave Selectable powersave 97 98 98 98 PowerPAK MLP55-27L PowerPAK MLP55-27L PowerPAK MLP55-27L PowerPAK MLP55-27L 5 x 5 x 0.75 Compensation Peak efficiency (%) Package type Package size (W, L, H) (mm) 5 x 5 x 0.75 5 x 5 x 0.75 5 x 5 x 0.75 Status code 1 1 1 1 Product type microBUCK (step down regulator) microBUCK (step down regulator) microBUCK (step down regulator) microBUCK (step down regulator) Applications Computing, consumer, industrial, healthcare, networking Computing, consumer, industrial, healthcare, networking Computing, consumer, industrial, healthcare, networking Computing, consumer, industrial, healthcare, networking Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?76044. S21-1151-Rev. H, 06-Dec-2021 Document Number: 76044 23 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. © 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED Revision: 09-Jul-2021 1 Document Number: 91000