SiP32413, SiP32414, SiP32416
www.vishay.com
Vishay Siliconix
Dual 2 A, 1.2 V, Slew Rate Controlled Load Switch
DESCRIPTION
FEATURES
SiP32413, SiP32414, and SiP32416 are slew rate controlled
load switches that is designed for 1.1 V to 5.5 V operation.
• 1.1 V to 5.5 V operation voltage range
The devices guarantee low switch on-resistance at 1.2 V
input. SiP32413 and SiP32414 feature a controlled soft-on
slew rate of typical 150 μs that limits the inrush current for
designs of capacitive load or noise sensitive loads.
SiP32416 features a longer slew rate of typical 2.5 ms to
keep the peak of the inrush current even lower.
• Low RON down to 1.2 V
• 62 m typical from 2 V to 5 V
• Slew rate controlled turn-on:
150 μs at 3.6 V for SiP32413, SiP32414
2.5 ms at 3.6 V for SiP32416
Available
• Fast shutdown load discharge for SiP32414 and SiP32416
The devices feature a low voltage control logic interface
(on/off interface) that can interface with low voltage digital
control without extra level shifting circuit. The SiP32414 and
SiP32416 also integrate output discharge switches that
enable fast shutdown load discharge. When the switches
are off, they provide the reverse blocking to prevent high
current flowing into the power source.
• Low quiescent current
< 1 μA when disabled
6.7 μA at VIN = 1.2 V
All SiP32413, SiP32414, and SiP32416 are available in
TDFN8 2.0 mm x 2.0 mm package. Each switch in each
device can support over 2 A of continuous current.
APPLICATIONS
• Switch off reversed blocking
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
• Cellular phones
• Portable media players
• Digital camera
• GPS
• Computers
• Portable instruments and healthcare devices
TYPICAL APPLICATION CIRCUIT
VIN
IN
OUT
VOUT
SiP32413, SiP32414, SiP32416
(for one switch)
C IN
4.7 µF
C OUT
0.1 µF
CNTRL
GND
CNTRL
GND
GND
Fig. 1 - SiP32413, SiP32414, SiP32416 Typical Application Circuit
ORDERING INFORMATION
TEMPERATURE RANGE
-40 °C to 85 °C
PACKAGE
TDFN8 2.0 mm x 2.0 mm
MARKING
PART NUMBER
AA
SiP32413DNP-T1-GE4
AB
SiP32414DNP-T1-GE4
AG
SiP32416DNP-T1-GE4
Note
• -GE4 denotes halogen-free and RoHS-compliant
S20-0532-Rev. C, 06-Jul-2020
Document Number: 71437
1
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SiP32413, SiP32414, SiP32416
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Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
PARAMETER
LIMIT
Supply input voltage (VIN)
UNIT
-0.3 to 6
Enable input voltage (VEN)
-0.3 to 6
Output voltage (VOUT)
-0.3 to 6
Maximum continuous switch current (Imax.)
V
2.4
Maximum pulsed current (pulsed at 1 ms, 10 % duty cycle)
A
3
ESD rating (HBM)
4000
V
Storage temperature (Tstg)
-65 to +150
°C
Thermal tesistance (JA) a
95
°C/W
Power dissipation (PD) a
580
mW
Notes
a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout
b. Derate 10.5 mW/°C above TA = 70 °C, see PCB layout
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
PARAMETER
Input voltage range (VIN)
Operating junction temperature range (TJ)
LIMIT
UNIT
1.1 to 5.5
V
-40 to +125
°C
SPECIFICATIONS
PARAMETER
Operating voltage c
Quiescent current
SYMBOL
TEST CONDITIONS UNLESS SPECIFIED
VIN = 5 V, TA = -40 °C to 85 °C
(typical values are at TA = 25 °C)
MIN. a
TYP. b
MAX. a
UNIT
1.1
-
5.5
V
VIN = 1.2 V, CNTRL = active
-
6.7
14
VIN = 1.8 V, CNTRL = active
-
14
24
VIN = 2.5 V, CNTRL = active
-
25
40
VIN = 3.6 V, CNTRL = active
-
40
60
VIN = 4.3 V, CNTRL = active
-
52
75
VIN = 5 V, CNTRL = active
-
71
99
VIN
IQ
LIMITS
-40 °C to 85 °C
Off supply current
IQ(off)
CNTRL = inactive, OUT = open
-
-
1
Off switch current
IDS(off)
CNTRL = inactive, OUT = 0
-
-
1
IRB
VOUT = 5 V, VIN = 1.2 V, VEN = inactive
-
-
10
VIN = 1.2 V, IL = 100 mA, TA = 25 °C
-
66
76
VIN = 1.8 V, IL = 100 mA, TA = 25 °C
-
62
72
VIN = 2.5 V, IL = 100 mA, TA = 25 °C
-
62
72
VIN = 3.6 V, IL = 100 mA, TA = 25 °C
-
62
72
VIN = 4.3 V, IL = 100 mA, TA = 25 °C
-
62
72
VIN = 5 V, IL = 100 mA, TA = 25 °C
-
62
72
-
3900
-
VIN = 1.2 V
-
-
0.3
VIN = 1.8 V
-
-
0.4 d
VIN = 2.5 V
-
-
0.5 d
VIN = 3.6 V
-
-
0.6 d
VIN = 4.3 V
-
-
0.7 d
VIN = 5 V
-
-
0.8 d
Reverse blocking current
On-resistance
On-resistance temp. coefficient
CNTRL input low voltage c
S20-0532-Rev. C, 06-Jul-2020
RDS(on)
TCRDS
VIL
μA
m
ppm/°C
V
Document Number: 71437
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SiP32413, SiP32414, SiP32416
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SPECIFICATIONS
PARAMETER
LIMITS
-40 °C to 85 °C
TEST CONDITIONS UNLESS SPECIFIED
VIN = 5 V, TA = -40 °C to 85 °C
(typical values are at TA = 25 °C)
MIN. a
TYP. b
MAX. a
VIN = 1.2 V
0.9 d
-
-
VIN = 1.8 V
1.2 d
-
-
VIN = 2.5 V
1.4
d
-
-
VIN = 3.6 V
1.6 d
-
-
VIN = 4.3 V
1.7 d
-
-
VIN = 5 V
1.8
-
-
ISINK
VEN = 5.5 V
-
-
1
μA
Output pull-down resistance
RPD
CNTRL = inactive, TA = 25 °C
(for SiP32414 andSiP32416 only)
-
217
280
SiP32413, SiP32414
VIN = 3.6 V, RLOAD = 10 , CLOAD = 0,1 μF,
TA = 25 °C
-
140
210
80
150
220
-
0.27
1
SiP32416
VIN = 3.6 V, RLOAD = 10 , CLOAD = 0,1 μF,
TA = 25 °C
-
2
-
1.2
2.5
3.8
-
-
0.001
CNTRL input high voltage c
EN input leakage
SYMBOL
VIH
Output turn-on delay time
td(on)
Output turn-on rise time
t(on)
Output turn-off delay time
td(off)
Output turn-on delay time
td(on)
Output turn-on rise time
t(on)
Output turn-off delay time
td(off)
UNIT
V
μs
ms
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
c. For VIN outside this range consult typical EN threshold curve
d. Not tested, guarantee by design
PIN CONFIGURATION
OUT1 8
1
IN1
GND 7
2
CNTRL1
GND 6
3
CNTRL2
4
IN2
OUT2 5
Bottom View
Fig. 2 - TDFN8 2.0 mm x 2.0 mm
PIN DESCRIPTION
PIN NUMBER
1
NAME
IN1
FUNCTION
This is the input pin of the switch side 1
2
CNTRL1
This is the control pin of the switch side 1
3
CNTRL2
This is the control pin of the switch side 2
4
IN2
5
OUT2
This is the output pin of the switch side 2
6
GND
Ground connection
7
GND
Ground connection
8
OUT1
This is the output pin of the switch side 1
S20-0532-Rev. C, 06-Jul-2020
This is the input pin of the switch side 2
Document Number: 71437
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SiP32413, SiP32414, SiP32416
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TRUTH TABLE SiP32413
TRUTH TABLE SiP32414, SiP32416
CNTRL1
CNTRL2
SW1
SW2
CNTRL1
CNTRL2
SW1
SW2
0
0
On
Off
0
0
Off
Off
0
1
On
On
0
1
Off
On
1
0
Off
Off
1
0
On
Off
1
1
Off
On
1
1
On
On
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
100
0.7
SiP32413
0.6
IQ(off) - Off Supply Current (nA)
IQ - Quiescent Current (μA)
80
60
40
20
0.5
0.4
0.3
0.2
0.1
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
1.0
5.5
1.5
2.0
2.5
VIN (V)
3.5
4.0
4.5
5.0
5.5
VIN (V)
Fig. 3 - Quiescent Current vs. Input Voltage
Fig. 5 - SiP32413 Off Supply Current vs. VIN
90
1.4
80
VIN = 5 V
1.2
IQ(OFF) - Off Supply Current (nA)
IQ - Quiescent Current (μA)
3.0
70
60
50
VIN = 3.6 V
40
30
20
0
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Fig. 4 - Quiescent Current vs. Temperature
S20-0532-Rev. C, 06-Jul-2020
1.0
0.8
0.6
0.4
0.2
VIN = 1.2 V
10
SiP32414
SiP32416
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VIN (V)
Fig. 6 - SiP32414 and SiP32416 Off Supply Current vs. VIN
Document Number: 71437
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SiP32413, SiP32414, SiP32416
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
1.0
1000
0.8
100
IDS(on) - Off Switch Current (nA)
IDS(off) - Off Switch Current (nA)
0.9
0.7
0.6
0.5
0.4
0.3
0.2
10
VIN = 5 V
1
VIN = 3.6 V
0.1
0.01
VIN = 1.2 V
0.1
0
1.0
1.5
2.0
2.5
3.0 3.5
VIN (V)
4.0
4.5
5.0
5.5
0.001
- 40
- 20
0
20
40
Temperature (°C)
60
80
100
Fig. 10 - Off Switch Current vs. Temperature
Fig. 7 - Off Switch Current vs. Input Voltage
72
100
70
10
1
0.1
VIN = 5 V
VIN = 3.6 V
VIN = 1.2 V
0.01
0.001
- 40
RDS - On-Resistance (mΩ)
IQ(off) - Off Switch Current (nA)
SiP32413
IO = 1.5 A
IO = 1 A
66
64
62
IO = 0.5 A
IO = 0.1 A
60
- 20
0
20
40
60
80
1.0
100
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Temperature (°C)
VIN (V)
Fig. 8 - SiP32414 Off Supply Current vs. Temperature
Fig. 11 - RDS(on) vs. Input Voltage
SiP32414
SiP32416
70
RDS - On-Resistance (mΩ)
100
10
VIN = 5 V
1
VIN = 3.6 V
0.1
0.01
0.001
- 40
5.5
75
1000
IQ(OFF) - Off Supply Current (nA)
IO = 2 A
68
VIN = 1.2 V
- 20
0
20
IO = 0.1 A
VIN = 5 V
65
60
55
50
45
40
60
80
100
40
- 40
- 20
0
20
40
60
80
Temperature (°C)
Temperature (°C)
Fig. 9 - SiP32414 and SiP32416 Off Supply Current
vs. Temperature
Fig. 12 - RDS(on) vs. Temperature
S20-0532-Rev. C, 06-Jul-2020
100
Document Number: 71437
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
550
1000
SiP32414 and SiP32416 only
VIN = VOUT
RPD - Output Pulldown Resistance (Ω)
500
VIN = 1.2 V
VOUT = 5 V
VCNTRL = inactive
IIN - Input Current (nA)
450
400
350
300
250
100
200
150
100
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
10
- 40
5.5
- 20
0
20
40
60
Temperature (°C)
VIN (V)
Fig. 13 - SiP32414 and SiP32416 Output Pull-Down
vs. Input Voltage
100
Fig. 16 - Reverse Blocking Current vs. Temperature
1.6
235
SiP32414 and SiP32416 only
VOUT = VIN = 5 V
RPD - Output Pulldown Resistance (Ω)
80
1.5
CNTRL - Threshold Voltage (V)
230
225
220
215
210
1.4
1.3
1.2
1.1
1.0
0.9
VIH
0.8
VIL
0.7
0.6
205
- 40
- 20
0
20
40
60
80
0.5
1.0
100
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VIN (V)
Temperature (°C)
Fig. 17 - CNTRL Threshold Voltage vs. Input Voltage
Fig. 14 - SiP32414 and SiP32416 Output Pull-Down
vs. Temperature
1000
160
SiP32413, SiP32414
td(on) - Turn-On Delay Time (μs)
IIN - Input Current (nA)
100
150
VIN = 1.2 V
VCNTRL = inactive
10
1
0.1
140
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
130
120
110
100
90
80
70
0.01
1.0
1.5
2.0
2.5
3.0 3.5
VOUT (V)
4.0
4.5
5.0
5.5
Fig. 15 - Reverse Blocking Current vs. Output Voltage
S20-0532-Rev. C, 06-Jul-2020
60
- 40
- 20
0
20
40
Temperature (°C)
60
80
100
Fig. 18 - SiP32413 and SiP32414 Turn-On Delay Time
vs. Temperature
Document Number: 71437
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TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
220
5.0
SiP32413, SiP32414
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
200
4.0
190
180
170
160
150
3.5
3.0
2.5
2.0
1.5
1.0
140
0.5
130
- 40
- 20
0
20
40
60
Temperature (°C)
80
100
0.0
- 40
Fig. 19 - SiP32413 and SiP32414 Rise Time
vs. Temperature
0
20
40
Temperature (°C)
60
80
100
0.40
SiP32413, SiP32414
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
0.35
td(off) - Turn-Off Delay Time (μs)
0.20
- 20
Fig. 22 - SiP32416 Rise Time vs. Temperature
0.22
td(off) - Turn-Off Delay Time (μs)
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
4.5
tR - Rise Time (ms)
t(on) - Turn-On Rise Time (μs)
210
0.18
0.16
0.14
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
0.30
0.25
0.20
0.15
0.10
0.12
0.05
0.10
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Fig. 20 - SiP32413 and SiP32414 Turn-Off Delay Time
vs. Temperature
0
- 40
- 20
0
20
40
Temperature (°C)
60
80
100
Fig. 23 - SiP32416 Turn-Off Delay Time vs. Temperature
td(on) - Turn-On Delay Time (ms)
3.0
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
2.5
2.0
1.5
1.0
0.5
0.0
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Fig. 21 - SiP32416 Turn-On Delay Time vs. Temperature
S20-0532-Rev. C, 06-Jul-2020
Document Number: 71437
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TYPICAL WAVEFORMS
VCNTRL
(2 V/div.)
VCNTRL (2 V/div.)
RL = 7.2 Ω
CL = 0.1 μF
RL = 10 Ω
CL = 0.1 μF
VOUT (2 V/div.)
IOUT (200 mA/div.)
VOUT (1 V/div.)
IOUT (200 mA/div.)
Time (100 μs/div.)
Time (1 μs/div.)
Fig. 24 - SiP32413 Channel 1 Switching
(VIN = 3.6 V, RL = 7.2 )
Fig. 27 - SiP32413 Channel 1 Turn-Off
(VIN = 5 V, RL = 10 )
VCNTRL
(2 V/div.)
VCNTRL (2 V/div.)
RL = 7.2 Ω
CL = 0.1 μF
VOUT (1 V/div.)
IOUT (200 mA/div.)
RL = 7.2 Ω
CL = 0.1 μF
VOUT (1 V/div.)
IOUT (200 mA/div.)
Time (1 μs/div.)
Time (100 μs/div.)
Fig. 25 - SiP32413 Channel 1 Turn-Off
(VIN = 3.6 V, RL = 7.2 )
Fig. 28 - SiP32413 Channel 2 and SiP32414 Switching
(VIN = 3.6 V, RL = 7.2 )
VCNTRL (2 V/div.)
VCNTRL
(2 V/div.)
RL = 10 Ω
CL = 0.1 μF
RL = 7.2 Ω
CL = 0.1 μF
VOUT (1 V/div.)
VOUT (2 V/div.)
IOUT (200 mA/div.)
IOUT (200 mA/div.)
Time (100 μs/div.)
Fig. 26 - SiP32413 Channel 1 Switching
(VIN = 5 V, RL = 10 )
S20-0532-Rev. C, 06-Jul-2020
Time (1 μs/div.)
Fig. 29 - SiP32413 Channel 2 and SiP32414 Turn-Off
(VIN = 3.6 V, RL = 7.2 )
Document Number: 71437
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VCNTRL
(2 V/div.)
VCNTRL
(2 V/div.)
RL = 10 Ω
CL = 0.1 μF
RL = 7.2 Ω
CL = 0.1 μF
VOUT (1 V/div.)
VOUT (2 V/div.)
IOUT (200 mA/div.)
IOUT (200 mA/div.)
Time (100 μs/div.)
Time (1 μs/div.)
Fig. 30 - SiP32413 Channel 2 and SiP32414 Switching
(VIN = 5 V, RL = 10 )
Fig. 33 - SiP32416 Turn-Off
(VIN = 3.6 V, RL = 7.2 )
VCNTRL (2 V/div.)
VCNTRL
(2 V/div.)
RL = 10 Ω
CL = 0.1 μF
VOUT (2 V/div.)
RL = 10 Ω
CL = 0.1 μF
VOUT (2 V/div.)
IOUT (200 mA/div.)
IOUT (200 mA/div.)
Time (1 μs/div.)
Time (2 ms/div.)
Fig. 31 - SiP32413 Channel 2 and SiP32414 Turn-Off
(VIN = 5 V, RL = 10 )
Fig. 34 - SiP32416 Switching
(VIN = 5 V, RL = 10 ))
VCNTRL
(2 V/div.)
VCNTRL
(2 V/div.)
RL = 10 Ω
CL = 0.1 μF
VOUT (2 V/div.)
RL = 7.2 Ω
CL = 0.1 μF
IOUT (200 mA/div.)
VOUT (1 V/div.)
IOUT (200 mA/div.)
Time (2 ms/div.)
Time (1 μs/div.)
Fig. 32 - SiP32416 Switching
(VIN = 3.6 V, RL = 7.2 )
Fig. 35 - SiP32416 Turn-Off
(VIN = 5 V, RL = 10 ))
S20-0532-Rev. C, 06-Jul-2020
Document Number: 71437
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BLOCK DIAGRAM
Reverse
Blocking
IN1
CNTRL1
OUT1
Logic
Control
Charge
Pump
Turn On
Slew Rate
Control
+
GND
+
CNTRL2
Logic
Control
Charge
Pump
Turn On
Slew Rate
Control
IN2
SiP32414 and SiP32416
only
OUT2
Reverse
Blocking
Fig. 36 - Functional Block Diagram
PCB LAYOUT
Bottom
Top
Fig. 37 - PCB Layout for TDFN8 2.0 mm x 2.0 mm (type: FR4, size: 1.2" x 1.3", thickness: 0.062", copper thickness: 2 oz.)
DETAILED DESCRIPTION
APPLICATION INFORMATION
SiP32413, SiP32414, and SiP32416 are dual n-channel
power MOSFETs designed as high side load switch with
slew rate control to prevent in-rush current. Once enable the
device charges the gate of the power MOSFET to 5 V gate
to source voltage while controlling the slew rate of the turn
on time. The mostly constant gate to source voltage keeps
the on resistance low through out the input voltage range.
For SiP32414, when disable the output discharge circuit
turns on to help pull the output voltage to ground more
quickly. For all parts, in disable mode, the reverse blocking
circuit is activated to prevent current from going back to the
input in case the output voltage is higher than the input
voltage. Input voltage is needed for the reverse blocking
circuit to work properly, it can be as low as VIN(min.).
Input Capacitor
S20-0532-Rev. C, 06-Jul-2020
While bypass capacitors on the inputs are not required,
2.2 μF or larger capacitors for CIN is recommended in almost
all applications. The bypass capacitors should be placed as
physically close as possible to the device’s input to be
effective in minimizing transients on the input. Ceramic
capacitors are recommended over tantalum because of
their ability to withstand input current surges from low
impedance sources such as batteries in portable devices.
Document Number: 71437
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SiP32413, SiP32414, SiP32416
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Output Capacitor
A 0.1 μF capacitor or larger across VOUT and GND is
recommended to insure proper slew operation. COUT may
be increased without limit to accommodate any load
transient condition with only minimal affect on the turn on
slew rate time. There are no ESR or capacitor type
requirement.
Control
The CNTRL pins are compatible with both TTL and CMOS
logic voltage levels.
Protection Against Reverse Voltage Condition
SiP32413, SiP32414, and SiP32416 contain reverse
blocking circuitries to protect the current from going to the
input from the output in case where the output voltage is
higher than the input voltage when the main switch is off.
Supply voltages as low as the minimum required input
voltage are necessary for these circuitries to work properly.
Thermal Considerations
All three parts are designed to maintain constant output load
current. Due to physical limitations of the layout and
assembly of the device the maximum switch current is
2.4 A, as stated in the Absolute Maximum Ratings table.
However, another limiting characteristic for the safe
operating load current is the thermal power dissipation of
the package. To obtain the highest power dissipation (and a
thermal resistance of 95) the power pad of the device should
be connected to a heat sink on the printed circuit board.
The maximum power dissipation in any application is
dependent on the maximum junction temperature,
TJ(max.) = 125 °C, the junction-to-ambient thermal resistance
for the TDFN4 1.2 mm x 1.6 mm package, J-A = 95 °C/W,
and the ambient temperature, TA, which may be
formulaically expressed as:
S20-0532-Rev. C, 06-Jul-2020
125 – T A
T J(max.) – T A
P (max.) = ------------------------------- = ---------------------J – A
95
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to
about 580 mW.
So long as the load current is below the 2.4 A limit, the
maximum continuous switch current becomes a function
two things: the package power dissipation and the RDS(ON)
at the ambient temperature.
As an example let us calculate the worst case maximum
load current at TA = 70 °C. The worst case RDS(on) at 25 °C
occurs at an input voltage of 1.2 V and is equal to 75 m.
The RDS(on) at 70 °C can be extrapolated from this data using
the following formula:
RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x T)
Where TC is 3400 ppm/°C. Continuing with the calculation
we have
RDS(on) (at 70 °C) = 75 m x (1 + 0.0034 x (70 °C - 25 °C)) =
86.5 m
The maximum current limit is then determined by
P (max.)
I LOAD(max.) --------------------R DS on
which in case is 2.6 A, assuming one switch turn on at a
time. Under the stated input voltage condition, if the 2.6 A
current limit is exceeded the internal die temperature will rise
and eventually, possibly damage the device.
To avoid possible permanent damage to the device and
keep a reasonable design margin, it is recommended to
operate the device maximum up to 2.4 A only as listed in the
Absolute Maximum Ratings table.
Document Number: 71437
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For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32413, SiP32414, SiP32416
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Vishay Siliconix
PRODUCT SUMMARY
Part number
SiP32413
SiP32414
SiP32416
Description
Dual switch, 1.1 V to 5.5 V,
150 μs rise time,
reversed EN logic
1.1 V to 5.5 V,
150 μs rise time,
output discharge
1.1 V to 5.5 V,
2.5 ms rise time,
output discharge
Configuration
Dual
Dual
Dual
Slew rate time (μs)
150
150
2500
On delay time (μs)
140
140
2000
Input voltage min. (V)
1.1
1.1
1.1
Input voltage max. (V)
5.5
5.5
5.5
On-resistance at input voltage min. (m)
66
66
66
On-resistance at input voltage max. (m)
62
62
62
Quiescent current at input voltage min. (μA)
6.7
6.7
6.7
Quiescent current at input voltage max. (μA)
71
71
71
Output discharge (yes / no)
No
Yes
Yes
Reverse blocking (yes / no)
Yes
Yes
Yes
Continuous current (A)
2.4
2.4
2.4
TDFN8
TDFN8
TDFN8
2.0 x 2.0 x 0.5
Package type
Package size (W, L, H) (mm)
2.0 x 2.0 x 0.5
2.0 x 2.0 x 0.5
Status code
2
2
2
Product type
Slew rate
Slew rate
Slew rate
Applications
Computers, consumer,
industrial, healthcare,
networking, portable
Computers, consumer,
industrial, healthcare,
networking, portable
Computers, consumer,
industrial, healthcare,
networking, portable
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71437.
S20-0532-Rev. C, 06-Jul-2020
Document Number: 71437
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For technical questions, contact: powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
Case Outline for TDFN8 2 x 2
Index Area
(D/2 x E/2)
MILLIMETERS
A
A3
A1 (6)
D
7
E
2
DIM.
MIN.
NOM.
MAX.
MIN.
NOM.
A
0.50
0.55
0.60
0.020
0.022
0.024
A1
0.00
-
0.05
0.000
-
0.002
A3
8
1
INCHES
0.152 REF
MAX.
0.006 REF
b
0.18
0.23
0.28
0.007
0.009
0.011
D
1.95
2.00
2.05
0.077
0.079
0.081
D2
0.75
0.80
0.85
0.030
0.031
0.033
3
6
e
E
1.95
2.00
2.05
0.077
0.079
0.081
4
5
E2
1.40
1.45
1.50
0.055
0.057
0.059
K
-
0.25
-
-
0.010
-
L
0.30
0.35
0.40
0.012
0.014
0.016
Top View
0.05 C
(7)
Side View
D2
Note
(1) All dimensions are in millimeters which will govern.
(2) Max. package warpage is 0.05 mm.
(3) Max. allowable burrs is 0.076 mm in all directions.
(4) Pin #1 ID on top will be laser/ink marked.
(5) Dimension applies to meatlized terminal and is measured
between 0.20 mm and 0.25 mm from terminal tip.
(6) Applied only for terminals.
(7) Applied for exposed pad and terminals.
b (5)
1
7
2
6
3
5
4
e
E2
8
0.020 BSC
ECN: T15-0301-Rev. B, 29-Jun-15
DWG: 5997
L
Pin 1 Indicator
(Optional)
0.50 BSC
K
K
Bottom View
Revison: 29-Jun-15
1
Document Number: 67493
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jan-2022
1
Document Number: 91000