VBUS54ED-FBL
www.vishay.com
Vishay Semiconductors
4-Line BUS-Port ESD Protection - Flow Through Design
FEATURES
• Compact LLP2510-10L package
nc.
10
nc. GND nc.
9
8
7
nc.
6
• Low package height < 0.6 mm
• 4-line ESD-protection
• Low leakage current IR < 0.1 μA
• Low capacitance between I/O lines: 0.3 pF
1
2
3
4
5
D1+ D1- GND D2+ D2-
• Ideal for high speed data line like
- HDMI, DisplayPort, eSATA
- USB, 1394/firewire
- Thunderbolt
22551
22552
• ESD-protection acc. IEC 61000-4-2
± 15 kV contact discharge
± 15 kV air discharge
MARKING (example only)
• Soldering can be checked by standard vision inspection.
No X-ray necessary
YYXX
20720
• e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn)
Dot = pin 1 marking
YY = type code (see table below)
XX = date code
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
ORDERING INFORMATION
DEVICE NAME
ORDERING CODE
TAPED UNITS PER REEL
(8 mm TAPE ON 7" REEL)
MINIMUM ORDER QUANTITY
VBUS54ED-FBL
VBUS54ED-FBL-G4-08
3000
15 000
PACKAGE DATA
DEVICE NAME
PACKAGE
NAME
TYPE
CODE
WEIGHT
MOLDING COMPOUND
FLAMMABILITY RATING
MOISTURE
SENSITIVITY LEVEL
SOLDERING
CONDITIONS
VBUS54ED-FBL
LLP2510-10L
L5
3.9 mg
UL 94 V-0
MSL level 1
(according J-STD-020)
260 °C/10 s at terminals
ABSOLUTE MAXIMUM RATINGS VBUS54ED-FBL
PARAMETER
Peak pulse current
Peak pulse power
ESD immunity
Operating temperature
Storage temperature
Rev. 1.1, 15-Jul-15
TEST CONDITIONS
SYMBOL
VALUE
UNIT
Acc. IEC 61000-4-5; tP = 8/20 μs; single shot
IPPM
2
A
Acc. IEC 61000-4-5; tP = 8/20 μs; single shot
PPP
25
W
Contact discharge acc. IEC 61000-4-2; 10 pulses
Air discharge acc. IEC 61000-4-2; 10 pulses
Junction temperature
VESD
± 15
± 15
kV
TJ
-40 to +125
°C
TSTG
-55 to +150
°C
Document Number: 82414
1
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS54ED-FBL
www.vishay.com
Vishay Semiconductors
ELECTRICAL CHARACTERISTICS VBUS54ED-FBL (pin 1, 2, 4 or 5 to pin 3)
(Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITIONS/REMARKS
SYMBOL
MIN.
TYP.
Number of lines which can be protected
Nchannel
-
Max. reverse working voltage
VRWM
-
Reverse voltage
at IR = 0.1 μA
VR
Reverse current
at VRWM = 5.5 V
Protection paths
Reverse stand-off voltage
MAX.
UNIT
-
4
lines
-
5.5
V
5.5
-
-
V
IR
-
0.02
0.1
μA
at IR = 1 mA
VBR
6.9
7.5
8.7
V
at IPP = 1 A
VC
-
9.1
11
V
at IPP = IPPM = 2 A
VC
-
10.3
12.5
V
at IPP = 1 A
VF
-
1.9
2.2
V
at IPP = 2 A
VF
-
2.5
3.1
V
-
0.7
0.8
pF
Reverse breakdown voltage
Reverse clamping voltage
Forward clamping voltage
at VR = 0 V; f = 1 MHz
Capacitance
at VR = 3.3 V; f = 1 MHz
Capacitance between I/O lines
at VR = 3.3 V; f = 1 MHz
CD
CDD
-
0.6
0.8
pF
-
0.3
0.4
pF
APPLICATION NOTE
The VBUS54ED-FBL is a four-line ESD-protection device with the characteristic of a Z-diode with a high ESD-immunity and a
very low capacitance which makes it usable for high frequency applications like USB2.0, USB3.0 or HDMI.
With the VBUS54ED-FBL four high speed data lines can be protected against transient voltage signals like ESD (Electro Static
Discharge). Connected to the data line (pin 1, 2 and pin 4, 5) and to ground (pin 3 and 8) negative transients will be clamped
close below the ground level while positive transients will be clamped close above the 5.5 V working range. The clamping
behaviour of the VBUS54ED-FBL is bidirectional but asymmetrical (BiAs) and so it offers the best protection for applications
running up to 5.5 V.
Pin configuration:
• Pin 3 and 8 are internally shorted and have to be connected to ground
• Pin 1, 2 and 4, 5 are the inputs for the data lines D1+ and D1- and D2+ and D2• Pin 6, 7 and 9, 10 are not connected internally
-----USB / HDMI Interface
nc. GND nc.
9
8
7
D2+
nc.
6
1
2
3
4
5
D1+ D1- GND D2+ D2-
D2-
matched pair
nc.
10
D1-
matched pair
D1+
10
9
8
7
6
1
2
3
4
5
22552
D1+
D1- GND D2+
D2-
I/O Port Connector
22553
FLOW THROUGH DESIGN
Modern digital transmission lines can be clocked up to 480 Mbit/s (USB2.0) or 1.65 Gbit/s (HDMI).
At such high data rates the transmission lines like cables or the line traces on the PCBs have to be very homogeneous regarding
their surge impedance. This requires well defined trace dimensions as trace width and distance which have to be calculated
depending on the requested surge impedance (e.g. 50 ) and the PCB material and layer dimensions. Any device connected
to the data lines - like ESD-protection devices - have to be connected with minimal changes in these trace dimensions and
distances.
With the package in the so called “Flow Through Design” this is possible. The lines are running straight along the PCB while the
VBUS54ED-FBL is placed on top without any vias or loops.
Rev. 1.1, 15-Jul-15
Document Number: 82414
2
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS54ED-FBL
www.vishay.com
Vishay Semiconductors
CONNECTION DIAGRAM EXAMPLE FOR THUNDERBOLT DATA PORT
3 x VBUS54ED-FBL
10
9
8
7
6
10
9
8
7
6
10
9
8
7
6
1
2
3
4
5
1
2
3
4
5
1
2
3
4
5
Pin 4
CFG1
Cio0_RX-
Pin 6
CFG2
Cio0_RX+
Pin 10
DP3+
Pin 12
DP3-
Pin 16
AUX+
Cio1_RX-
Pin 18
Pin 3
AUXDP0+
Cio1_RX+
Cio0_TX-
Pin 5
DP0-
Cio0_TX+
Pin 9
DP1+
Lsx_tx-ctrl
Pin 11
DP1-
Lsx_rx-ctrl
Pin 15
DP2+
Cio1_TX-
Pin 17
DP2-
Cio1_TX+
-
Display Port
mode
Connector
Thunderbolt
mode
22652
CONNECTION DIAGRAM EXAMPLE FOR USB 3.0 DATA PORT
VBUS54ED-FBL VBUS052CD-FAH
10
9
8
7
6
6
5
4
7
1
2
3
4
5
1
2
3
VBUS
VBUS
D-
D-
D+
D+
Pwr Gnd
Pwr Gnd
SSRX-
SSRX-
SSRX+
SSRX+
GND
GND
SSTX-
SSTX-
SSTX+
SSTX+
USB 3.0
Connector
USB 3.0
Transmitter
22653
CONNECTION DIAGRAM EXAMPLE FOR HDMI DATA PORT
2 x VBUS54ED-FBL
10
9
8
7
6
10
9
8
7
6
1
2
3
4
5
1
2
3
4
5
TMDS D2+
TMDS D2+
TMDS D2-
TMDS D2-
TMDS D1+
TMDS D1+
TMDS D1-
TMDS D1-
TMDS D0+
TMDS D0+
TMDS D0TMDS Clock+
TMDS D0TMDS Clock+
TMDS Clock-
TMDS Clock-
HDMI
Connector
HDMI
Transmitter
22654
Rev. 1.1, 15-Jul-15
Document Number: 82414
3
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS54ED-FBL
www.vishay.com
Vishay Semiconductors
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
100
120 %
Rise time = 0.7 ns to 1 ns
BiAs-mode
10
80 %
1
IF (mA)
Discharge Current IESD
100 %
60 %
53 %
0.1
40 %
27 %
0.01
20 %
0.001
0.5
0%
-10 0 10 20 30 40 50 60 70 80 90 100
0.6
0.7
Fig. 1 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 /150 pF)
0.8
0.9
1
1.1
VF (V)
22555
Time (ns)
20557
Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF
8
8 µs to 100 %
100 %
7
80 %
6
5
VR (V)
IPPM
60 %
20 µs to 50 %
40 %
4
3
2
20 %
Pin 1, 2, 4 or 5 to Pin 3
1
0%
0
10
20
30
Time (µs)
20548
0
0.01
40
Fig. 2 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
1
10
100
1000 10 000
IR (µA)
Fig. 5 - Typical Reverse Voltage VR vs.
Reverse Current IR
0.9
14
f = 1 MHz
12
0.8
Second pin at 0 V
0.7
10
8
VC (V)
0.6 Second pin at 3.3 V
CD pF
0.1
22556
0.5
Second pin at 5 V
0.4
Pin 1, 2, 4 or 5 to Pin 3
(reverse)
6
4
VC
2
0.3
0
0.2
-2
0.1
Pin 1, 2, 4 or 5 to Pin 3 and 8
0.0
0
22554
1
2
3
4
5
6
VR in (V)
Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR
Rev. 1.1, 15-Jul-15
Pin 3 to Pin 1, 2, 4 or 5
(forward)
- 4 Measured acc. IEC 61000-4-5
(8/20 μs - wave form)
-6
0
1
2
3
IPP (A)
Fig. 6 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
Document Number: 82414
4
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS54ED-FBL
www.vishay.com
Vishay Semiconductors
60
100
80
Acc. IEC 61000-4-2
+8 kV
contact discharge
40
VC-ESD (V)
VC-ESD (V)
60
40
20
Acc. IEC 61000-4-2
contact discharge
50
30
20
Clamping voltage measured
after 30 ns
10
0
- 10
- 20
0
- 30
- 20
- 10 0 10 20 30 40 50 60 70 80 90
22558
t (ns)
Fig. 7 - Typical Clamping Performance at 8 kV
Contact Discharge (acc. IEC 61000-4-2)
20
0
- 40
0
5
10
15
20
VESD (kV)
Fig. 9 - Typical Peak Clamping Voltage at ESD
Contact Discharge (acc. IEC 61000-4-2)
Acc. IEC 61000-4-2
-8 kV
contact discharge
VC-ESD (V)
- 20
- 40
- 60
- 80
- 100
- 120
- 10 0 10 20 30 40 50 60 70 80 90
22559
t (ns)
Fig. 8 - Typical Clamping Performance at 8 kV
Contact Discharge (acc. IEC 61000-4-2)
Rev. 1.1, 15-Jul-15
Document Number: 82414
5
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VBUS54ED-FBL
www.vishay.com
Vishay Semiconductors
PACKAGE DIMENSIONS in millimeters: LLP2510-10L
PIN 1 identification
Chamfer
L
Package = Chip Dimensions in mm
A
PIN 1 marking
e
D
b
A3
L
E
A1
Millimeters
min.
nom.
max.
A
0.50
0.55
0.60
A1
0.00
-
0.05
A3
-
0.15
-
2.45
2.50
2.55
D
E
0.95
1.00
1.05
b
0.15
0.20
0.25
L
0.30
0.35
0.40
e
-
0.50
-
foot print recommendation:
4 x 0.5 = 2
0.25
solder
resist mask
0.35
0.15
1
0.5
0.5
solder pad
Document no.: S8-V-3906.04-027 (4)
Created - Date: 08. July 2011
22587
Pin 1 - location
LLP2510
S8-V-3906.04-029 (4)
07.07.2011
Rev. 1.1, 15-Jul-15
Top view
Pad layout - view from top
seen at bottom side
Document Number: 82414
6
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
www.vishay.com
Vishay
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provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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Revision: 02-Oct-12
1
Document Number: 91000