TSM5ND50

TSM5ND50 500V N-Channel Power MOSFET TO-252 Pin Definition: 1. Gate 2. Drain 3. Source PRODUCT SUMMARY VDS (V) 500 RDS(on)(Ω) 1.5 @ VGS =10V ID (A) 2.2 General Description The TSM5ND50 N-Channel enhancement mode Power MOSFET is produced by planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supply, power factor correction, electronic lamp ballast based on half bridge. Features ● ● ● ● ● ● Low gate charge typical @ 20nC Low Crss typical @ 17pF Fast Switching 100% avalanche tested Improved dv/dt capability ESD Protection Block Diagram Ordering Information Part No. TSM5ND50CP RO Package TO-252 Packing 2,500pcs / 13” Reel N-Channel MOSFET Absolute Maximum Rating (Ta = 25oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Continuous Source Current (Diode Conduction) Peak Diode Recovery (Note 2) Single Pulse Drain to Source Avalanche Energy (Note 3) Total Power Dissipation @Ta = 25 C Operating Junction and Storage Temperature Range o Symbol VDS VGS ID IDM IS dv/dt EAS PDTOT TJ, TSTG Limit 500 ±30 4 .4 17.6 4.4 4.5 130 70 -55 to +150 Unit V V A A A V/ns mJ W o C Thermal Performance Parameter Thermal Resistance - Junction to Case Thermal Resistance - Junction to Ambient Notes: Surface mounted on FR4 board t ≤ 10sec Symbol RӨJC RӨJA Limit 1.78 62.5 Unit o o C/W C/W 1/8 Version: C07 TSM5ND50 500V N-Channel Power MOSFET Electrical Specifications (Ta = 25oC unless otherwise noted) Parameter Static Drain-Source Breakdown Voltage Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage Forward Transconductance Dynamic b Conditions VGS = 0V, ID = 250uA VGS = 10V, ID = 2.2A VDS = VGS, ID = 250uA VDS = 500V, VGS = 0V VGS = ±20V, VDS = 0V VDS = 15V, ID = 2.2A Symbol BVDSS RDS(ON) VGS(TH) IDSS IGSS gfs Qg Qgs Qgd Ciss Coss Crss td(on) Min 500 -3.0 ------------------- Typ -1 .2 ---3.1 20 4 10 535 75 17 21.6 11.7 14.5 4.5 -0.82 310 1425 9.2 Max -1 .5 4.5 1 ±10 -----------4.4 1.2 ---- Unit V Ω V uA uA S Total Gate Charge Gate-Source Charge Gate-Drain Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching c VDS = 250V, ID = 4.4A, VGS = 10V VDS = 25V, VGS = 0V, f = 1.0MHz nC pF Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Source Drain Diode Source-drain Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Notes: 1. Pulse test: pulse width ≤300uS, duty cycle ≤2% 2. ISD