SI8407DB

Si8407DB Vishay Siliconix P-Channel 20-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) rDS(on) (W) 0.027 @ VGS = −4.5 V −20 0.032 @ VGS = −2.5 V 0.045 @ VGS = −1.8 V FEATURES ID (A) −8.2 −7.5 −6.6 D TrenchFETr Power MOSFET D New MICRO FOOTr Chipscale Packaging Provides Ultra-Low Footprint Area Profile (0.62 mm) and On-Resistance APPLICATIONS D Portable Devices − PA Switch − Battery Switch − Load Switch S MICRO FOOT Bump Side View Backside View 5 S S 4 G Device Marking: 8407 xxx = Date/Lot Traceability Code 6 G S 3 1 D D 2 Ordering Information: Si8407DB-T2 Si8407DB-T2—E1 (Lead (Pb)-Free) D P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current (TJ = 150_C)a Pulsed Drain Current continuous Source Current (Diode Conduction)a Maximum Power Dissipationa Operating Junction and Storage Temperature Range Package Reflow Conditionsb VPR IR/Convection TA = 25_C TA = 70_C TA = 25_C TA = 70_C Symbol VDS VGS ID IDM IS PD TJ, Tstg 5 secs Steady State −20 "8 Unit V −8.2 −6.5 −15 −2.6 2.9 1.86 −55 to 150 215 220 −5.8 −4.6 A −1.34 1.47 0.94 W _C _C THERMAL RESISTANCE RATINGS Parameter Maximum J Mi Junction-to-Ambienta ti t A bi t Maximum Junction-to-Foot (drain) t v 5 sec Steady State Steady State Symbol RthJA RthJF Typical 33 72 15 Maximum 43 85 19 Unit _C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering. Document Number: 72254 S-50066—Rev. B, 17-Jan-05 www.vishay.com 1 Si8407DB Vishay Siliconix SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Currenta Drain-Source On-State Resistancea Forward Transconductancea Diode Forward Voltagea VGS(th) IGSS IDSS ID(on) rDS(on) gfs VSD VDS = VGS, ID = −350 mA VDS = 0 V, VGS = "8 V VDS = −20 V, VGS = 0 V VDS = −20 V, VGS = 0 V, TJ = 70_C VDS v −5 V, VGS = −4.5 V VGS = −4.5 V, ID = −1 A VGS = −2.5 V, ID = −1 A VGS = −1.8 V, ID = −1 A VDS = −10 V, ID = −1 A IS = −1 A, VGS = 0 V −5 0.022 0.026 0.033 10 −0.6 −1.1 0.027 0.032 0.045 S V W −0.4 −0.9 "100 −1 −5 V nA mA A Symbol Test Condition Min Typ Max Unit Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time Qg Qgs Qgd td(on) tr td(off) tf trr IF = −1 A, di/dt = 100 A/ms VDD = −10 V, RL = 10 W V, ID ^ −1 A, VGEN = −4.5 V, Rg = 6 W VDS = −10 V, VGS = −4.5 V, ID = −1 A , , 32 3.6 8.5 30 45 550 220 265 45 70 825 330 500 ns 50 nC Notes a. Pulse test; pulse width v 300 ms, duty cycle v 2%. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Output Characteristics 15 VGS = 4.5 thru 2 V 12 1.5 V I D − Drain Current (A) 9 I D − Drain Current (A) 9 12 15 Transfer Characteristics 6 6 TC = 125_C 3 25_C −55_C 3 1V 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.0 0.5 1.0 1.5 2.0 VDS − Drain-to-Source Voltage (V) www.vishay.com VGS − Gate-to-Source Voltage (V) Document Number: 72254 S-50066—Rev. B, 17-Jan-05 2 Si8407DB Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) 0.06 0.05 0.04 0.03 0.02 0.01 0.00 0 4 8 12 16 20 C − Capacitance (pF) On-Resistance vs. Drain Current 2500 Capacitance r DS(on) − On-Resistance ( W ) 2000 Ciss VGS = 1.8 V VGS = 2.5 V 1500 1000 Coss 500 Crss 0 0 4 8 12 16 20 VGS = 4.5 V ID − Drain Current (A) VDS − Drain-to-Source Voltage (V) 5 V GS − Gate-to-Source Voltage (V) VDS = 10 V ID = 1 A Gate Charge 1.6 On-Resistance vs. Junction Temperature VGS = 4.5 V ID = 1 A 4 1.4 rDS(on) − On-Resiistance (Normalized) 3 1.2 2 1.0 1 0.8 0 0 5 10 15 20 25 30 35 Qg − Total Gate Charge (nC) 0.6 −50 −25 0 25 50 75 100 125 150 TJ − Junction Temperature (_C) Source-Drain Diode Forward Voltage 20 0.10 On-Resistance vs. Gate-to-Source Voltage I S − Source Current (A) 10 r DS(on) − On-Resistance ( W ) 0.08 ID = 1 A 0.06 TJ = 150_C 0.04 TJ = 25_C 0.02 1 0.0 0.00 0.3 0.6 0.9 1.2 1.5 0 1 2 3 4 5 VSD − Source-to-Drain Voltage (V) VGS − Gate-to-Source Voltage (V) Document Number: 72254 S-50066—Rev. B, 17-Jan-05 www.vishay.com 3 Si8407DB Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Threshold Voltage 0.6 ID = 350 mA 0.4 V GS(th) Variance (V) 60 50 40 30 Single Pulse Power, Juncion-To-Ambient 0.2 0.0 Power (W) 20 −0.2 10 0 0.001 0.01 0.1 Time (sec) 1 10 −0.4 −50 −25 0 25 50 75 100 125 150 TJ − Temperature (_C) 100 Safe Operating Area * rDS(on) Limited 10 ms, 100 ms 10 I D − Drain Current (A) 1 ms 1 10 ms 100 ms 1s 10 s 100 s, dc 0.1 TA = 25_C Single Pulse 0.01 0.1 1 10 100 VDS − Drain-to-Source Voltage (V) *VGS u minimum VGS at which rDS(on) is specified 2 1 Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10−4 10−3 10−2 1 Square Wave Pulse Duration (sec) 10−1 Notes: PDM t1 t2 1. Duty Cycle, D = 2. Per Unit Base = RthJA = 72_C/W 3. TJM − TA = PDMZthJA(t) 4. Surface Mounted t1 t2 10 100 600 www.vishay.com 4 Document Number: 72254 S-50066—Rev. B, 17-Jan-05 Si8407DB Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Normalized Thermal Transient Impedance, Junction-to-Foot 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10−4 10−3 10−2 10−1 Square Wave Pulse Duration (sec) 1 10 Document Number: 72254 S-50066—Rev. B, 17-Jan-05 www.vishay.com 5 Si8407DB Vishay Siliconix PACKAGE OUTLINE MICRO FOOT: 6-BUMP (2.4 X 2.0, 8-mm PITCH) e e e Recommended Land S1 Backside Labels D e s R e Q 6 Bumps (Note 2) Bump Diameter: f0.38 − 0.40 mm e P E Note 3 A2 NOTES (Unless Otherwise Specified): 1. 2. 3. 4. 5. 6. All dimensions are in millimeters. A A1 1 2 PAD DISTRIBUTION TABLE P 1 2 Drain Drain Six (6) solder bumps are Eutectic solder 63/37Pb with diameter f0.38 − 0.40 mm. Backside surface is coated with a Ti/Nl/Ag layer. Non-solder mask defined copper landing pad. The flat side of wafers is oriented at the bottom. D is location of Pin 1P. Q Gate Source R Source Source MILLIMETERS* Dim A A1 A2 b D E e S S1 Min 0.600 0.260 0.340 0.370 1.920 2.320 0.750 0.370 0.580 INCHES Min 0.0236 0.0102 0.0134 0.0146 0.0756 0.0913 0.0295 0.0150 0.0228 Max 0.650 0.290 0.360 0.410 2.000 2.400 0.850 0.400 0.600 Max 0.0256 0.0114 0.0142 0.0161 0.0787 0.0945 0.0335 0.0157 0.0236 * Use millimeters as the primary measurement. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72254. www.vishay.com Document Number: 72254 S-50066—Rev. B, 17-Jan-05 6