SIHFPS35N50L-E3

IRFPS35N50L, SiHFPS35N50L Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration D FEATURES 500 0.125 230 65 110 Single VGS = 10 V • Super Fast Body Diode Eliminates the Need for External Diodes in ZVS Applications Requirements Available • Lower Gate Charge Results in Simpler Drive RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness • Higher Gate Voltage Threshold Offers Improved Noise Immunity • Lead (Pb)-free Available SUPER-247TM APPLICATIONS • Zero Voltage Switching SMPS • Telecom and Server Power Supplies S G D G S N-Channel MOSFET • Uninterruptible Power Supplies • Motor Control Applications ORDERING INFORMATION Package Lead (Pb)-free SnPb SUPER-247TM IRFPS35N50LPbF SiHFPS35N50L-E3 IRFPS35N50L SiHFPS35N50L ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta TC = 25 °C Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 500 ± 30 34 22 140 3.6 560 34 45 450 15 - 55 to + 150 300d 10 1.1 W/°C mJ A mJ W V/ns °C lbf · in N·m A UNIT V Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 0.97 mH, RG = 25 Ω, IAS = 34 A (see fig. 12). c. ISD ≤ 34 A, dI/dt ≤ 765 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91257 S-81368-Rev. A, 21-Jul-08 www.vishay.com 1 IRFPS35N50L, SiHFPS35N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) Note a. Rth is measured at TJ approximately 90 °C. SYMBOL RthJA RthCS RthJC TYP. 0.24 MAX. 40 0.28 °C/W UNIT SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related) Total Gate Charge Gate-Source Charge Gate-Drain Charge Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time IS ISM VSD trr Qrr IRRM ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. 500 3.0 18 - TYP. 0.12 0.125 5580 590 58 7290 160 320 220 1.1 24 100 42 42 MAX. 5.0 ± 100 50 2.0 0.145 230 65 110 - UNIT V V/°C V nA µA mA Ω S VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Coss Coss eff. Coss eff. (ER) Qg Qgs Qgd RG td(on) tr td(off) tf VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 20 Ab VDS = 50 V, ID = 20 Ab VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V , f = 1.0 MHz VDS = 400 V , f = 1.0 MHz VGS = 0 V VDS = 0 V to 400 Vc pF - VGS = 10 V ID = 34 A, VDS = 400 V, see fig. 7 and 13b - nC Ω f = 1 MHz, open drain VDD = 250 V, ID = 34 A, RG = 1.2 Ω, see fig. 10b ns - 170 220 670 1500 8.5 34 A 140 1.5 250 330 1010 2200 V ns µC A G S TJ = 25 °C, IS = 34 A, VGS = 0 Vb TJ = 25 °C, IF = 34 A TJ = 125 °C, dI/dt = 100 A/µsb TJ = 25 °C, IS = 34 A, VGS = 0 Vb TJ = 125 °C, dI/dt = 100 TJ = 25 °C A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 400 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80 % VDS. www.vishay.com 2 Document Number: 91257 S-81368-Rev. A, 21-Jul-08 IRFPS35N50L, SiHFPS35N50L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 1000 VGS 15V 10 V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP 1000 ID, Drain-to-Source Current (A) 100 I D , Drain-to-Source Current (A) 100 10 TJ = 150 ° C 10 1 0.1 1 4.5V 0.01 0.1 TJ = 25 ° C V DS = 50V 20µs PULSE W IDTH 5.0 6.0 7.0 8.0 9.0 10.0 0.001 0.1 1 20µs PULSE WIDTH Tj = 25°C 10 100 0.01 4.0 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics VGS , Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 1000 TOP RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 3.0 ID = 34A 2.5 2.0 10 1.5 1.0 1 4.5V 0.5 0.1 0.1 20µs PULSE WIDTH TJ = 150 ° C 1 10 100 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 VDS , Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics TJ , Junction Temperature ( °C) Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91257 S-81368-Rev. A, 21-Jul-08 www.vishay.com 3 IRFPS35N50L, SiHFPS35N50L Vishay Siliconix 100000 VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds 20 ID = 34A VDS = 400V VDS = 250V VDS = 100V 10000 16 C, Capacitance(pF) Ciss 12 1000 Coss 100 8 Crss 4 10 1 10 100 1000 0 0 40 80 120 FOR TEST CIRCUIT SEE FIGURE 13 160 200 240 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage QG , Total Gate Charge (nC) 30 25 1000 20 ISD , Reverse Drain Current (A) 100 Energy (µJ) TJ = 150 ° C 10 15 10 5 1 TJ = 25 ° C 0 0 100 200 300 400 500 600 0.1 0.2 0.4 0.6 0.8 1.0 1.2 V GS = 0 V 1.4 1.6 VDS, Drain-to-Source Voltage (V) VSD ,Source-to-Drain Voltage (V) Fig. 8 - Typical Source Drain Diode Forward Voltage Fig. 6 - Typical Output Capacitance Stored Energy vs. VDS www.vishay.com 4 Document Number: 91257 S-81368-Rev. A, 21-Jul-08 IRFPS35N50L, SiHFPS35N50L Vishay Siliconix RD VDS 35 RG VGS D.U.T. + - VDD 30 ID , Drain Current (A) 10 V 25 20 15 VDS Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit 10 5 0 25 50 75 100 125 150 90 % TC , Case Temperature ( ° C) Fig. 9 - Maximum Drain Current vs. Case Temperature 10 % VGS td(on) tr td(off) tf Fig. 10b - Switching Time Waveforms 1 Thermal Response (Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 0.01 0.001 0.00001 t1 , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp VDS L Driver RG 20 V tp D.U.T IAS 0.01 Ω + A - VDD A A IAS Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91257 S-81368-Rev. A, 21-Jul-08 IRFPS35N50L, SiHFPS35N50L Vishay Siliconix EAS , Single Pulse Avalanche Energy (mJ) 1200 TOP BOTTOM 1000 ID 15A 22A 34A 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) 800 ID , Drain Current (A) 100 10us 600 100us 10 1ms 400 200 0 25 50 75 100 125 150 1 1 TC = 25 ° C TJ = 150 ° C Single Pulse 10 100 10ms 1000 10000 Starting TJ , Junction Temperature ( °C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current VDS , Drain-to-Source Voltage (V) Fig. 12d - Maximum Safe Operating Area Current regulator Same type as D.U.T. 50 kΩ 12 V Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF 0.2 µF 0.3 µF + + D.U.T. VGS 3 mA - VDS VGS 3 mA D.U.T. - VDS IG ID Current sampling resistors IG ID Current sampling resistors Fig. 13a - Gate Charge Test Circuit Fig. 13b - Basic Gate Charge Waveform www.vishay.com 6 Document Number: 91257 S-81368-Rev. A, 21-Jul-08 IRFPS35N50L, SiHFPS35N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91257. Document Number: 91257 S-81368-Rev. A, 21-Jul-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1